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comparison gcc/config/mips/mips.h @ 131:84e7813d76e9

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gcc-8.2
author mir3636
date Thu, 25 Oct 2018 07:37:49 +0900
parents 04ced10e8804
children 1830386684a0
comparison
equal deleted inserted replaced
111:04ced10e8804 131:84e7813d76e9
1 /* Definitions of target machine for GNU compiler. MIPS version. 1 /* Definitions of target machine for GNU compiler. MIPS version.
2 Copyright (C) 1989-2017 Free Software Foundation, Inc. 2 Copyright (C) 1989-2018 Free Software Foundation, Inc.
3 Contributed by A. Lichnewsky (lich@inria.inria.fr). 3 Contributed by A. Lichnewsky (lich@inria.inria.fr).
4 Changed by Michael Meissner (meissner@osf.org). 4 Changed by Michael Meissner (meissner@osf.org).
5 64-bit r4000 support by Ian Lance Taylor (ian@cygnus.com) and 5 64-bit r4000 support by Ian Lance Taylor (ian@cygnus.com) and
6 Brendan Eich (brendan@microunity.com). 6 Brendan Eich (brendan@microunity.com).
7 7
315 || mips_tune == PROCESSOR_OCTEON3) 315 || mips_tune == PROCESSOR_OCTEON3)
316 #define TUNE_SB1 (mips_tune == PROCESSOR_SB1 \ 316 #define TUNE_SB1 (mips_tune == PROCESSOR_SB1 \
317 || mips_tune == PROCESSOR_SB1A) 317 || mips_tune == PROCESSOR_SB1A)
318 #define TUNE_P5600 (mips_tune == PROCESSOR_P5600) 318 #define TUNE_P5600 (mips_tune == PROCESSOR_P5600)
319 #define TUNE_I6400 (mips_tune == PROCESSOR_I6400) 319 #define TUNE_I6400 (mips_tune == PROCESSOR_I6400)
320 #define TUNE_P6600 (mips_tune == PROCESSOR_P6600)
320 321
321 /* Whether vector modes and intrinsics for ST Microelectronics 322 /* Whether vector modes and intrinsics for ST Microelectronics
322 Loongson-2E/2F processors should be enabled. In o32 pairs of 323 Loongson-2E/2F processors should be enabled. In o32 pairs of
323 floating-point registers provide 64-bit values. */ 324 floating-point registers provide 64-bit values. */
324 #define TARGET_LOONGSON_VECTORS (TARGET_HARD_FLOAT_ABI \ 325 #define TARGET_LOONGSON_VECTORS (TARGET_HARD_FLOAT_ABI \
780 %{march=mips64|march=5k*|march=20k*|march=sb1*|march=sr71000 \ 781 %{march=mips64|march=5k*|march=20k*|march=sb1*|march=sr71000 \
781 |march=xlr: -mips64} \ 782 |march=xlr: -mips64} \
782 %{march=mips64r2|march=loongson3a|march=octeon|march=xlp: -mips64r2} \ 783 %{march=mips64r2|march=loongson3a|march=octeon|march=xlp: -mips64r2} \
783 %{march=mips64r3: -mips64r3} \ 784 %{march=mips64r3: -mips64r3} \
784 %{march=mips64r5: -mips64r5} \ 785 %{march=mips64r5: -mips64r5} \
785 %{march=mips64r6|march=i6400: -mips64r6}}" 786 %{march=mips64r6|march=i6400|march=i6500|march=p6600: -mips64r6}}"
786 787
787 /* A spec that injects the default multilib ISA if no architecture is 788 /* A spec that injects the default multilib ISA if no architecture is
788 specified. */ 789 specified. */
789 790
790 #define MIPS_DEFAULT_ISA_LEVEL_SPEC \ 791 #define MIPS_DEFAULT_ISA_LEVEL_SPEC \
1312 #ifndef SUBTARGET_ASM_DEBUGGING_SPEC 1313 #ifndef SUBTARGET_ASM_DEBUGGING_SPEC
1313 #define SUBTARGET_ASM_DEBUGGING_SPEC "\ 1314 #define SUBTARGET_ASM_DEBUGGING_SPEC "\
1314 %{g} %{g0} %{g1} %{g2} %{g3} \ 1315 %{g} %{g0} %{g1} %{g2} %{g3} \
1315 %{ggdb:-g} %{ggdb0:-g0} %{ggdb1:-g1} %{ggdb2:-g2} %{ggdb3:-g3} \ 1316 %{ggdb:-g} %{ggdb0:-g0} %{ggdb1:-g1} %{ggdb2:-g2} %{ggdb3:-g3} \
1316 %{gstabs:-g} %{gstabs0:-g0} %{gstabs1:-g1} %{gstabs2:-g2} %{gstabs3:-g3} \ 1317 %{gstabs:-g} %{gstabs0:-g0} %{gstabs1:-g1} %{gstabs2:-g2} %{gstabs3:-g3} \
1317 %{gstabs+:-g} %{gstabs+0:-g0} %{gstabs+1:-g1} %{gstabs+2:-g2} %{gstabs+3:-g3} \ 1318 %{gstabs+:-g} %{gstabs+0:-g0} %{gstabs+1:-g1} %{gstabs+2:-g2} %{gstabs+3:-g3}"
1318 %{gcoff:-g} %{gcoff0:-g0} %{gcoff1:-g1} %{gcoff2:-g2} %{gcoff3:-g3} \
1319 %{gcoff*:-mdebug} %{!gcoff*:-no-mdebug}"
1320 #endif 1319 #endif
1321 1320
1322 /* FP_ASM_SPEC represents the floating-point options that must be passed 1321 /* FP_ASM_SPEC represents the floating-point options that must be passed
1323 to the assembler when FPXX support exists. Prior to that point the 1322 to the assembler when FPXX support exists. Prior to that point the
1324 assembler could accept the options but were not required for 1323 assembler could accept the options but were not required for
1354 %{mdspr2} %{mno-dspr2} \ 1353 %{mdspr2} %{mno-dspr2} \
1355 %{mmcu} %{mno-mcu} \ 1354 %{mmcu} %{mno-mcu} \
1356 %{meva} %{mno-eva} \ 1355 %{meva} %{mno-eva} \
1357 %{mvirt} %{mno-virt} \ 1356 %{mvirt} %{mno-virt} \
1358 %{mxpa} %{mno-xpa} \ 1357 %{mxpa} %{mno-xpa} \
1358 %{mcrc} %{mno-crc} \
1359 %{mginv} %{mno-ginv} \
1359 %{mmsa} %{mno-msa} \ 1360 %{mmsa} %{mno-msa} \
1360 %{msmartmips} %{mno-smartmips} \ 1361 %{msmartmips} %{mno-smartmips} \
1361 %{mmt} %{mno-mt} \ 1362 %{mmt} %{mno-mt} \
1362 %{mfix-rm7000} %{mno-fix-rm7000} \ 1363 %{mfix-rm7000} %{mno-fix-rm7000} \
1363 %{mfix-vr4120} %{mfix-vr4130} \ 1364 %{mfix-vr4120} %{mfix-vr4130} \
2289 2290
2290 /* Stack layout; function entry, exit and calling. */ 2291 /* Stack layout; function entry, exit and calling. */
2291 2292
2292 #define STACK_GROWS_DOWNWARD 1 2293 #define STACK_GROWS_DOWNWARD 1
2293 2294
2294 #define FRAME_GROWS_DOWNWARD flag_stack_protect 2295 #define FRAME_GROWS_DOWNWARD (flag_stack_protect != 0 \
2296 || (flag_sanitize & SANITIZE_ADDRESS) != 0)
2295 2297
2296 /* Size of the area allocated in the frame to save the GP. */ 2298 /* Size of the area allocated in the frame to save the GP. */
2297 2299
2298 #define MIPS_GP_SAVE_AREA_SIZE \ 2300 #define MIPS_GP_SAVE_AREA_SIZE \
2299 (TARGET_CALL_CLOBBERED_GP ? MIPS_STACK_ALIGN (UNITS_PER_WORD) : 0) 2301 (TARGET_CALL_CLOBBERED_GP ? MIPS_STACK_ALIGN (UNITS_PER_WORD) : 0)
2566 (CONSTANT_P (X) && memory_address_p (SImode, X)) 2568 (CONSTANT_P (X) && memory_address_p (SImode, X))
2567 2569
2568 /* This handles the magic '..CURRENT_FUNCTION' symbol, which means 2570 /* This handles the magic '..CURRENT_FUNCTION' symbol, which means
2569 'the start of the function that this code is output in'. */ 2571 'the start of the function that this code is output in'. */
2570 2572
2571 #define ASM_OUTPUT_LABELREF(FILE,NAME) \ 2573 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
2572 if (strcmp (NAME, "..CURRENT_FUNCTION") == 0) \ 2574 do { \
2573 asm_fprintf ((FILE), "%U%s", \ 2575 if (strcmp (NAME, "..CURRENT_FUNCTION") == 0) \
2574 XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); \ 2576 asm_fprintf ((FILE), "%U%s", \
2575 else \ 2577 XSTR (XEXP (DECL_RTL (current_function_decl), \
2576 asm_fprintf ((FILE), "%U%s", (NAME)) 2578 0), 0)); \
2579 else \
2580 asm_fprintf ((FILE), "%U%s", (NAME)); \
2581 } while (0)
2577 2582
2578 /* Flag to mark a function decl symbol that requires a long call. */ 2583 /* Flag to mark a function decl symbol that requires a long call. */
2579 #define SYMBOL_FLAG_LONG_CALL (SYMBOL_FLAG_MACH_DEP << 0) 2584 #define SYMBOL_FLAG_LONG_CALL (SYMBOL_FLAG_MACH_DEP << 0)
2580 #define SYMBOL_REF_LONG_CALL_P(X) \ 2585 #define SYMBOL_REF_LONG_CALL_P(X) \
2581 ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_LONG_CALL) != 0) 2586 ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_LONG_CALL) != 0)
2953 { \ 2958 { \
2954 ASM_OUTPUT_ALIGN ((STREAM), 2); \ 2959 ASM_OUTPUT_ALIGN ((STREAM), 2); \
2955 if (JUMP_TABLES_IN_TEXT_SECTION) \ 2960 if (JUMP_TABLES_IN_TEXT_SECTION) \
2956 mips_set_text_contents_type (STREAM, "__jump_", NUM, FALSE); \ 2961 mips_set_text_contents_type (STREAM, "__jump_", NUM, FALSE); \
2957 } \ 2962 } \
2958 while (0); 2963 while (0)
2959 2964
2960 /* Reset text marking to code after an inline jump table. Like with 2965 /* Reset text marking to code after an inline jump table. Like with
2961 the beginning of a jump table use the label number to keep symbols 2966 the beginning of a jump table use the label number to keep symbols
2962 unique. */ 2967 unique. */
2963 2968
2964 #define ASM_OUTPUT_CASE_END(STREAM, NUM, TABLE) \ 2969 #define ASM_OUTPUT_CASE_END(STREAM, NUM, TABLE) \
2965 do \ 2970 do \
2966 if (JUMP_TABLES_IN_TEXT_SECTION) \ 2971 if (JUMP_TABLES_IN_TEXT_SECTION) \
2967 mips_set_text_contents_type (STREAM, "__jend_", NUM, TRUE); \ 2972 mips_set_text_contents_type (STREAM, "__jend_", NUM, TRUE); \
2968 while (0); 2973 while (0)
2969 2974
2970 /* This is how to output an assembler line 2975 /* This is how to output an assembler line
2971 that says to advance the location counter 2976 that says to advance the location counter
2972 to a multiple of 2**LOG bytes. */ 2977 to a multiple of 2**LOG bytes. */
2973 2978
3399 3404
3400 /* Load store bonding is not supported by micromips and fix_24k. The 3405 /* Load store bonding is not supported by micromips and fix_24k. The
3401 performance can be degraded for those targets. Hence, do not bond for 3406 performance can be degraded for those targets. Hence, do not bond for
3402 micromips or fix_24k. */ 3407 micromips or fix_24k. */
3403 #define ENABLE_LD_ST_PAIRS \ 3408 #define ENABLE_LD_ST_PAIRS \
3404 (TARGET_LOAD_STORE_PAIRS && (TUNE_P5600 || TUNE_I6400) \ 3409 (TARGET_LOAD_STORE_PAIRS \
3410 && (TUNE_P5600 || TUNE_I6400 || TUNE_P6600) \
3405 && !TARGET_MICROMIPS && !TARGET_FIX_24K) 3411 && !TARGET_MICROMIPS && !TARGET_FIX_24K)