Mercurial > hg > CbC > CbC_gcc
comparison gcc/config/mips/p6600.md @ 131:84e7813d76e9
gcc-8.2
author | mir3636 |
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date | Thu, 25 Oct 2018 07:37:49 +0900 |
parents | |
children | 1830386684a0 |
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111:04ced10e8804 | 131:84e7813d76e9 |
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1 ;; DFA-based pipeline description for P6600. | |
2 ;; | |
3 ;; Copyright (C) 2018 Free Software Foundation, Inc. | |
4 ;; | |
5 ;; This file is part of GCC. | |
6 ;; | |
7 ;; GCC is free software; you can redistribute it and/or modify it | |
8 ;; under the terms of the GNU General Public License as published | |
9 ;; by the Free Software Foundation; either version 3, or (at your | |
10 ;; option) any later version. | |
11 | |
12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT | |
13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
15 ;; License for more details. | |
16 | |
17 ;; You should have received a copy of the GNU General Public License | |
18 ;; along with GCC; see the file COPYING3. If not see | |
19 ;; <http://www.gnu.org/licenses/>. | |
20 | |
21 (define_automaton "p6600_agen_alq_pipe, p6600_mdu_pipe, p6600_fpu_pipe") | |
22 | |
23 ;; The address generation queue (AGQ) has AL2, CTISTD and LDSTA pipes | |
24 (define_cpu_unit "p6600_agq, p6600_al2, p6600_ctistd, p6600_lsu" | |
25 "p6600_agen_alq_pipe") | |
26 | |
27 (define_cpu_unit "p6600_gpmul, p6600_gpdiv" "p6600_mdu_pipe") | |
28 | |
29 ;; The arithmetic-logic-unit queue (ALQ) has ALU pipe | |
30 (define_cpu_unit "p6600_alq, p6600_alu" "p6600_agen_alq_pipe") | |
31 | |
32 ;; The floating-point-unit queue (FPQ) has short and long pipes | |
33 (define_cpu_unit "p6600_fpu_short, p6600_fpu_long" "p6600_fpu_pipe") | |
34 | |
35 ;; Short FPU pipeline. | |
36 (define_cpu_unit "p6600_fpu_intadd, p6600_fpu_cmp, p6600_fpu_float, | |
37 p6600_fpu_logic_a, p6600_fpu_logic_b, p6600_fpu_div, | |
38 p6600_fpu_store" "p6600_fpu_pipe") | |
39 | |
40 ;; Long FPU pipeline. | |
41 (define_cpu_unit "p6600_fpu_logic, p6600_fpu_float_a, p6600_fpu_float_b, | |
42 p6600_fpu_float_c, p6600_fpu_float_d" "p6600_fpu_pipe") | |
43 (define_cpu_unit "p6600_fpu_mult, p6600_fpu_fdiv, p6600_fpu_apu" "p6600_fpu_pipe") | |
44 | |
45 (define_reservation "p6600_agq_al2" "p6600_agq, p6600_al2") | |
46 (define_reservation "p6600_agq_ctistd" "p6600_agq, p6600_ctistd") | |
47 (define_reservation "p6600_agq_lsu" "p6600_agq, p6600_lsu") | |
48 (define_reservation "p6600_alq_alu" "p6600_alq, p6600_alu") | |
49 | |
50 ;; | |
51 ;; FPU-MSA pipe | |
52 ;; | |
53 | |
54 ;; Arithmetic | |
55 ;; add, hadd, sub, hsub, average, min, max, compare | |
56 (define_insn_reservation "p6600_msa_short_int_add" 2 | |
57 (and (eq_attr "cpu" "p6600") | |
58 (eq_attr "type" "simd_int_arith")) | |
59 "p6600_fpu_short, p6600_fpu_intadd") | |
60 | |
61 ;; Bitwise Instructions | |
62 ;; and, or, xor, bit-clear, leading-bits-count, shift, shuffle | |
63 (define_insn_reservation "p6600_msa_short_logic" 2 | |
64 (and (eq_attr "cpu" "p6600") | |
65 (eq_attr "type" "simd_shift,simd_bit,simd_splat,simd_fill,simd_shf, | |
66 simd_permute,simd_logic")) | |
67 "p6600_fpu_short, p6600_fpu_logic_a") | |
68 | |
69 ;; move.v | |
70 (define_insn_reservation "p6600_msa_short_logic_move_v" 2 | |
71 (and (eq_attr "cpu" "p6600") | |
72 (eq_attr "type" "simd_move")) | |
73 "p6600_fpu_short, p6600_fpu_logic_a") | |
74 | |
75 ;; Float compare | |
76 (define_insn_reservation "p6600_msa_short_cmp" 2 | |
77 (and (eq_attr "cpu" "p6600") | |
78 (eq_attr "type" "simd_fcmp")) | |
79 "p6600_fpu_short, p6600_fpu_cmp") | |
80 | |
81 ;; Float exp2, min, max | |
82 (define_insn_reservation "p6600_msa_short_float2" 2 | |
83 (and (eq_attr "cpu" "p6600") | |
84 (eq_attr "type" "simd_fexp2,simd_fminmax")) | |
85 "p6600_fpu_short, p6600_fpu_float") | |
86 | |
87 ;; Vector sat | |
88 (define_insn_reservation "p6600_msa_short_logic3" 3 | |
89 (and (eq_attr "cpu" "p6600") | |
90 (eq_attr "type" "simd_sat,simd_pcnt")) | |
91 "p6600_fpu_short, p6600_fpu_logic_a, p6600_fpu_logic_b") | |
92 | |
93 ;; Vector copy, bz, bnz | |
94 (define_insn_reservation "p6600_msa_short_store4" 4 | |
95 (and (eq_attr "cpu" "p6600") | |
96 (eq_attr "type" "simd_copy,simd_branch,simd_cmsa")) | |
97 "p6600_fpu_short, p6600_fpu_store") | |
98 | |
99 ;; Vector load | |
100 (define_insn_reservation "p6600_msa_load" 8 | |
101 (and (eq_attr "cpu" "p6600") | |
102 (eq_attr "type" "simd_load")) | |
103 "p6600_agq_lsu") | |
104 | |
105 ;; Vector store | |
106 (define_insn_reservation "p6600_msa_short_store" 1 | |
107 (and (eq_attr "cpu" "p6600") | |
108 (eq_attr "type" "simd_store")) | |
109 "p6600_agq_lsu") | |
110 | |
111 ;; binsl, binsr, insert, vshf, sld | |
112 (define_insn_reservation "p6600_msa_long_logic" 2 | |
113 (and (eq_attr "cpu" "p6600") | |
114 (eq_attr "type" "simd_bitins,simd_bitmov,simd_insert,simd_sld")) | |
115 "p6600_fpu_long, p6600_fpu_logic") | |
116 | |
117 ;; Float fclass, flog2 | |
118 (define_insn_reservation "p6600_msa_long_float2" 2 | |
119 (and (eq_attr "cpu" "p6600") | |
120 (eq_attr "type" "simd_fclass,simd_flog2")) | |
121 "p6600_fpu_long, p6600_fpu_float_a") | |
122 | |
123 ;; fadd, fsub | |
124 (define_insn_reservation "p6600_msa_long_float4" 4 | |
125 (and (eq_attr "cpu" "p6600") | |
126 (eq_attr "type" "simd_fadd,simd_fcvt")) | |
127 "p6600_fpu_long, p6600_fpu_float_a, p6600_fpu_float_b") | |
128 | |
129 ;; fmul | |
130 (define_insn_reservation "p6600_msa_long_float5" 5 | |
131 (and (eq_attr "cpu" "p6600") | |
132 (eq_attr "type" "simd_fmul")) | |
133 "p6600_fpu_long, p6600_fpu_float_a, p6600_fpu_float_b, p6600_fpu_float_c") | |
134 | |
135 ;; fmadd, fmsub | |
136 (define_insn_reservation "p6600_msa_long_float8" 8 | |
137 (and (eq_attr "cpu" "p6600") | |
138 (eq_attr "type" "simd_fmadd")) | |
139 "p6600_fpu_long, p6600_fpu_float_a, | |
140 p6600_fpu_float_b, p6600_fpu_float_c, p6600_fpu_float_d") | |
141 | |
142 ;; Vector mul, dotp, madd, msub | |
143 (define_insn_reservation "p6600_msa_long_mult" 5 | |
144 (and (eq_attr "cpu" "p6600") | |
145 (eq_attr "type" "simd_mul")) | |
146 "p6600_fpu_long, p6600_fpu_mult") | |
147 | |
148 ;; fdiv, fmod (semi-pipelined) | |
149 (define_insn_reservation "p6600_msa_long_fdiv" 10 | |
150 (and (eq_attr "cpu" "p6600") | |
151 (eq_attr "type" "simd_fdiv")) | |
152 "p6600_fpu_long, nothing, nothing, p6600_fpu_fdiv*8") | |
153 | |
154 ;; div, mod (non-pipelined) | |
155 (define_insn_reservation "p6600_msa_long_div" 10 | |
156 (and (eq_attr "cpu" "p6600") | |
157 (eq_attr "type" "simd_div")) | |
158 "p6600_fpu_long, p6600_fpu_div*9, p6600_fpu_div + p6600_fpu_logic_a") | |
159 | |
160 ;; | |
161 ;; FPU pipe | |
162 ;; | |
163 | |
164 ;; fadd, fsub | |
165 (define_insn_reservation "p6600_fpu_fadd" 4 | |
166 (and (eq_attr "cpu" "p6600") | |
167 (eq_attr "type" "fadd")) | |
168 "p6600_fpu_long, p6600_fpu_apu") | |
169 | |
170 ;; fabs, fneg, fcmp | |
171 (define_insn_reservation "p6600_fpu_fabs" 2 | |
172 (and (eq_attr "cpu" "p6600") | |
173 (ior (eq_attr "type" "fabs,fneg,fcmp,fmove") | |
174 (and (eq_attr "type" "condmove") | |
175 (eq_attr "mode" "SF,DF")))) | |
176 "p6600_fpu_short, p6600_fpu_apu") | |
177 | |
178 ;; fload | |
179 (define_insn_reservation "p6600_fpu_fload" 8 | |
180 (and (eq_attr "cpu" "p6600") | |
181 (eq_attr "type" "fpload,fpidxload")) | |
182 "p6600_agq_lsu") | |
183 | |
184 ;; fstore | |
185 (define_insn_reservation "p6600_fpu_fstore" 1 | |
186 (and (eq_attr "cpu" "p6600") | |
187 (eq_attr "type" "fpstore,fpidxstore")) | |
188 "p6600_agq_lsu") | |
189 | |
190 ;; fmadd | |
191 (define_insn_reservation "p6600_fpu_fmadd" 8 | |
192 (and (eq_attr "cpu" "p6600") | |
193 (eq_attr "type" "fmadd")) | |
194 "p6600_fpu_long, p6600_fpu_apu") | |
195 | |
196 ;; fmul | |
197 (define_insn_reservation "p6600_fpu_fmul" 5 | |
198 (and (eq_attr "cpu" "p6600") | |
199 (eq_attr "type" "fmul")) | |
200 "p6600_fpu_long, p6600_fpu_apu") | |
201 | |
202 ;; fdiv, fsqrt | |
203 (define_insn_reservation "p6600_fpu_div" 17 | |
204 (and (eq_attr "cpu" "p6600") | |
205 (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt")) | |
206 "p6600_fpu_long, p6600_fpu_apu*17") | |
207 | |
208 ;; fcvt | |
209 (define_insn_reservation "p6600_fpu_fcvt" 4 | |
210 (and (eq_attr "cpu" "p6600") | |
211 (eq_attr "type" "fcvt")) | |
212 "p6600_fpu_long, p6600_fpu_apu") | |
213 | |
214 ;; mtc | |
215 (define_insn_reservation "p6600_fpu_fmtc" 7 | |
216 (and (eq_attr "cpu" "p6600") | |
217 (eq_attr "type" "mtc")) | |
218 "p6600_agq_lsu") | |
219 | |
220 ;; mfc | |
221 (define_insn_reservation "p6600_fpu_fmfc" 7 | |
222 (and (eq_attr "cpu" "p6600") | |
223 (eq_attr "type" "mfc")) | |
224 "p6600_agq_lsu") | |
225 | |
226 ;; | |
227 ;; Integer pipe | |
228 ;; | |
229 | |
230 ;; and | |
231 (define_insn_reservation "p6600_int_and" 1 | |
232 (and (eq_attr "cpu" "p6600") | |
233 (eq_attr "move_type" "logical")) | |
234 "p6600_alq_alu") | |
235 | |
236 ;; lui | |
237 (define_insn_reservation "p6600_int_lui" 1 | |
238 (and (eq_attr "cpu" "p6600") | |
239 (eq_attr "move_type" "const")) | |
240 "p6600_alq_alu") | |
241 | |
242 ;; Load lb, lbu, lh, lhu, lq, lw, lw_i2f, lwxs | |
243 (define_insn_reservation "p6600_int_load" 4 | |
244 (and (eq_attr "cpu" "p6600") | |
245 (eq_attr "type" "load")) | |
246 "p6600_agq_lsu") | |
247 | |
248 ;; store | |
249 (define_insn_reservation "p6600_int_store" 3 | |
250 (and (eq_attr "cpu" "p6600") | |
251 (eq_attr "type" "store")) | |
252 "p6600_agq_lsu") | |
253 | |
254 ;; andi, sll, srl, seb, seh | |
255 (define_insn_reservation "p6600_int_arith_1" 1 | |
256 (and (eq_attr "cpu" "p6600") | |
257 (eq_attr "move_type" "andi,sll0,signext")) | |
258 "p6600_alq_alu | p6600_agq_al2") | |
259 | |
260 ;; addi, addiu, ori, xori, add, addu | |
261 (define_insn_reservation "p6600_int_arith_2" 1 | |
262 (and (eq_attr "cpu" "p6600") | |
263 (eq_attr "alu_type" "add,or,xor")) | |
264 "p6600_alq_alu | p6600_agq_al2") | |
265 | |
266 ;; nor, sub | |
267 (define_insn_reservation "p6600_int_arith_3" 1 | |
268 (and (eq_attr "cpu" "p6600") | |
269 (eq_attr "alu_type" "and,not,nor,sub")) | |
270 "p6600_alq_alu") | |
271 | |
272 ;; srl, sra, rotr, slt, sllv, srlv | |
273 (define_insn_reservation "p6600_int_arith_4" 1 | |
274 (and (eq_attr "cpu" "p6600") | |
275 (eq_attr "type" "shift,slt,move")) | |
276 "p6600_alq_alu | p6600_agq_al2") | |
277 | |
278 ;; nop | |
279 (define_insn_reservation "p6600_int_nop" 0 | |
280 (and (eq_attr "cpu" "p6600") | |
281 (eq_attr "type" "nop")) | |
282 "p6600_alq_alu | p6600_agq_al2") | |
283 | |
284 ;; clo, clz | |
285 (define_insn_reservation "p6600_int_countbits" 2 | |
286 (and (eq_attr "cpu" "p6600") | |
287 (eq_attr "type" "clz")) | |
288 "p6600_agq_al2") | |
289 | |
290 ;; Conditional moves | |
291 (define_insn_reservation "p6600_int_condmove" 2 | |
292 (and (eq_attr "cpu" "p6600") | |
293 (eq_attr "type" "condmove")) | |
294 "p6600_agq_al2") | |
295 | |
296 ;; mfhi/lo | |
297 (define_insn_reservation "p6600_dsp_mfhilo" 5 | |
298 (and (eq_attr "cpu" "p6600") | |
299 (eq_attr "type" "mfhi,mflo")) | |
300 "p6600_agq_lsu") | |
301 | |
302 ;; mthi/lo | |
303 (define_insn_reservation "p6600_dsp_mthilo" 5 | |
304 (and (eq_attr "cpu" "p6600") | |
305 (eq_attr "type" "mthi,mtlo")) | |
306 "p6600_agq_lsu") | |
307 | |
308 ;; mul, mulu, muh, muhu | |
309 (define_insn_reservation "p6600_dsp_mult" 4 | |
310 (and (eq_attr "cpu" "p6600") | |
311 (eq_attr "type" "imul3,imul,imul3nc")) | |
312 "p6600_gpmul") | |
313 | |
314 ;; branch and jump | |
315 (define_insn_reservation "p6600_int_branch" 1 | |
316 (and (eq_attr "cpu" "p6600") | |
317 (eq_attr "type" "branch,jump")) | |
318 "p6600_agq_ctistd") | |
319 | |
320 ;; prefetch | |
321 (define_insn_reservation "p6600_int_prefetch" 0 | |
322 (and (eq_attr "cpu" "p6600") | |
323 (eq_attr "type" "prefetch,prefetchx")) | |
324 "p6600_agq_lsu") | |
325 | |
326 ;; divide | |
327 (define_insn_reservation "p6600_int_div" 8 | |
328 (and (eq_attr "cpu" "p6600") | |
329 (eq_attr "type" "idiv,idiv3")) | |
330 "p6600_gpdiv*5") | |
331 | |
332 ;; arith | |
333 (define_insn_reservation "p6600_int_arith_5" 2 | |
334 (and (eq_attr "cpu" "p6600") | |
335 (eq_attr "type" "arith")) | |
336 "p6600_agq_al2") | |
337 | |
338 ;; call | |
339 (define_insn_reservation "p6600_int_call" 2 | |
340 (and (eq_attr "cpu" "p6600") | |
341 (eq_attr "jal" "indirect,direct")) | |
342 "p6600_agq_ctistd") |