CbC/CbC_gcc: gcc/config/nios2/nios2.c comparison

comparison gcc/config/nios2/nios2.c @ 131:84e7813d76e9

gcc-8.2

author	mir3636
date	Thu, 25 Oct 2018 07:37:49 +0900
parents	04ced10e8804
children	1830386684a0

comparison

equal deleted inserted replaced

-:04ced10e8804
+:84e7813d76e9
 /* Target machine subroutines for Altera Nios II.
-Copyright (C) 2012-2017 Free Software Foundation, Inc.
+Copyright (C) 2012-2018 Free Software Foundation, Inc.
 Contributed by Jonah Graham (jgraham@altera.com),
 Will Reece (wreece@altera.com), and Jeff DaSilva (jdasilva@altera.com).
 Contributed by Mentor Graphics, Inc.
 This file is part of GCC.
 License for more details.
 You should have received a copy of the GNU General Public License
 along with GCC; see the file COPYING3.  If not see
 <http://www.gnu.org/licenses/>.  */
+#define IN_TARGET_CODE 1
 #include "config.h"
 #include "system.h"
 #include "coretypes.h"
 #include "backend.h"
 /* Set OFFSET to the offset from the stack pointer.  */
 switch (from)
 {
 case FRAME_POINTER_REGNUM:
-offset = cfun->machine->args_size;
+/* This is the high end of the local variable storage, not the
+	 hard frame pointer.  */
+offset = cfun->machine->args_size + cfun->machine->var_size;
 break;
 case ARG_POINTER_REGNUM:
 offset = cfun->machine->total_size;
 offset -= crtl->args.pretend_args_size;
 static void
 nios2_handle_custom_fpu_insn_option (int fpu_insn_index)
 {
 int param = N2FPU_N (fpu_insn_index);
-if (0 <= param && param <= 255)
+if (param >= 0 && param <= 255)
 nios2_register_custom_code (param, CCS_FPU, fpu_insn_index);
 /* Valid values are 0-255, but also allow -1 so that the
 -mno-custom-<opt> switches work.  */
 else if (param != -1)
 }
 /* Addressing modes and constants.  */
-/* Symbolic constants are split into high/lo_sum pairs during the
+/* Symbol references and other 32-bit constants are split into
-split1 pass.  After that, they are not considered legitimate addresses.
+high/lo_sum pairs during the split1 pass.  After that, they are not
+considered legitimate addresses.
 This function returns true if in a pre-split context where these
 constants are allowed.  */
 static bool
-nios2_symbolic_constant_allowed (void)
+nios2_large_constant_allowed (void)
 {
 /* The reload_completed check is for the benefit of
 nios2_asm_output_mi_thunk and perhaps other places that try to
 emulate a post-reload pass.  */
 return !(cfun->curr_properties & PROP_rtl_split_insns) && !reload_completed;
 }
 return false;
 }
 /* Return true if X is an expression of the form
-(PLUS reg symbolic_constant).  */
+(PLUS reg large_constant).  */
 static bool
-nios2_plus_symbolic_constant_p (rtx x)
+nios2_plus_large_constant_p (rtx x)
 {
 return (GET_CODE (x) == PLUS
 	  && REG_P (XEXP (x, 0))
-	  && nios2_symbolic_constant_p (XEXP (x, 1)));
+	  && nios2_large_constant_p (XEXP (x, 1)));
 }
 /* Implement TARGET_LEGITIMATE_CONSTANT_P.  */
 static bool
 nios2_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
 base = SUBREG_REG (base);
 return (REG_P (base)
 	  && nios2_regno_ok_for_base_p (REGNO (base), strict_p)
 	  && (offset == NULL_RTX
 	      || nios2_valid_addr_offset_p (offset)
-	      || (nios2_symbolic_constant_allowed ()
+	      || (nios2_large_constant_allowed ()
 		  && nios2_symbolic_constant_p (offset))
 	      || nios2_unspec_reloc_p (offset)));
 }
 /* Implement TARGET_LEGITIMATE_ADDRESS_P.  */
 if (gprel_constant_p (operand) || r0rel_constant_p (operand))
 	return true;
 /* Else, fall through.  */
 case LABEL_REF:
-if (nios2_symbolic_constant_allowed ()
+if (nios2_large_constant_allowed ()
 	  && nios2_symbolic_constant_p (operand))
 	return true;
+return false;
-/* Else, fall through.  */
 case CONST_INT:
+if (r0rel_constant_p (operand))
+	return true;
+return nios2_large_constant_allowed ();
 case CONST_DOUBLE:
 return false;
 /* Register indirect.  */
 case REG:
 nios2_address_cost (rtx address,
 		    machine_mode mode ATTRIBUTE_UNUSED,
 		    addr_space_t as ATTRIBUTE_UNUSED,
 		    bool speed ATTRIBUTE_UNUSED)
 {
-if (nios2_plus_symbolic_constant_p (address))
+if (nios2_plus_large_constant_p (address))
 return COSTS_N_INSNS (1);
-if (nios2_symbolic_constant_p (address))
+if (nios2_large_constant_p (address))
 {
 if (GET_CODE (address) == CONST)
 	return COSTS_N_INSNS (1);
 else
 	return COSTS_N_INSNS (0);
 }
 return COSTS_N_INSNS (0);
 }
-/* Return true if X is a MEM whose address expression involves a symbolic
+/* Return true if X is a MEM whose address expression involves a large (32-bit)
 constant.  */
 bool
-nios2_symbolic_memory_operand_p (rtx x)
+nios2_large_constant_memory_operand_p (rtx x)
 {
 rtx addr;
 if (GET_CODE (x) != MEM)
 return false;
 addr = XEXP (x, 0);
-return (nios2_symbolic_constant_p (addr)
+return (nios2_large_constant_p (addr)
-	  || nios2_plus_symbolic_constant_p (addr));
+	  || nios2_plus_large_constant_p (addr));
 }
 /* Return true if X is something that needs to be split into a
 high/lo_sum pair.  */
 bool
 nios2_large_constant_p (rtx x)
 {
 return (nios2_symbolic_constant_p (x)
-	  || nios2_large_unspec_reloc_p (x));
+	  || nios2_large_unspec_reloc_p (x)
+	  || (CONST_INT_P (x) && !SMALL_INT (INTVAL (x))));
 }
 /* Given an RTX X that satisfies nios2_large_constant_p, split it into
 high and lo_sum parts using TEMP as a scratch register.  Emit the high
-instruction and return the lo_sum expression.  */
+instruction and return the lo_sum expression.
+Also handle special cases involving constant integers.  */
 rtx
 nios2_split_large_constant (rtx x, rtx temp)
 {
+if (CONST_INT_P (x))
+{
+HOST_WIDE_INT val = INTVAL (x);
+if (SMALL_INT (val))
+	return x;
+else if (SMALL_INT_UNSIGNED (val) || UPPER16_INT (val))
+	{
+	  emit_move_insn (temp, x);
+	  return temp;
+	}
+else
+	{
+	  HOST_WIDE_INT high = (val + 0x8000) & ~0xffff;
+	  HOST_WIDE_INT low = val - high;
+	  emit_move_insn (temp, gen_int_mode (high, Pmode));
+	  return gen_rtx_PLUS (Pmode, temp, gen_int_mode (low, Pmode));
+	}
+}
 emit_insn (gen_rtx_SET (temp, gen_rtx_HIGH (Pmode, copy_rtx (x))));
 return gen_rtx_LO_SUM (Pmode, temp, copy_rtx (x));
 }
 /* Split an RTX of the form
 emit_insn (gen_rtx_SET (temp, gen_rtx_HIGH (Pmode, copy_rtx (op1))));
 emit_insn (gen_rtx_SET (temp, gen_rtx_PLUS (Pmode, op0, temp)));
 return gen_rtx_LO_SUM (Pmode, temp, copy_rtx (op1));
 }
-/* Given a MEM OP with an address that includes a splittable symbol,
+/* Given a MEM OP with an address that includes a splittable symbol or
-emit some instructions to do the split and return a new MEM.  */
+other large constant, emit some instructions to do the split and
+return a new MEM.  */
 rtx
-nios2_split_symbolic_memory_operand (rtx op)
+nios2_split_large_constant_memory_operand (rtx op)
 {
 rtx addr = XEXP (op, 0);
-if (nios2_symbolic_constant_p (addr))
+if (nios2_large_constant_p (addr))
 addr = nios2_split_large_constant (addr, gen_reg_rtx (Pmode));
-else if (nios2_plus_symbolic_constant_p (addr))
+else if (nios2_plus_large_constant_p (addr))
 addr = nios2_split_plus_large_constant (XEXP (addr, 0), XEXP (addr, 1));
 else
 gcc_unreachable ();
 return replace_equiv_address (op, addr, false);
 }
 if (nios2_tls_symbol_p (base))
 base = nios2_legitimize_tls_address (base);
 else if (flag_pic)
 base = nios2_load_pic_address (base, UNSPEC_PIC_SYM, NULL_RTX);
-else if (!nios2_symbolic_constant_allowed ()
+else if (!nios2_large_constant_allowed ()
 	   && nios2_symbolic_constant_p (addr))
 return nios2_split_large_constant (addr, gen_reg_rtx (Pmode));
+else if (CONST_INT_P (addr))
+{
+HOST_WIDE_INT val = INTVAL (addr);
+if (SMALL_INT (val))
+	/* Use r0-relative addressing.  */
+	return addr;
+else if (!nios2_large_constant_allowed ())
+	/* Split into high/lo pair.  */
+	return nios2_split_large_constant (addr, gen_reg_rtx (Pmode));
+}
 else
 return addr;
 if (offset != const0_rtx)
 {
 return gen_rtx_PLUS (Pmode, force_reg (Pmode, op0), copy_rtx (op1));
 /* We may need to split symbolic constants now.  */
 else if (nios2_symbolic_constant_p (op1))
 {
-if (nios2_symbolic_constant_allowed ())
+if (nios2_large_constant_allowed ())
 	return gen_rtx_PLUS (Pmode, force_reg (Pmode, op0), copy_rtx (op1));
 else
 	return nios2_split_plus_large_constant (op0, op1);
 }
 else if (nios2_large_constant_p (from))
 	/* This case covers either a regular symbol reference or an UNSPEC
 	   representing a 32-bit offset.  We split the former
 	   only conditionally and the latter always.  */
 	{
-	  if (!nios2_symbolic_constant_allowed ()
+	  if (!nios2_large_constant_allowed ()
 	      || nios2_large_unspec_reloc_p (from))
 	    {
 	      rtx lo = nios2_split_large_constant (from, to);
 	      emit_insn (gen_rtx_SET (to, lo));
 	      set_unique_reg_note (get_last_insn (), REG_EQUAL,
 && nios2_symbol_ref_in_r0rel_data_p (op))
 return true;
 else if (GET_CODE (op) == CONST
 && GET_CODE (XEXP (op, 0)) == PLUS)
 return r0rel_constant_p (XEXP (XEXP (op, 0), 0));
+else if (GET_CODE (op) == CONST_INT
+	   && SMALL_INT (INTVAL (op)))
+return true;
 return false;
 }
 /* Return the name string for a supported unspec reloc offset.  */
 fprintf (file, ")(%s)", reg_names[GP_REGNO]);
 return;
 }
 else if (r0rel_constant_p (op))
 {
-fprintf (file, "%%lo(");
+	  if (CONST_INT_P (op))
-output_addr_const (file, op);
+	    {
-fprintf (file, ")(r0)");
+	      output_addr_const (file, op);
-return;
+	      fprintf (file, "(r0)");
-}
+	      return;
+	    }
+	  else
+	    {
+	      fprintf (file, "%%lo(");
+	      output_addr_const (file, op);
+	      fprintf (file, ")(r0)");
+	      return;
+	    }
+	}
 break;
 case PLUS:
 {
 rtx op0 = XEXP (op, 0);
 stw.n, ldwsp.n, or stwsp.n instruction.  */
 static bool
 can_use_cdx_ldstw (int regno, int basereg, int offset)
 {
 if (CDX_REG_P (regno) && CDX_REG_P (basereg)
-&& (offset & 0x3) == 0 && 0 <= offset && offset < 0x40)
+&& (offset & 0x3) == 0 && offset >= 0 && offset < 0x40)
 return true;
 else if (basereg == SP_REGNO
 	   && offset >= 0 && offset < 0x80 && (offset & 0x3) == 0)
 return true;
 return false;
 nios2_label_align (rtx label)
 {
 int n = CODE_LABEL_NUMBER (label);
 if (label_align && n >= min_labelno && n <= max_labelno)
-return MAX (label_align[n - min_labelno], align_labels_log);
+return MAX (label_align[n - min_labelno], align_labels.levels[0].log);
-return align_labels_log;
+return align_labels.levels[0].log;
 }
 /* Implement ADJUST_REG_ALLOC_ORDER.  We use the default ordering
 for R1 and non-CDX R2 code; for CDX we tweak thing to prefer
 the registers that can be used as operands to instructions that
 #define TARGET_MACHINE_DEPENDENT_REORG nios2_reorg
 #undef TARGET_CONSTANT_ALIGNMENT
 #define TARGET_CONSTANT_ALIGNMENT constant_alignment_word_strings
+#undef TARGET_HAVE_SPECULATION_SAFE_VALUE
+#define TARGET_HAVE_SPECULATION_SAFE_VALUE speculation_safe_value_not_needed
 struct gcc_target targetm = TARGET_INITIALIZER;
 #include "gt-nios2.h"

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comparison gcc/config/nios2/nios2.c @ 131:84e7813d76e9