Mercurial > hg > CbC > CbC_gcc

comparison gcc/config/pa/pa.c @ 131:84e7813d76e9

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
gcc-8.2
author mir3636
date Thu, 25 Oct 2018 07:37:49 +0900
parents 04ced10e8804
children 1830386684a0
comparison
equal deleted inserted replaced
111:04ced10e8804 131:84e7813d76e9
1 /* Subroutines for insn-output.c for HPPA. 1 /* Subroutines for insn-output.c for HPPA.
2 Copyright (C) 1992-2017 Free Software Foundation, Inc. 2 Copyright (C) 1992-2018 Free Software Foundation, Inc.
3 Contributed by Tim Moore (moore@cs.utah.edu), based on sparc.c 3 Contributed by Tim Moore (moore@cs.utah.edu), based on sparc.c
4 4
5 This file is part of GCC. 5 This file is part of GCC.
6 6
7 GCC is free software; you can redistribute it and/or modify 7 GCC is free software; you can redistribute it and/or modify
15 GNU General Public License for more details. 15 GNU General Public License for more details.
16 16
17 You should have received a copy of the GNU General Public License 17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see 18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */ 19 <http://www.gnu.org/licenses/>. */
20
21 #define IN_TARGET_CODE 1
20 22
21 #include "config.h" 23 #include "config.h"
22 #include "system.h" 24 #include "system.h"
23 #include "coretypes.h" 25 #include "coretypes.h"
24 #include "memmodel.h" 26 #include "memmodel.h"
118 static bool pa_function_value_regno_p (const unsigned int); 120 static bool pa_function_value_regno_p (const unsigned int);
119 static void pa_output_function_prologue (FILE *); 121 static void pa_output_function_prologue (FILE *);
120 static void update_total_code_bytes (unsigned int); 122 static void update_total_code_bytes (unsigned int);
121 static void pa_output_function_epilogue (FILE *); 123 static void pa_output_function_epilogue (FILE *);
122 static int pa_adjust_cost (rtx_insn *, int, rtx_insn *, int, unsigned int); 124 static int pa_adjust_cost (rtx_insn *, int, rtx_insn *, int, unsigned int);
123 static int pa_adjust_priority (rtx_insn *, int);
124 static int pa_issue_rate (void); 125 static int pa_issue_rate (void);
125 static int pa_reloc_rw_mask (void); 126 static int pa_reloc_rw_mask (void);
126 static void pa_som_asm_init_sections (void) ATTRIBUTE_UNUSED; 127 static void pa_som_asm_init_sections (void) ATTRIBUTE_UNUSED;
127 static section *pa_som_tm_clone_table_section (void) ATTRIBUTE_UNUSED; 128 static section *pa_som_tm_clone_table_section (void) ATTRIBUTE_UNUSED;
128 static section *pa_select_section (tree, int, unsigned HOST_WIDE_INT) 129 static section *pa_select_section (tree, int, unsigned HOST_WIDE_INT)
276 #undef TARGET_LEGITIMIZE_ADDRESS 277 #undef TARGET_LEGITIMIZE_ADDRESS
277 #define TARGET_LEGITIMIZE_ADDRESS hppa_legitimize_address 278 #define TARGET_LEGITIMIZE_ADDRESS hppa_legitimize_address
278 279
279 #undef TARGET_SCHED_ADJUST_COST 280 #undef TARGET_SCHED_ADJUST_COST
280 #define TARGET_SCHED_ADJUST_COST pa_adjust_cost 281 #define TARGET_SCHED_ADJUST_COST pa_adjust_cost
281 #undef TARGET_SCHED_ADJUST_PRIORITY
282 #define TARGET_SCHED_ADJUST_PRIORITY pa_adjust_priority
283 #undef TARGET_SCHED_ISSUE_RATE 282 #undef TARGET_SCHED_ISSUE_RATE
284 #define TARGET_SCHED_ISSUE_RATE pa_issue_rate 283 #define TARGET_SCHED_ISSUE_RATE pa_issue_rate
285 284
286 #undef TARGET_ENCODE_SECTION_INFO 285 #undef TARGET_ENCODE_SECTION_INFO
287 #define TARGET_ENCODE_SECTION_INFO pa_encode_section_info 286 #define TARGET_ENCODE_SECTION_INFO pa_encode_section_info
423 #undef TARGET_CONSTANT_ALIGNMENT 422 #undef TARGET_CONSTANT_ALIGNMENT
424 #define TARGET_CONSTANT_ALIGNMENT constant_alignment_word_strings 423 #define TARGET_CONSTANT_ALIGNMENT constant_alignment_word_strings
425 424
426 #undef TARGET_STARTING_FRAME_OFFSET 425 #undef TARGET_STARTING_FRAME_OFFSET
427 #define TARGET_STARTING_FRAME_OFFSET pa_starting_frame_offset 426 #define TARGET_STARTING_FRAME_OFFSET pa_starting_frame_offset
427
428 #undef TARGET_HAVE_SPECULATION_SAFE_VALUE
429 #define TARGET_HAVE_SPECULATION_SAFE_VALUE speculation_safe_value_not_needed
428 430
429 struct gcc_target targetm = TARGET_INITIALIZER; 431 struct gcc_target targetm = TARGET_INITIALIZER;
430 432
431 /* Parse the -mfixed-range= option string. */ 433 /* Parse the -mfixed-range= option string. */
432 434
1746 XEXP (XEXP (op1, 0), 0), 1748 XEXP (XEXP (op1, 0), 0),
1747 scratch_reg)); 1749 scratch_reg));
1748 } 1750 }
1749 else 1751 else
1750 emit_move_insn (scratch_reg, XEXP (op1, 0)); 1752 emit_move_insn (scratch_reg, XEXP (op1, 0));
1751 emit_insn (gen_rtx_SET (operand0, 1753 op1 = replace_equiv_address (op1, scratch_reg);
1752 replace_equiv_address (op1, scratch_reg)));
1753 return 1;
1754 } 1754 }
1755 } 1755 }
1756 else if ((!INT14_OK_STRICT && symbolic_memory_operand (op1, VOIDmode)) 1756 else if ((!INT14_OK_STRICT && symbolic_memory_operand (op1, VOIDmode))
1757 || IS_LO_SUM_DLT_ADDR_P (XEXP (op1, 0)) 1757 || IS_LO_SUM_DLT_ADDR_P (XEXP (op1, 0))
1758 || IS_INDEX_ADDR_P (XEXP (op1, 0))) 1758 || IS_INDEX_ADDR_P (XEXP (op1, 0)))
1759 { 1759 {
1760 /* Load memory address into SCRATCH_REG. */ 1760 /* Load memory address into SCRATCH_REG. */
1761 scratch_reg = force_mode (word_mode, scratch_reg); 1761 scratch_reg = force_mode (word_mode, scratch_reg);
1762 emit_move_insn (scratch_reg, XEXP (op1, 0)); 1762 emit_move_insn (scratch_reg, XEXP (op1, 0));
1763 emit_insn (gen_rtx_SET (operand0, 1763 op1 = replace_equiv_address (op1, scratch_reg);
1764 replace_equiv_address (op1, scratch_reg))); 1764 }
1765 return 1; 1765 emit_insn (gen_rtx_SET (operand0, op1));
1766 } 1766 return 1;
1767 } 1767 }
1768 else if (scratch_reg 1768 else if (scratch_reg
1769 && FP_REG_P (operand1) 1769 && FP_REG_P (operand1)
1770 && (MEM_P (operand0) 1770 && (MEM_P (operand0)
1771 || (GET_CODE (operand0) == SUBREG 1771 || (GET_CODE (operand0) == SUBREG
1799 XEXP (XEXP (op0, 0), 0), 1799 XEXP (XEXP (op0, 0), 0),
1800 scratch_reg)); 1800 scratch_reg));
1801 } 1801 }
1802 else 1802 else
1803 emit_move_insn (scratch_reg, XEXP (op0, 0)); 1803 emit_move_insn (scratch_reg, XEXP (op0, 0));
1804 emit_insn (gen_rtx_SET (replace_equiv_address (op0, scratch_reg), 1804 op0 = replace_equiv_address (op0, scratch_reg);
1805 operand1));
1806 return 1;
1807 } 1805 }
1808 } 1806 }
1809 else if ((!INT14_OK_STRICT && symbolic_memory_operand (op0, VOIDmode)) 1807 else if ((!INT14_OK_STRICT && symbolic_memory_operand (op0, VOIDmode))
1810 || IS_LO_SUM_DLT_ADDR_P (XEXP (op0, 0)) 1808 || IS_LO_SUM_DLT_ADDR_P (XEXP (op0, 0))
1811 || IS_INDEX_ADDR_P (XEXP (op0, 0))) 1809 || IS_INDEX_ADDR_P (XEXP (op0, 0)))
1812 { 1810 {
1813 /* Load memory address into SCRATCH_REG. */ 1811 /* Load memory address into SCRATCH_REG. */
1814 scratch_reg = force_mode (word_mode, scratch_reg); 1812 scratch_reg = force_mode (word_mode, scratch_reg);
1815 emit_move_insn (scratch_reg, XEXP (op0, 0)); 1813 emit_move_insn (scratch_reg, XEXP (op0, 0));
1816 emit_insn (gen_rtx_SET (replace_equiv_address (op0, scratch_reg), 1814 op0 = replace_equiv_address (op0, scratch_reg);
1817 operand1)); 1815 }
1818 return 1; 1816 emit_insn (gen_rtx_SET (op0, operand1));
1819 } 1817 return 1;
1820 } 1818 }
1821 /* Handle secondary reloads for loads of FP registers from constant 1819 /* Handle secondary reloads for loads of FP registers from constant
1822 expressions by forcing the constant into memory. For the most part, 1820 expressions by forcing the constant into memory. For the most part,
1823 this is only necessary for SImode and DImode. 1821 this is only necessary for SImode and DImode.
1824 1822
3767 if (DO_FRAME_NOTES && note) 3765 if (DO_FRAME_NOTES && note)
3768 RTX_FRAME_RELATED_P (insn) = 1; 3766 RTX_FRAME_RELATED_P (insn) = 1;
3769 } 3767 }
3770 3768
3771 HOST_WIDE_INT 3769 HOST_WIDE_INT
3772 pa_compute_frame_size (HOST_WIDE_INT size, int *fregs_live) 3770 pa_compute_frame_size (poly_int64 size, int *fregs_live)
3773 { 3771 {
3774 int freg_saved = 0; 3772 int freg_saved = 0;
3775 int i, j; 3773 int i, j;
3776 3774
3777 /* The code in pa_expand_prologue and pa_expand_epilogue must 3775 /* The code in pa_expand_prologue and pa_expand_epilogue must
4574 /* We use SImode for the address of the function in both 32 and 4572 /* We use SImode for the address of the function in both 32 and
4575 64-bit code to avoid having to provide DImode versions of the 4573 64-bit code to avoid having to provide DImode versions of the
4576 lcla2 and load_offset_label_address insn patterns. */ 4574 lcla2 and load_offset_label_address insn patterns. */
4577 rtx reg = gen_reg_rtx (SImode); 4575 rtx reg = gen_reg_rtx (SImode);
4578 rtx_code_label *label_rtx = gen_label_rtx (); 4576 rtx_code_label *label_rtx = gen_label_rtx ();
4579 rtx mcount = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (Pmode, "_mcount"));
4580 int reg_parm_stack_space = REG_PARM_STACK_SPACE (NULL_TREE); 4577 int reg_parm_stack_space = REG_PARM_STACK_SPACE (NULL_TREE);
4581 rtx arg_bytes, begin_label_rtx; 4578 rtx arg_bytes, begin_label_rtx, mcount, sym;
4582 rtx_insn *call_insn; 4579 rtx_insn *call_insn;
4583 char begin_label_name[16]; 4580 char begin_label_name[16];
4584 bool use_mcount_pcrel_call; 4581 bool use_mcount_pcrel_call;
4582
4583 /* Set up call destination. */
4584 sym = gen_rtx_SYMBOL_REF (Pmode, "_mcount");
4585 pa_encode_label (sym);
4586 mcount = gen_rtx_MEM (Pmode, sym);
4585 4587
4586 /* If we can reach _mcount with a pc-relative call, we can optimize 4588 /* If we can reach _mcount with a pc-relative call, we can optimize
4587 loading the address of the current function. This requires linker 4589 loading the address of the current function. This requires linker
4588 long branch stub support. */ 4590 long branch stub support. */
4589 if (!TARGET_PORTABLE_RUNTIME 4591 if (!TARGET_PORTABLE_RUNTIME
4986 return 0; 4988 return 0;
4987 4989
4988 default: 4990 default:
4989 gcc_unreachable (); 4991 gcc_unreachable ();
4990 } 4992 }
4991 }
4992
4993 /* Adjust scheduling priorities. We use this to try and keep addil
4994 and the next use of %r1 close together. */
4995 static int
4996 pa_adjust_priority (rtx_insn *insn, int priority)
4997 {
4998 rtx set = single_set (insn);
4999 rtx src, dest;
5000 if (set)
5001 {
5002 src = SET_SRC (set);
5003 dest = SET_DEST (set);
5004 if (GET_CODE (src) == LO_SUM
5005 && symbolic_operand (XEXP (src, 1), VOIDmode)
5006 && ! read_only_operand (XEXP (src, 1), VOIDmode))
5007 priority >>= 3;
5008
5009 else if (GET_CODE (src) == MEM
5010 && GET_CODE (XEXP (src, 0)) == LO_SUM
5011 && symbolic_operand (XEXP (XEXP (src, 0), 1), VOIDmode)
5012 && ! read_only_operand (XEXP (XEXP (src, 0), 1), VOIDmode))
5013 priority >>= 1;
5014
5015 else if (GET_CODE (dest) == MEM
5016 && GET_CODE (XEXP (dest, 0)) == LO_SUM
5017 && symbolic_operand (XEXP (XEXP (dest, 0), 1), VOIDmode)
5018 && ! read_only_operand (XEXP (XEXP (dest, 0), 1), VOIDmode))
5019 priority >>= 3;
5020 }
5021 return priority;
5022 } 4993 }
5023 4994
5024 /* The 700 can only issue a single insn at a time. 4995 /* The 700 can only issue a single insn at a time.
5025 The 7XXX processors can issue two insns at a time. 4996 The 7XXX processors can issue two insns at a time.
5026 The 8000 can issue 4 insns at a time. */ 4997 The 8000 can issue 4 insns at a time. */
8651 It is safe to perform a sibcall optimization when the target function 8622 It is safe to perform a sibcall optimization when the target function
8652 will never return. */ 8623 will never return. */
8653 static bool 8624 static bool
8654 pa_function_ok_for_sibcall (tree decl, tree exp ATTRIBUTE_UNUSED) 8625 pa_function_ok_for_sibcall (tree decl, tree exp ATTRIBUTE_UNUSED)
8655 { 8626 {
8656 if (TARGET_PORTABLE_RUNTIME)
8657 return false;
8658
8659 /* Sibcalls are not ok because the arg pointer register is not a fixed 8627 /* Sibcalls are not ok because the arg pointer register is not a fixed
8660 register. This prevents the sibcall optimization from occurring. In 8628 register. This prevents the sibcall optimization from occurring. In
8661 addition, there are problems with stub placement using GNU ld. This 8629 addition, there are problems with stub placement using GNU ld. This
8662 is because a normal sibcall branch uses a 17-bit relocation while 8630 is because a normal sibcall branch uses a 17-bit relocation while
8663 a regular call branch uses a 22-bit relocation. As a result, more 8631 a regular call branch uses a 22-bit relocation. As a result, more
8664 care needs to be taken in the placement of long-branch stubs. */ 8632 care needs to be taken in the placement of long-branch stubs. */
8665 if (TARGET_64BIT) 8633 if (TARGET_64BIT)
8666 return false; 8634 return false;
8667 8635
8636 if (TARGET_PORTABLE_RUNTIME)
8637 return false;
8638
8668 /* Sibcalls are only ok within a translation unit. */ 8639 /* Sibcalls are only ok within a translation unit. */
8669 return (decl && !TREE_PUBLIC (decl)); 8640 return decl && targetm.binds_local_p (decl);
8670 } 8641 }
8671 8642
8672 /* ??? Addition is not commutative on the PA due to the weird implicit 8643 /* ??? Addition is not commutative on the PA due to the weird implicit
8673 space register selection rules for memory addresses. Therefore, we 8644 space register selection rules for memory addresses. Therefore, we
8674 don't consider a + b == b + a, as this might be inside a MEM. */ 8645 don't consider a + b == b + a, as this might be inside a MEM. */
9481 static void 9452 static void
9482 pa_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, 9453 pa_function_arg_advance (cumulative_args_t cum_v, machine_mode mode,
9483 const_tree type, bool named ATTRIBUTE_UNUSED) 9454 const_tree type, bool named ATTRIBUTE_UNUSED)
9484 { 9455 {
9485 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); 9456 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
9486 int arg_size = FUNCTION_ARG_SIZE (mode, type); 9457 int arg_size = pa_function_arg_size (mode, type);
9487 9458
9488 cum->nargs_prototype--; 9459 cum->nargs_prototype--;
9489 cum->words += (arg_size 9460 cum->words += (arg_size
9490 + ((cum->words & 01) 9461 + ((cum->words & 01)
9491 && type != NULL_TREE 9462 && type != NULL_TREE
9513 rtx retval; 9484 rtx retval;
9514 9485
9515 if (mode == VOIDmode) 9486 if (mode == VOIDmode)
9516 return NULL_RTX; 9487 return NULL_RTX;
9517 9488
9518 arg_size = FUNCTION_ARG_SIZE (mode, type); 9489 arg_size = pa_function_arg_size (mode, type);
9519 9490
9520 /* If this arg would be passed partially or totally on the stack, then 9491 /* If this arg would be passed partially or totally on the stack, then
9521 this routine should return zero. pa_arg_partial_bytes will 9492 this routine should return zero. pa_arg_partial_bytes will
9522 handle arguments which are split between regs and stack slots if 9493 handle arguments which are split between regs and stack slots if
9523 the ABI mandates split arguments. */ 9494 the ABI mandates split arguments. */
9720 unsigned int offset = 0; 9691 unsigned int offset = 0;
9721 9692
9722 if (!TARGET_64BIT) 9693 if (!TARGET_64BIT)
9723 return 0; 9694 return 0;
9724 9695
9725 if (FUNCTION_ARG_SIZE (mode, type) > 1 && (cum->words & 1)) 9696 if (pa_function_arg_size (mode, type) > 1 && (cum->words & 1))
9726 offset = 1; 9697 offset = 1;
9727 9698
9728 if (cum->words + offset + FUNCTION_ARG_SIZE (mode, type) <= max_arg_words) 9699 if (cum->words + offset + pa_function_arg_size (mode, type) <= max_arg_words)
9729 /* Arg fits fully into registers. */ 9700 /* Arg fits fully into registers. */
9730 return 0; 9701 return 0;
9731 else if (cum->words + offset >= max_arg_words) 9702 else if (cum->words + offset >= max_arg_words)
9732 /* Arg fully on the stack. */ 9703 /* Arg fully on the stack. */
9733 return 0; 9704 return 0;
9792 { 9763 {
9793 in_section = NULL; 9764 in_section = NULL;
9794 output_section_asm_op (data); 9765 output_section_asm_op (data);
9795 } 9766 }
9796 9767
9797 /* Implement TARGET_ASM_INITIALIZE_SECTIONS */ 9768 /* Implement TARGET_ASM_INIT_SECTIONS. */
9798 9769
9799 static void 9770 static void
9800 pa_som_asm_init_sections (void) 9771 pa_som_asm_init_sections (void)
9801 { 9772 {
9802 text_section 9773 text_section
10542 && borx_reg_operand (index, Pmode)) 10513 && borx_reg_operand (index, Pmode))
10543 return true; 10514 return true;
10544 10515
10545 if (!TARGET_DISABLE_INDEXING 10516 if (!TARGET_DISABLE_INDEXING
10546 && GET_CODE (index) == MULT 10517 && GET_CODE (index) == MULT
10547 && MODE_OK_FOR_SCALED_INDEXING_P (mode) 10518 /* Only accept base operands with the REG_POINTER flag prior to
10519 reload on targets with non-equivalent space registers. */
10520 && (TARGET_NO_SPACE_REGS
10521 || (base == XEXP (x, 1)
10522 && (reload_completed
10523 || (reload_in_progress && HARD_REGISTER_P (base))
10524 || REG_POINTER (base))))
10548 && REG_P (XEXP (index, 0)) 10525 && REG_P (XEXP (index, 0))
10549 && GET_MODE (XEXP (index, 0)) == Pmode 10526 && GET_MODE (XEXP (index, 0)) == Pmode
10527 && MODE_OK_FOR_SCALED_INDEXING_P (mode)
10550 && (strict ? STRICT_REG_OK_FOR_INDEX_P (XEXP (index, 0)) 10528 && (strict ? STRICT_REG_OK_FOR_INDEX_P (XEXP (index, 0))
10551 : REG_OK_FOR_INDEX_P (XEXP (index, 0))) 10529 : REG_OK_FOR_INDEX_P (XEXP (index, 0)))
10552 && GET_CODE (XEXP (index, 1)) == CONST_INT 10530 && GET_CODE (XEXP (index, 1)) == CONST_INT
10553 && INTVAL (XEXP (index, 1)) 10531 && INTVAL (XEXP (index, 1))
10554 == (HOST_WIDE_INT) GET_MODE_SIZE (mode) 10532 == (HOST_WIDE_INT) GET_MODE_SIZE (mode)
10669 void 10647 void
10670 pa_output_addr_vec (rtx lab, rtx body) 10648 pa_output_addr_vec (rtx lab, rtx body)
10671 { 10649 {
10672 int idx, vlen = XVECLEN (body, 0); 10650 int idx, vlen = XVECLEN (body, 0);
10673 10651
10652 if (!TARGET_SOM)
10653 fputs ("\t.align 4\n", asm_out_file);
10674 targetm.asm_out.internal_label (asm_out_file, "L", CODE_LABEL_NUMBER (lab)); 10654 targetm.asm_out.internal_label (asm_out_file, "L", CODE_LABEL_NUMBER (lab));
10675 if (TARGET_GAS) 10655 if (TARGET_GAS)
10676 fputs ("\t.begin_brtab\n", asm_out_file); 10656 fputs ("\t.begin_brtab\n", asm_out_file);
10677 for (idx = 0; idx < vlen; idx++) 10657 for (idx = 0; idx < vlen; idx++)
10678 { 10658 {
10824 pa_starting_frame_offset (void) 10804 pa_starting_frame_offset (void)
10825 { 10805 {
10826 return 8; 10806 return 8;
10827 } 10807 }
10828 10808
10809 /* Figure out the size in words of the function argument. The size
10810 returned by this function should always be greater than zero because
10811 we pass variable and zero sized objects by reference. */
10812
10813 HOST_WIDE_INT
10814 pa_function_arg_size (machine_mode mode, const_tree type)
10815 {
10816 HOST_WIDE_INT size;
10817
10818 size = mode != BLKmode ? GET_MODE_SIZE (mode) : int_size_in_bytes (type);
10819 return CEIL (size, UNITS_PER_WORD);
10820 }
10821
10829 #include "gt-pa.h" 10822 #include "gt-pa.h"