comparison gcc/config/riscv/predicates.md @ 131:84e7813d76e9

gcc-8.2
author mir3636
date Thu, 25 Oct 2018 07:37:49 +0900
parents 04ced10e8804
children 1830386684a0
comparison
equal deleted inserted replaced
111:04ced10e8804 131:84e7813d76e9
1 ;; Predicate description for RISC-V target. 1 ;; Predicate description for RISC-V target.
2 ;; Copyright (C) 2011-2017 Free Software Foundation, Inc. 2 ;; Copyright (C) 2011-2018 Free Software Foundation, Inc.
3 ;; Contributed by Andrew Waterman (andrew@sifive.com). 3 ;; Contributed by Andrew Waterman (andrew@sifive.com).
4 ;; Based on MIPS target for GNU compiler. 4 ;; Based on MIPS target for GNU compiler.
5 ;; 5 ;;
6 ;; This file is part of GCC. 6 ;; This file is part of GCC.
7 ;; 7 ;;
67 return false; 67 return false;
68 68
69 /* Otherwise check whether the constant can be loaded in a single 69 /* Otherwise check whether the constant can be loaded in a single
70 instruction. */ 70 instruction. */
71 return !LUI_OPERAND (INTVAL (op)) && !SMALL_OPERAND (INTVAL (op)); 71 return !LUI_OPERAND (INTVAL (op)) && !SMALL_OPERAND (INTVAL (op));
72 })
73
74 (define_predicate "p2m1_shift_operand"
75 (match_code "const_int")
76 {
77 int val = exact_log2 (INTVAL (op) + 1);
78 if (val < 12)
79 return false;
80 return true;
81 })
82
83 (define_predicate "high_mask_shift_operand"
84 (match_code "const_int")
85 {
86 int val1 = clz_hwi (~ INTVAL (op));
87 int val0 = ctz_hwi (INTVAL (op));
88 if ((val0 + val1 == BITS_PER_WORD)
89 && val0 > 31 && val0 < 64)
90 return true;
91 return false;
72 }) 92 })
73 93
74 (define_predicate "move_operand" 94 (define_predicate "move_operand"
75 (match_operand 0 "general_operand") 95 (match_operand 0 "general_operand")
76 { 96 {