CbC/CbC_gcc: gcc/config/riscv/riscv.h comparison

comparison gcc/config/riscv/riscv.h @ 131:84e7813d76e9

gcc-8.2

author	mir3636
date	Thu, 25 Oct 2018 07:37:49 +0900
parents	04ced10e8804
children	1830386684a0

comparison

equal deleted inserted replaced

-:04ced10e8804
+:84e7813d76e9
 /* Definition of RISC-V target for GNU compiler.
-Copyright (C) 2011-2017 Free Software Foundation, Inc.
+Copyright (C) 2011-2018 Free Software Foundation, Inc.
 Contributed by Andrew Waterman (andrew@sifive.com).
 Based on MIPS target for GNU compiler.
 This file is part of GCC.
 /* The `Q' extension is not yet supported.  */
 #define UNITS_PER_FP_REG (TARGET_DOUBLE_FLOAT ? 8 : 4)
 /* The largest type that can be passed in floating-point registers.  */
-#define UNITS_PER_FP_ARG					\
+#define UNITS_PER_FP_ARG						\
-(riscv_abi == ABI_ILP32 || riscv_abi == ABI_LP64 ? 0 :	\
+((riscv_abi == ABI_ILP32 || riscv_abi == ABI_ILP32E			\
-riscv_abi == ABI_ILP32F || riscv_abi == ABI_LP64F ? 4 : 8)	\
+|| riscv_abi == ABI_LP64)						\
+? 0 									\
+: ((riscv_abi == ABI_ILP32F || riscv_abi == ABI_LP64F) ? 4 : 8))
 /* Set the sizes of the core types.  */
 #define SHORT_TYPE_SIZE 16
 #define INT_TYPE_SIZE 32
 #define LONG_LONG_TYPE_SIZE 64
 #define PARM_BOUNDARY BITS_PER_WORD
 /* Allocation boundary (in *bits*) for the code of a function.  */
 #define FUNCTION_BOUNDARY (TARGET_RVC ? 16 : 32)
+/* The smallest supported stack boundary the calling convention supports.  */
+#define STACK_BOUNDARY \
+(riscv_abi == ABI_ILP32E ? BITS_PER_WORD : 2 * BITS_PER_WORD)
+/* The ABI stack alignment.  */
+#define ABI_STACK_BOUNDARY (riscv_abi == ABI_ILP32E ? BITS_PER_WORD : 128)
 /* There is no point aligning anything to a rounder boundary than this.  */
 #define BIGGEST_ALIGNMENT 128
 /* The user-level ISA permits unaligned accesses, but they are not required
 of the privileged architecture.  */
 If the macro is defined, its definition should be a C expression;
 a nonzero value for the expression enables this behavior.  */
 #define PCC_BITFIELD_TYPE_MATTERS 1
+/* An integer expression for the size in bits of the largest integer machine
+mode that should actually be used.  We allow pairs of registers.  */
+#define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TARGET_64BIT ? TImode : DImode)
 /* If defined, a C expression to compute the alignment for a static
 variable.  TYPE is the data type, and ALIGN is the alignment that
 the object would ordinarily have.  The value of this macro is used
 instead of that alignment to align the object.
 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,			\
 /* Others.  */							\
 1, 1									\
 }
-/* a0-a7, t0-a6, fa0-fa7, and ft0-ft11 are volatile across calls.
+/* a0-a7, t0-t6, fa0-fa7, and ft0-ft11 are volatile across calls.
 The call RTLs themselves clobber ra.  */
 #define CALL_USED_REGISTERS						\
 { /* General registers.  */						\
 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1,			\
 }
 /* Internal macros to classify an ISA register's type.  */
 #define GP_REG_FIRST 0
-#define GP_REG_LAST  31
+#define GP_REG_LAST  (TARGET_RVE ? 15 : 31)
 #define GP_REG_NUM   (GP_REG_LAST - GP_REG_FIRST + 1)
 #define FP_REG_FIRST 32
 #define FP_REG_LAST  63
 #define FP_REG_NUM   (FP_REG_LAST - FP_REG_FIRST + 1)
 If `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect
 of this macro is to determine whether the space is included in
 `crtl->outgoing_args_size'.  */
 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
-#define STACK_BOUNDARY 128
+#define PREFERRED_STACK_BOUNDARY riscv_stack_boundary
 /* Symbolic macros for the registers used to return integer and floating
 point values.  */
 #define GP_RETURN GP_ARG_FIRST
 #define FP_RETURN (UNITS_PER_FP_ARG == 0 ? GP_RETURN : FP_ARG_FIRST)
-#define MAX_ARGS_IN_REGISTERS 8
+#define MAX_ARGS_IN_REGISTERS (riscv_abi == ABI_ILP32E ? 6 : 8)
 /* Symbolic macros for the first/last argument registers.  */
 #define GP_ARG_FIRST (GP_REG_FIRST + 10)
 #define GP_ARG_LAST  (GP_ARG_FIRST + MAX_ARGS_IN_REGISTERS - 1)
 riscv_function_value (VALTYPE, FUNC, VOIDmode)
 #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN || (N) == FP_RETURN)
 /* 1 if N is a possible register number for function argument passing.
-We have no FP argument registers when soft-float.  When FP registers
+We have no FP argument registers when soft-float.  */
-are 32 bits, we can't directly reference the odd numbered ones.  */
 /* Accept arguments in a0-a7, and in fa0-fa7 if permitted by the ABI.  */
 #define FUNCTION_ARG_REGNO_P(N)						\
 (IN_RANGE ((N), GP_ARG_FIRST, GP_ARG_LAST)				\
 || (UNITS_PER_FP_ARG && IN_RANGE ((N), FP_ARG_FIRST, FP_ARG_LAST)))
 For a library call, FNTYPE is 0.  */
 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
 memset (&(CUM), 0, sizeof (CUM))
-#define EPILOGUE_USES(REGNO)	((REGNO) == RETURN_ADDR_REGNUM)
+#define EPILOGUE_USES(REGNO)	riscv_epilogue_uses (REGNO)
-/* ABI requires 16-byte alignment, even on RV32. */
+/* Align based on stack boundary, which might have been set by the user.  */
-#define RISCV_STACK_ALIGN(LOC) (((LOC) + 15) & -16)
+#define RISCV_STACK_ALIGN(LOC) \
+(((LOC) + ((PREFERRED_STACK_BOUNDARY/8)-1)) & -(PREFERRED_STACK_BOUNDARY/8))
 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
 the stack pointer does not matter.  The value is tested only in
 functions that have frame pointers.
 No definition is equivalent to always zero.  */
 (CONSTANT_P (X) && memory_address_p (SImode, X))
 /* This handles the magic '..CURRENT_FUNCTION' symbol, which means
 'the start of the function that this code is output in'.  */
-#define ASM_OUTPUT_LABELREF(FILE,NAME)  \
+#define ASM_OUTPUT_LABELREF(FILE,NAME)					\
-if (strcmp (NAME, "..CURRENT_FUNCTION") == 0)				\
+do {									\
-asm_fprintf ((FILE), "%U%s",					\
+if (strcmp (NAME, "..CURRENT_FUNCTION") == 0)			\
-		 XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));	\
+asm_fprintf ((FILE), "%U%s",					\
-else									\
+		   XSTR (XEXP (DECL_RTL (current_function_decl),	\
-asm_fprintf ((FILE), "%U%s", (NAME))
+			       0), 0));					\
+else								\
+asm_fprintf ((FILE), "%U%s", (NAME));				\
+} while (0)
 #define JUMP_TABLES_IN_TEXT_SECTION 0
 #define CASE_VECTOR_MODE SImode
 #define CASE_VECTOR_PC_RELATIVE (riscv_cmodel != CM_MEDLOW)
 #define DEFAULT_SIGNED_CHAR 0
 #define MOVE_MAX UNITS_PER_WORD
 #define MAX_MOVE_MAX 8
-#define SLOW_BYTE_ACCESS 0
+/* The SPARC port says:
+Nonzero if access to memory by bytes is slow and undesirable.
-#define SHIFT_COUNT_TRUNCATED 1
+For RISC chips, it means that access to memory by bytes is no
+better than access by words when possible, so grab a whole word
+and maybe make use of that.  */
+#define SLOW_BYTE_ACCESS 1
+/* Using SHIFT_COUNT_TRUNCATED is discouraged, so we handle this with patterns
+in the md file instead.  */
+#define SHIFT_COUNT_TRUNCATED 0
 /* Specify the machine mode that pointers have.
 After generation of rtl, the compiler makes no further distinction
 between pointers and any other objects of this machine mode.  */
 #define SIZE_TYPE (POINTER_SIZE == 64 ? "long unsigned int" : "unsigned int")
 #undef PTRDIFF_TYPE
 #define PTRDIFF_TYPE (POINTER_SIZE == 64 ? "long int" : "int")
+/* The maximum number of bytes copied by one iteration of a movmemsi loop.  */
+#define RISCV_MAX_MOVE_BYTES_PER_LOOP_ITER (UNITS_PER_WORD * 4)
+/* The maximum number of bytes that can be copied by a straight-line
+movmemsi implementation.  */
+#define RISCV_MAX_MOVE_BYTES_STRAIGHT (RISCV_MAX_MOVE_BYTES_PER_LOOP_ITER * 3)
 /* If a memory-to-memory move would take MOVE_RATIO or more simple
-move-instruction pairs, we will do a movmem or libcall instead.  */
+move-instruction pairs, we will do a movmem or libcall instead.
+Do not use move_by_pieces at all when strict alignment is not
-#define MOVE_RATIO(speed) (CLEAR_RATIO (speed) / 2)
+in effect but the target has slow unaligned accesses; in this
+case, movmem or libcall is more efficient.  */
+#define MOVE_RATIO(speed)						\
+(!STRICT_ALIGNMENT && riscv_slow_unaligned_access_p ? 1 :		\
+(speed) ? RISCV_MAX_MOVE_BYTES_PER_LOOP_ITER / UNITS_PER_WORD :	\
+CLEAR_RATIO (speed) / 2)
 /* For CLEAR_RATIO, when optimizing for size, give a better estimate
 of the length of a memset call, but use the default otherwise.  */
 #define CLEAR_RATIO(speed) ((speed) ? 16 : 6)
 #define SET_RATIO(speed) (CLEAR_RATIO (speed) - ((speed) ? 0 : 2))
 #ifndef USED_FOR_TARGET
 extern const enum reg_class riscv_regno_to_class[];
+extern bool riscv_slow_unaligned_access_p;
+extern unsigned riscv_stack_boundary;
 #endif
 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
 (((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4)
 "%{march=rv32*:32}" \
 "%{march=rv64*:64}" \
 #define ABI_SPEC \
 "%{mabi=ilp32:ilp32}" \
+"%{mabi=ilp32e:ilp32e}" \
 "%{mabi=ilp32f:ilp32f}" \
 "%{mabi=ilp32d:ilp32d}" \
 "%{mabi=lp64:lp64}" \
 "%{mabi=lp64f:lp64f}" \
 "%{mabi=lp64d:lp64d}" \
 #define OPCODE_ADDI  0x13
 #define SHIFT_RD  7
 #define SHIFT_RS1 15
 #define SHIFT_IMM 20
 #define IMM_BITS 12
+#define C_SxSP_BITS 6
 #define IMM_REACH (1LL << IMM_BITS)
 #define CONST_HIGH_PART(VALUE) (((VALUE) + (IMM_REACH/2)) & ~(IMM_REACH-1))
 #define CONST_LOW_PART(VALUE) ((VALUE) - CONST_HIGH_PART (VALUE))
+#define SWSP_REACH (4LL << C_SxSP_BITS)
+#define SDSP_REACH (8LL << C_SxSP_BITS)
 #endif /* ! GCC_RISCV_H */

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comparison gcc/config/riscv/riscv.h @ 131:84e7813d76e9