Mercurial > hg > CbC > CbC_gcc
comparison gcc/config/rs6000/htm.md @ 131:84e7813d76e9
gcc-8.2
author | mir3636 |
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date | Thu, 25 Oct 2018 07:37:49 +0900 |
parents | 04ced10e8804 |
children | 1830386684a0 |
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111:04ced10e8804 | 131:84e7813d76e9 |
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1 ;; Hardware Transactional Memory (HTM) patterns. | 1 ;; Hardware Transactional Memory (HTM) patterns. |
2 ;; Copyright (C) 2013-2017 Free Software Foundation, Inc. | 2 ;; Copyright (C) 2013-2018 Free Software Foundation, Inc. |
3 ;; Contributed by Peter Bergner <bergner@vnet.ibm.com>. | 3 ;; Contributed by Peter Bergner <bergner@vnet.ibm.com>. |
4 | 4 |
5 ;; This file is part of GCC. | 5 ;; This file is part of GCC. |
6 | 6 |
7 ;; GCC is free software; you can redistribute it and/or modify it | 7 ;; GCC is free software; you can redistribute it and/or modify it |
70 (unspec_volatile:CC [(match_operand:SI 0 "base_reg_operand" "b")] | 70 (unspec_volatile:CC [(match_operand:SI 0 "base_reg_operand" "b")] |
71 UNSPECV_HTM_TABORT)) | 71 UNSPECV_HTM_TABORT)) |
72 (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))] | 72 (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))] |
73 "TARGET_HTM" | 73 "TARGET_HTM" |
74 "tabort. %0" | 74 "tabort. %0" |
75 [(set_attr "type" "htmsimple") | 75 [(set_attr "type" "htmsimple")]) |
76 (set_attr "length" "4")]) | |
77 | 76 |
78 (define_expand "tabort<wd>c" | 77 (define_expand "tabort<wd>c" |
79 [(parallel | 78 [(parallel |
80 [(set (match_operand:CC 3 "cc_reg_operand" "=x") | 79 [(set (match_operand:CC 3 "cc_reg_operand" "=x") |
81 (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n") | 80 (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n") |
96 (match_operand:GPR 2 "gpc_reg_operand" "r")] | 95 (match_operand:GPR 2 "gpc_reg_operand" "r")] |
97 UNSPECV_HTM_TABORTXC)) | 96 UNSPECV_HTM_TABORTXC)) |
98 (set (match_operand:BLK 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))] | 97 (set (match_operand:BLK 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))] |
99 "TARGET_HTM" | 98 "TARGET_HTM" |
100 "tabort<wd>c. %0,%1,%2" | 99 "tabort<wd>c. %0,%1,%2" |
101 [(set_attr "type" "htmsimple") | 100 [(set_attr "type" "htmsimple")]) |
102 (set_attr "length" "4")]) | |
103 | 101 |
104 (define_expand "tabort<wd>ci" | 102 (define_expand "tabort<wd>ci" |
105 [(parallel | 103 [(parallel |
106 [(set (match_operand:CC 3 "cc_reg_operand" "=x") | 104 [(set (match_operand:CC 3 "cc_reg_operand" "=x") |
107 (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n") | 105 (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n") |
122 (match_operand 2 "s5bit_cint_operand" "n")] | 120 (match_operand 2 "s5bit_cint_operand" "n")] |
123 UNSPECV_HTM_TABORTXCI)) | 121 UNSPECV_HTM_TABORTXCI)) |
124 (set (match_operand:BLK 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))] | 122 (set (match_operand:BLK 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))] |
125 "TARGET_HTM" | 123 "TARGET_HTM" |
126 "tabort<wd>ci. %0,%1,%2" | 124 "tabort<wd>ci. %0,%1,%2" |
127 [(set_attr "type" "htmsimple") | 125 [(set_attr "type" "htmsimple")]) |
128 (set_attr "length" "4")]) | |
129 | 126 |
130 (define_expand "tbegin" | 127 (define_expand "tbegin" |
131 [(parallel | 128 [(parallel |
132 [(set (match_operand:CC 1 "cc_reg_operand" "=x") | 129 [(set (match_operand:CC 1 "cc_reg_operand" "=x") |
133 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")] | 130 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")] |
144 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")] | 141 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")] |
145 UNSPECV_HTM_TBEGIN)) | 142 UNSPECV_HTM_TBEGIN)) |
146 (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))] | 143 (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))] |
147 "TARGET_HTM" | 144 "TARGET_HTM" |
148 "tbegin. %0" | 145 "tbegin. %0" |
149 [(set_attr "type" "htm") | 146 [(set_attr "type" "htm")]) |
150 (set_attr "length" "4")]) | |
151 | 147 |
152 (define_expand "tcheck" | 148 (define_expand "tcheck" |
153 [(parallel | 149 [(parallel |
154 [(set (match_operand:CC 0 "cc_reg_operand" "=y") | 150 [(set (match_operand:CC 0 "cc_reg_operand" "=y") |
155 (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TCHECK)) | 151 (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TCHECK)) |
164 [(set (match_operand:CC 0 "cc_reg_operand" "=y") | 160 [(set (match_operand:CC 0 "cc_reg_operand" "=y") |
165 (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TCHECK)) | 161 (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TCHECK)) |
166 (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))] | 162 (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))] |
167 "TARGET_HTM" | 163 "TARGET_HTM" |
168 "tcheck %0" | 164 "tcheck %0" |
169 [(set_attr "type" "htm") | 165 [(set_attr "type" "htm")]) |
170 (set_attr "length" "4")]) | |
171 | 166 |
172 (define_expand "tend" | 167 (define_expand "tend" |
173 [(parallel | 168 [(parallel |
174 [(set (match_operand:CC 1 "cc_reg_operand" "=x") | 169 [(set (match_operand:CC 1 "cc_reg_operand" "=x") |
175 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")] | 170 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")] |
186 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")] | 181 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")] |
187 UNSPECV_HTM_TEND)) | 182 UNSPECV_HTM_TEND)) |
188 (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))] | 183 (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))] |
189 "TARGET_HTM" | 184 "TARGET_HTM" |
190 "tend. %0" | 185 "tend. %0" |
191 [(set_attr "type" "htm") | 186 [(set_attr "type" "htm")]) |
192 (set_attr "length" "4")]) | |
193 | 187 |
194 (define_expand "trechkpt" | 188 (define_expand "trechkpt" |
195 [(parallel | 189 [(parallel |
196 [(set (match_operand:CC 0 "cc_reg_operand" "=x") | 190 [(set (match_operand:CC 0 "cc_reg_operand" "=x") |
197 (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TRECHKPT)) | 191 (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TRECHKPT)) |
206 [(set (match_operand:CC 0 "cc_reg_operand" "=x") | 200 [(set (match_operand:CC 0 "cc_reg_operand" "=x") |
207 (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TRECHKPT)) | 201 (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TRECHKPT)) |
208 (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))] | 202 (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))] |
209 "TARGET_HTM" | 203 "TARGET_HTM" |
210 "trechkpt." | 204 "trechkpt." |
211 [(set_attr "type" "htmsimple") | 205 [(set_attr "type" "htmsimple")]) |
212 (set_attr "length" "4")]) | |
213 | 206 |
214 (define_expand "treclaim" | 207 (define_expand "treclaim" |
215 [(parallel | 208 [(parallel |
216 [(set (match_operand:CC 1 "cc_reg_operand" "=x") | 209 [(set (match_operand:CC 1 "cc_reg_operand" "=x") |
217 (unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")] | 210 (unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")] |
228 (unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")] | 221 (unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")] |
229 UNSPECV_HTM_TRECLAIM)) | 222 UNSPECV_HTM_TRECLAIM)) |
230 (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))] | 223 (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))] |
231 "TARGET_HTM" | 224 "TARGET_HTM" |
232 "treclaim. %0" | 225 "treclaim. %0" |
233 [(set_attr "type" "htmsimple") | 226 [(set_attr "type" "htmsimple")]) |
234 (set_attr "length" "4")]) | |
235 | 227 |
236 (define_expand "tsr" | 228 (define_expand "tsr" |
237 [(parallel | 229 [(parallel |
238 [(set (match_operand:CC 1 "cc_reg_operand" "=x") | 230 [(set (match_operand:CC 1 "cc_reg_operand" "=x") |
239 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")] | 231 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")] |
250 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")] | 242 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")] |
251 UNSPECV_HTM_TSR)) | 243 UNSPECV_HTM_TSR)) |
252 (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))] | 244 (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))] |
253 "TARGET_HTM" | 245 "TARGET_HTM" |
254 "tsr. %0" | 246 "tsr. %0" |
255 [(set_attr "type" "htmsimple") | 247 [(set_attr "type" "htmsimple")]) |
256 (set_attr "length" "4")]) | |
257 | 248 |
258 (define_expand "ttest" | 249 (define_expand "ttest" |
259 [(parallel | 250 [(parallel |
260 [(set (match_operand:CC 0 "cc_reg_operand" "=x") | 251 [(set (match_operand:CC 0 "cc_reg_operand" "=x") |
261 (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TTEST)) | 252 (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TTEST)) |
270 [(set (match_operand:CC 0 "cc_reg_operand" "=x") | 261 [(set (match_operand:CC 0 "cc_reg_operand" "=x") |
271 (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TTEST)) | 262 (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TTEST)) |
272 (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))] | 263 (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))] |
273 "TARGET_HTM" | 264 "TARGET_HTM" |
274 "tabortwci. 0,1,0" | 265 "tabortwci. 0,1,0" |
275 [(set_attr "type" "htmsimple") | 266 [(set_attr "type" "htmsimple")]) |
276 (set_attr "length" "4")]) | |
277 | 267 |
278 (define_insn "htm_mfspr_<mode>" | 268 (define_insn "htm_mfspr_<mode>" |
279 [(set (match_operand:GPR 0 "gpc_reg_operand" "=r") | 269 [(set (match_operand:GPR 0 "gpc_reg_operand" "=r") |
280 (unspec_volatile:GPR [(match_operand 1 "u10bit_cint_operand" "n") | 270 (unspec_volatile:GPR [(match_operand 1 "u10bit_cint_operand" "n") |
281 (match_operand:GPR 2 "htm_spr_reg_operand" "")] | 271 (match_operand:GPR 2 "htm_spr_reg_operand" "")] |
282 UNSPECV_HTM_MFSPR))] | 272 UNSPECV_HTM_MFSPR))] |
283 "TARGET_HTM" | 273 "TARGET_HTM" |
284 "mfspr %0,%1"; | 274 "mfspr %0,%1"; |
285 [(set_attr "type" "htm") | 275 [(set_attr "type" "htm")]) |
286 (set_attr "length" "4")]) | |
287 | 276 |
288 (define_insn "htm_mtspr_<mode>" | 277 (define_insn "htm_mtspr_<mode>" |
289 [(set (match_operand:GPR 2 "htm_spr_reg_operand" "") | 278 [(set (match_operand:GPR 2 "htm_spr_reg_operand" "") |
290 (unspec_volatile:GPR [(match_operand:GPR 0 "gpc_reg_operand" "r") | 279 (unspec_volatile:GPR [(match_operand:GPR 0 "gpc_reg_operand" "r") |
291 (match_operand 1 "u10bit_cint_operand" "n")] | 280 (match_operand 1 "u10bit_cint_operand" "n")] |
292 UNSPECV_HTM_MTSPR))] | 281 UNSPECV_HTM_MTSPR))] |
293 "TARGET_HTM" | 282 "TARGET_HTM" |
294 "mtspr %1,%0"; | 283 "mtspr %1,%0"; |
295 [(set_attr "type" "htm") | 284 [(set_attr "type" "htm")]) |
296 (set_attr "length" "4")]) |