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comparison gcc/config/s390/s390.h @ 131:84e7813d76e9

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gcc-8.2
author mir3636
date Thu, 25 Oct 2018 07:37:49 +0900
parents 04ced10e8804
children 1830386684a0
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111:04ced10e8804 131:84e7813d76e9
1 /* Definitions of target machine for GNU compiler, for IBM S/390 1 /* Definitions of target machine for GNU compiler, for IBM S/390
2 Copyright (C) 1999-2017 Free Software Foundation, Inc. 2 Copyright (C) 1999-2018 Free Software Foundation, Inc.
3 Contributed by Hartmut Penner (hpenner@de.ibm.com) and 3 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
4 Ulrich Weigand (uweigand@de.ibm.com). 4 Ulrich Weigand (uweigand@de.ibm.com).
5 Andreas Krebbel (Andreas.Krebbel@de.ibm.com) 5 Andreas Krebbel (Andreas.Krebbel@de.ibm.com)
6 6
7 This file is part of GCC. 7 This file is part of GCC.
8 8
9 GCC is free software; you can redistribute it and/or modify it under 9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free 10 the terms of the GNU General Public License as published by the Free
36 PF_Z196 = 64, 36 PF_Z196 = 64,
37 PF_ZEC12 = 128, 37 PF_ZEC12 = 128,
38 PF_TX = 256, 38 PF_TX = 256,
39 PF_Z13 = 512, 39 PF_Z13 = 512,
40 PF_VX = 1024, 40 PF_VX = 1024,
41 PF_ARCH12 = 2048, 41 PF_Z14 = 2048,
42 PF_VXE = 4096 42 PF_VXE = 4096
43 }; 43 };
44 44
45 /* This is necessary to avoid a warning about comparing different enum 45 /* This is necessary to avoid a warning about comparing different enum
46 types. */ 46 types. */
52 52
53 #define TARGET_CPU_IEEE_FLOAT \ 53 #define TARGET_CPU_IEEE_FLOAT \
54 (s390_arch_flags & PF_IEEE_FLOAT) 54 (s390_arch_flags & PF_IEEE_FLOAT)
55 #define TARGET_CPU_IEEE_FLOAT_P(opts) \ 55 #define TARGET_CPU_IEEE_FLOAT_P(opts) \
56 (opts->x_s390_arch_flags & PF_IEEE_FLOAT) 56 (opts->x_s390_arch_flags & PF_IEEE_FLOAT)
57 #define TARGET_CPU_ZARCH \
58 (s390_arch_flags & PF_ZARCH)
59 #define TARGET_CPU_ZARCH_P(opts) \
60 (opts->x_s390_arch_flags & PF_ZARCH)
61 #define TARGET_CPU_LONG_DISPLACEMENT \ 57 #define TARGET_CPU_LONG_DISPLACEMENT \
62 (s390_arch_flags & PF_LONG_DISPLACEMENT) 58 (s390_arch_flags & PF_LONG_DISPLACEMENT)
63 #define TARGET_CPU_LONG_DISPLACEMENT_P(opts) \ 59 #define TARGET_CPU_LONG_DISPLACEMENT_P(opts) \
64 (opts->x_s390_arch_flags & PF_LONG_DISPLACEMENT) 60 (opts->x_s390_arch_flags & PF_LONG_DISPLACEMENT)
65 #define TARGET_CPU_EXTIMM \ 61 #define TARGET_CPU_EXTIMM \
92 (opts->x_s390_arch_flags & PF_Z13) 88 (opts->x_s390_arch_flags & PF_Z13)
93 #define TARGET_CPU_VX \ 89 #define TARGET_CPU_VX \
94 (s390_arch_flags & PF_VX) 90 (s390_arch_flags & PF_VX)
95 #define TARGET_CPU_VX_P(opts) \ 91 #define TARGET_CPU_VX_P(opts) \
96 (opts->x_s390_arch_flags & PF_VX) 92 (opts->x_s390_arch_flags & PF_VX)
97 #define TARGET_CPU_ARCH12 \ 93 #define TARGET_CPU_Z14 \
98 (s390_arch_flags & PF_ARCH12) 94 (s390_arch_flags & PF_Z14)
99 #define TARGET_CPU_ARCH12_P(opts) \ 95 #define TARGET_CPU_Z14_P(opts) \
100 (opts->x_s390_arch_flags & PF_ARCH12) 96 (opts->x_s390_arch_flags & PF_Z14)
101 #define TARGET_CPU_VXE \ 97 #define TARGET_CPU_VXE \
102 (s390_arch_flags & PF_VXE) 98 (s390_arch_flags & PF_VXE)
103 #define TARGET_CPU_VXE_P(opts) \ 99 #define TARGET_CPU_VXE_P(opts) \
104 (opts->x_s390_arch_flags & PF_VXE) 100 (opts->x_s390_arch_flags & PF_VXE)
105 101
145 (TARGET_ZARCH && TARGET_CPU_VX && TARGET_OPT_VX && TARGET_HARD_FLOAT) 141 (TARGET_ZARCH && TARGET_CPU_VX && TARGET_OPT_VX && TARGET_HARD_FLOAT)
146 #define TARGET_VX_P(opts) \ 142 #define TARGET_VX_P(opts) \
147 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_VX_P (opts) \ 143 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_VX_P (opts) \
148 && TARGET_OPT_VX_P (opts->x_target_flags) \ 144 && TARGET_OPT_VX_P (opts->x_target_flags) \
149 && TARGET_HARD_FLOAT_P (opts->x_target_flags)) 145 && TARGET_HARD_FLOAT_P (opts->x_target_flags))
150 #define TARGET_ARCH12 (TARGET_ZARCH && TARGET_CPU_ARCH12) 146 #define TARGET_Z14 (TARGET_ZARCH && TARGET_CPU_Z14)
151 #define TARGET_ARCH12_P(opts) \ 147 #define TARGET_Z14_P(opts) \
152 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_ARCH12_P (opts)) 148 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z14_P (opts))
153 #define TARGET_VXE \ 149 #define TARGET_VXE \
154 (TARGET_VX && TARGET_CPU_VXE) 150 (TARGET_VX && TARGET_CPU_VXE)
155 #define TARGET_VXE_P(opts) \ 151 #define TARGET_VXE_P(opts) \
156 (TARGET_VX_P (opts) && TARGET_CPU_VXE_P (opts)) 152 (TARGET_VX_P (opts) && TARGET_CPU_VXE_P (opts))
157 153
179 - align *all* vector types to 8 bytes */ 175 - align *all* vector types to 8 bytes */
180 #define TARGET_VX_ABI TARGET_VX 176 #define TARGET_VX_ABI TARGET_VX
181 177
182 #define TARGET_AVOID_CMP_AND_BRANCH (s390_tune == PROCESSOR_2817_Z196) 178 #define TARGET_AVOID_CMP_AND_BRANCH (s390_tune == PROCESSOR_2817_Z196)
183 179
180 /* Issue a write prefetch for the +4 cache line. */
181 #define TARGET_SETMEM_PREFETCH_DISTANCE 1024
182
183 /* Expand to a C expressions evaluating to true if a setmem to VAL of
184 length LEN should be emitted using prefetch instructions. */
185 #define TARGET_SETMEM_PFD(VAL,LEN) \
186 (TARGET_Z10 \
187 && (s390_tune < PROCESSOR_2964_Z13 || (VAL) != const0_rtx) \
188 && (!CONST_INT_P (LEN) || INTVAL ((LEN)) > TARGET_SETMEM_PREFETCH_DISTANCE))
189
184 /* Run-time target specification. */ 190 /* Run-time target specification. */
185 191
186 /* Defaults for option flags defined only on some subtargets. */ 192 /* Defaults for option flags defined only on some subtargets. */
187 #ifndef TARGET_TPF_PROFILING 193 #ifndef TARGET_TPF_PROFILING
188 #define TARGET_TPF_PROFILING 0 194 #define TARGET_TPF_PROFILING 0
194 /* Target CPU builtins. */ 200 /* Target CPU builtins. */
195 #define TARGET_CPU_CPP_BUILTINS() s390_cpu_cpp_builtins (pfile) 201 #define TARGET_CPU_CPP_BUILTINS() s390_cpu_cpp_builtins (pfile)
196 202
197 #ifdef DEFAULT_TARGET_64BIT 203 #ifdef DEFAULT_TARGET_64BIT
198 #define TARGET_DEFAULT (MASK_64BIT | MASK_ZARCH | MASK_HARD_DFP \ 204 #define TARGET_DEFAULT (MASK_64BIT | MASK_ZARCH | MASK_HARD_DFP \
199 | MASK_OPT_HTM | MASK_OPT_VX) 205 | MASK_OPT_HTM | MASK_OPT_VX)
200 #else 206 #else
201 #define TARGET_DEFAULT 0 207 #define TARGET_DEFAULT 0
202 #endif 208 #endif
203 209
204 /* Support for configure-time defaults. */ 210 /* Support for configure-time defaults. */
205 #define OPTION_DEFAULT_SPECS \ 211 #define OPTION_DEFAULT_SPECS \
206 { "mode", "%{!mesa:%{!mzarch:-m%(VALUE)}}" }, \ 212 { "mode", "%{!mesa:%{!mzarch:-m%(VALUE)}}" }, \
207 { "arch", "%{!march=*:-march=%(VALUE)}" }, \ 213 { "arch", "%{!march=*:-march=%(VALUE)}" }, \
208 { "tune", "%{!mtune=*:-mtune=%(VALUE)}" } 214 { "tune", "%{!mtune=*:%{!march=*:-mtune=%(VALUE)}}" }
209 215
210 #ifdef __s390__ 216 #ifdef __s390__
211 extern const char *s390_host_detect_local_cpu (int argc, const char **argv); 217 extern const char *s390_host_detect_local_cpu (int argc, const char **argv);
212 # define EXTRA_SPEC_FUNCTIONS \ 218 # define EXTRA_SPEC_FUNCTIONS \
213 { "local_cpu_detect", s390_host_detect_local_cpu }, 219 { "local_cpu_detect", s390_host_detect_local_cpu },
253 #define S390_TDC_POSITIVE_NORMALIZED_DFP_NUMBER (1 << 7) 259 #define S390_TDC_POSITIVE_NORMALIZED_DFP_NUMBER (1 << 7)
254 #define S390_TDC_NEGATIVE_NORMALIZED_DFP_NUMBER (1 << 6) 260 #define S390_TDC_NEGATIVE_NORMALIZED_DFP_NUMBER (1 << 6)
255 261
256 /* For signbit, the BFP-DFP-difference makes no difference. */ 262 /* For signbit, the BFP-DFP-difference makes no difference. */
257 #define S390_TDC_SIGNBIT_SET (S390_TDC_NEGATIVE_ZERO \ 263 #define S390_TDC_SIGNBIT_SET (S390_TDC_NEGATIVE_ZERO \
258 | S390_TDC_NEGATIVE_NORMALIZED_BFP_NUMBER \ 264 | S390_TDC_NEGATIVE_NORMALIZED_BFP_NUMBER \
259 | S390_TDC_NEGATIVE_DENORMALIZED_BFP_NUMBER\ 265 | S390_TDC_NEGATIVE_DENORMALIZED_BFP_NUMBER\
260 | S390_TDC_NEGATIVE_INFINITY \ 266 | S390_TDC_NEGATIVE_INFINITY \
261 | S390_TDC_NEGATIVE_QUIET_NAN \ 267 | S390_TDC_NEGATIVE_QUIET_NAN \
262 | S390_TDC_NEGATIVE_SIGNALING_NAN ) 268 | S390_TDC_NEGATIVE_SIGNALING_NAN )
263 269
264 #define S390_TDC_INFINITY (S390_TDC_POSITIVE_INFINITY \ 270 #define S390_TDC_INFINITY (S390_TDC_POSITIVE_INFINITY \
265 | S390_TDC_NEGATIVE_INFINITY ) 271 | S390_TDC_NEGATIVE_INFINITY )
266 272
410 The remaining FPRs are call-saved. 416 The remaining FPRs are call-saved.
411 417
412 All non-FP vector registers are call-clobbered v16-v31. */ 418 All non-FP vector registers are call-clobbered v16-v31. */
413 419
414 #define FIXED_REGISTERS \ 420 #define FIXED_REGISTERS \
415 { 0, 0, 0, 0, \ 421 { 0, 0, 0, 0, \
416 0, 0, 0, 0, \ 422 0, 0, 0, 0, \
417 0, 0, 0, 0, \ 423 0, 0, 0, 0, \
418 0, 1, 1, 1, \ 424 0, 1, 1, 1, \
419 0, 0, 0, 0, \ 425 0, 0, 0, 0, \
420 0, 0, 0, 0, \ 426 0, 0, 0, 0, \
421 0, 0, 0, 0, \ 427 0, 0, 0, 0, \
422 0, 0, 0, 0, \ 428 0, 0, 0, 0, \
423 1, 1, 1, 1, \ 429 1, 1, 1, 1, \
424 1, 1, \ 430 1, 1, \
425 0, 0, 0, 0, \ 431 0, 0, 0, 0, \
426 0, 0, 0, 0, \ 432 0, 0, 0, 0, \
427 0, 0, 0, 0, \ 433 0, 0, 0, 0, \
428 0, 0, 0, 0 } 434 0, 0, 0, 0 }
429 435
430 #define CALL_USED_REGISTERS \ 436 #define CALL_USED_REGISTERS \
431 { 1, 1, 1, 1, \ 437 { 1, 1, 1, 1, \
432 1, 1, 0, 0, \ 438 1, 1, 0, 0, \
433 0, 0, 0, 0, \ 439 0, 0, 0, 0, \
434 0, 1, 1, 1, \ 440 0, 1, 1, 1, \
435 1, 1, 1, 1, \ 441 1, 1, 1, 1, \
436 1, 1, 1, 1, \ 442 1, 1, 1, 1, \
437 1, 1, 1, 1, \ 443 1, 1, 1, 1, \
438 1, 1, 1, 1, \ 444 1, 1, 1, 1, \
439 1, 1, 1, 1, \ 445 1, 1, 1, 1, \
440 1, 1, \ 446 1, 1, \
441 1, 1, 1, 1, \ 447 1, 1, 1, 1, \
442 1, 1, 1, 1, \ 448 1, 1, 1, 1, \
443 1, 1, 1, 1, \ 449 1, 1, 1, 1, \
444 1, 1, 1, 1 } 450 1, 1, 1, 1 }
445 451
446 #define CALL_REALLY_USED_REGISTERS \ 452 #define CALL_REALLY_USED_REGISTERS \
447 { 1, 1, 1, 1, /* r0 - r15 */ \ 453 { 1, 1, 1, 1, /* r0 - r15 */ \
448 1, 1, 0, 0, \ 454 1, 1, 0, 0, \
449 0, 0, 0, 0, \
450 0, 0, 0, 0, \ 455 0, 0, 0, 0, \
451 1, 1, 1, 1, /* f0 (16) - f15 (31) */ \ 456 0, 0, 0, 0, \
452 1, 1, 1, 1, \ 457 1, 1, 1, 1, /* f0 (16) - f15 (31) */ \
453 1, 1, 1, 1, \ 458 1, 1, 1, 1, \
454 1, 1, 1, 1, \ 459 1, 1, 1, 1, \
460 1, 1, 1, 1, \
455 1, 1, 1, 1, /* arg, cc, fp, ret addr */ \ 461 1, 1, 1, 1, /* arg, cc, fp, ret addr */ \
456 0, 0, /* a0 (36), a1 (37) */ \ 462 0, 0, /* a0 (36), a1 (37) */ \
457 1, 1, 1, 1, /* v16 (38) - v23 (45) */ \ 463 1, 1, 1, 1, /* v16 (38) - v23 (45) */ \
458 1, 1, 1, 1, \ 464 1, 1, 1, 1, \
459 1, 1, 1, 1, /* v24 (46) - v31 (53) */ \ 465 1, 1, 1, 1, /* v24 (46) - v31 (53) */ \
460 1, 1, 1, 1 } 466 1, 1, 1, 1 }
461 467
462 /* Preferred register allocation order. */ 468 /* Preferred register allocation order. */
463 #define REG_ALLOC_ORDER \ 469 #define REG_ALLOC_ORDER \
464 { 1, 2, 3, 4, 5, 0, 12, 11, 10, 9, 8, 7, 6, 14, 13, \ 470 { 1, 2, 3, 4, 5, 0, 12, 11, 10, 9, 8, 7, 6, 14, 13, \
465 16, 17, 18, 19, 20, 21, 22, 23, \ 471 16, 17, 18, 19, 20, 21, 22, 23, \
466 24, 25, 26, 27, 28, 29, 30, 31, \ 472 24, 25, 26, 27, 28, 29, 30, 31, \
467 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, \ 473 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, \
468 15, 32, 33, 34, 35, 36, 37 } 474 15, 32, 33, 34, 35, 36, 37 }
469 475
470 476
471 #define HARD_REGNO_RENAME_OK(FROM, TO) \ 477 #define HARD_REGNO_RENAME_OK(FROM, TO) \
472 s390_hard_regno_rename_ok ((FROM), (TO)) 478 s390_hard_regno_rename_ok ((FROM), (TO))
473 479
474 /* Maximum number of registers to represent a value of mode MODE 480 /* Maximum number of registers to represent a value of mode MODE
475 in a register of class CLASS. */ 481 in a register of class CLASS. */
476 #define CLASS_MAX_NREGS(CLASS, MODE) \ 482 #define CLASS_MAX_NREGS(CLASS, MODE) \
477 s390_class_max_nregs ((CLASS), (MODE)) 483 s390_class_max_nregs ((CLASS), (MODE))
478 484
479 /* We can reverse a CC mode safely if we know whether it comes from a 485 /* We can reverse a CC mode safely if we know whether it comes from a
480 floating point compare or not. With the vector modes it is encoded 486 floating point compare or not. With the vector modes it is encoded
481 as part of the mode. 487 as part of the mode.
491 /* Register classes. */ 497 /* Register classes. */
492 498
493 /* We use the following register classes: 499 /* We use the following register classes:
494 GENERAL_REGS All general purpose registers 500 GENERAL_REGS All general purpose registers
495 ADDR_REGS All general purpose registers except %r0 501 ADDR_REGS All general purpose registers except %r0
496 (These registers can be used in address generation) 502 (These registers can be used in address generation)
497 FP_REGS All floating point registers 503 FP_REGS All floating point registers
498 CC_REGS The condition code register 504 CC_REGS The condition code register
499 ACCESS_REGS The access registers 505 ACCESS_REGS The access registers
500 506
501 GENERAL_FP_REGS Union of GENERAL_REGS and FP_REGS 507 GENERAL_FP_REGS Union of GENERAL_REGS and FP_REGS
565 #define BASE_REG_CLASS ADDR_REGS 571 #define BASE_REG_CLASS ADDR_REGS
566 572
567 /* Check whether REGNO is a hard register of the suitable class 573 /* Check whether REGNO is a hard register of the suitable class
568 or a pseudo register currently allocated to one such. */ 574 or a pseudo register currently allocated to one such. */
569 #define REGNO_OK_FOR_INDEX_P(REGNO) \ 575 #define REGNO_OK_FOR_INDEX_P(REGNO) \
570 (((REGNO) < FIRST_PSEUDO_REGISTER \ 576 (((REGNO) < FIRST_PSEUDO_REGISTER \
571 && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS) \ 577 && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS) \
572 || ADDR_REGNO_P (reg_renumber[REGNO])) 578 || ADDR_REGNO_P (reg_renumber[REGNO]))
573 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO) 579 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
574 580
575 581
576 /* Stack layout and calling conventions. */ 582 /* Stack layout and calling conventions. */
737 #define EXIT_IGNORE_STACK 1 743 #define EXIT_IGNORE_STACK 1
738 744
739 745
740 /* Profiling. */ 746 /* Profiling. */
741 747
742 #define FUNCTION_PROFILER(FILE, LABELNO) \ 748 #define FUNCTION_PROFILER(FILE, LABELNO) \
743 s390_function_profiler ((FILE), ((LABELNO))) 749 s390_function_profiler ((FILE), ((LABELNO)))
744 750
745 #define PROFILE_BEFORE_PROLOGUE 1 751 #define PROFILE_BEFORE_PROLOGUE 1
746 752
747 753
1017 /* Reads can reuse write prefetches, used by tree-ssa-prefetch-loops.c. */ 1023 /* Reads can reuse write prefetches, used by tree-ssa-prefetch-loops.c. */
1018 #define READ_CAN_USE_WRITE_PREFETCH 1 1024 #define READ_CAN_USE_WRITE_PREFETCH 1
1019 1025
1020 extern const int processor_flags_table[]; 1026 extern const int processor_flags_table[];
1021 1027
1028 struct s390_processor
1029 {
1030 /* The preferred name to be used in user visible output. */
1031 const char *const name;
1032 /* CPU name as it should be passed to Binutils via .machine */
1033 const char *const binutils_name;
1034 const enum processor_type processor;
1035 const struct processor_costs *cost;
1036 int arch_level;
1037 };
1038
1039 extern const struct s390_processor processor_table[];
1040
1022 /* The truth element value for vector comparisons. Our instructions 1041 /* The truth element value for vector comparisons. Our instructions
1023 always generate -1 in that case. */ 1042 always generate -1 in that case. */
1024 #define VECTOR_STORE_FLAG_VALUE(MODE) CONSTM1_RTX (GET_MODE_INNER (MODE)) 1043 #define VECTOR_STORE_FLAG_VALUE(MODE) CONSTM1_RTX (GET_MODE_INNER (MODE))
1025 1044
1026 /* Target pragma. */ 1045 /* Target pragma. */
1031 #define REGISTER_TARGET_PRAGMAS() \ 1050 #define REGISTER_TARGET_PRAGMAS() \
1032 do { \ 1051 do { \
1033 s390_register_target_pragmas (); \ 1052 s390_register_target_pragmas (); \
1034 } while (0) 1053 } while (0)
1035 1054
1055 #ifndef USED_FOR_TARGET
1056 /* The following structure is embedded in the machine
1057 specific part of struct function. */
1058
1059 struct GTY (()) s390_frame_layout
1060 {
1061 /* Offset within stack frame. */
1062 HOST_WIDE_INT gprs_offset;
1063 HOST_WIDE_INT f0_offset;
1064 HOST_WIDE_INT f4_offset;
1065 HOST_WIDE_INT f8_offset;
1066 HOST_WIDE_INT backchain_offset;
1067
1068 /* Number of first and last gpr where slots in the register
1069 save area are reserved for. */
1070 int first_save_gpr_slot;
1071 int last_save_gpr_slot;
1072
1073 /* Location (FP register number) where GPRs (r0-r15) should
1074 be saved to.
1075 0 - does not need to be saved at all
1076 -1 - stack slot */
1077 #define SAVE_SLOT_NONE 0
1078 #define SAVE_SLOT_STACK -1
1079 signed char gpr_save_slots[16];
1080
1081 /* Number of first and last gpr to be saved, restored. */
1082 int first_save_gpr;
1083 int first_restore_gpr;
1084 int last_save_gpr;
1085 int last_restore_gpr;
1086
1087 /* Bits standing for floating point registers. Set, if the
1088 respective register has to be saved. Starting with reg 16 (f0)
1089 at the rightmost bit.
1090 Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1091 fpr 15 13 11 9 14 12 10 8 7 5 3 1 6 4 2 0
1092 reg 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 */
1093 unsigned int fpr_bitmap;
1094
1095 /* Number of floating point registers f8-f15 which must be saved. */
1096 int high_fprs;
1097
1098 /* Set if return address needs to be saved.
1099 This flag is set by s390_return_addr_rtx if it could not use
1100 the initial value of r14 and therefore depends on r14 saved
1101 to the stack. */
1102 bool save_return_addr_p;
1103
1104 /* Size of stack frame. */
1105 HOST_WIDE_INT frame_size;
1106 };
1107
1108
1109 /* Define the structure for the machine field in struct function. */
1110
1111 struct GTY(()) machine_function
1112 {
1113 struct s390_frame_layout frame_layout;
1114
1115 /* Literal pool base register. */
1116 rtx base_reg;
1117
1118 bool has_landing_pad_p;
1119
1120 /* True if the current function may contain a tbegin clobbering
1121 FPRs. */
1122 bool tbegin_p;
1123
1124 /* For -fsplit-stack support: A stack local which holds a pointer to
1125 the stack arguments for a function with a variable number of
1126 arguments. This is set at the start of the function and is used
1127 to initialize the overflow_arg_area field of the va_list
1128 structure. */
1129 rtx split_stack_varargs_pointer;
1130
1131 enum indirect_branch indirect_branch_jump;
1132 enum indirect_branch indirect_branch_call;
1133
1134 enum indirect_branch function_return_mem;
1135 enum indirect_branch function_return_reg;
1136 };
1137 #endif
1138
1139 #define TARGET_INDIRECT_BRANCH_NOBP_RET_OPTION \
1140 (cfun->machine->function_return_reg != indirect_branch_keep \
1141 || cfun->machine->function_return_mem != indirect_branch_keep)
1142
1143 #define TARGET_INDIRECT_BRANCH_NOBP_RET \
1144 ((cfun->machine->function_return_reg != indirect_branch_keep \
1145 && !s390_return_addr_from_memory ()) \
1146 || (cfun->machine->function_return_mem != indirect_branch_keep \
1147 && s390_return_addr_from_memory ()))
1148
1149 #define TARGET_INDIRECT_BRANCH_NOBP_JUMP \
1150 (cfun->machine->indirect_branch_jump != indirect_branch_keep)
1151
1152 #define TARGET_INDIRECT_BRANCH_NOBP_JUMP_THUNK \
1153 (cfun->machine->indirect_branch_jump == indirect_branch_thunk \
1154 || cfun->machine->indirect_branch_jump == indirect_branch_thunk_extern)
1155
1156 #define TARGET_INDIRECT_BRANCH_NOBP_JUMP_INLINE_THUNK \
1157 (cfun->machine->indirect_branch_jump == indirect_branch_thunk_inline)
1158
1159 #define TARGET_INDIRECT_BRANCH_NOBP_CALL \
1160 (cfun->machine->indirect_branch_call != indirect_branch_keep)
1161
1162 #ifndef TARGET_DEFAULT_INDIRECT_BRANCH_TABLE
1163 #define TARGET_DEFAULT_INDIRECT_BRANCH_TABLE 0
1164 #endif
1165
1166 #define TARGET_INDIRECT_BRANCH_THUNK_NAME_EXRL "__s390_indirect_jump_r%d"
1167 #define TARGET_INDIRECT_BRANCH_THUNK_NAME_EX "__s390_indirect_jump_r%duse_r%d"
1168
1169 #define TARGET_INDIRECT_BRANCH_TABLE s390_indirect_branch_table
1170
1171
1036 #endif /* S390_H */ 1172 #endif /* S390_H */