Mercurial > hg > CbC > CbC_gcc
comparison gcc/config/xtensa/xtensa.md @ 131:84e7813d76e9
gcc-8.2
author | mir3636 |
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date | Thu, 25 Oct 2018 07:37:49 +0900 |
parents | 04ced10e8804 |
children | 1830386684a0 |
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111:04ced10e8804 | 131:84e7813d76e9 |
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1 ;; GCC machine description for Tensilica's Xtensa architecture. | 1 ;; GCC machine description for Tensilica's Xtensa architecture. |
2 ;; Copyright (C) 2001-2017 Free Software Foundation, Inc. | 2 ;; Copyright (C) 2001-2018 Free Software Foundation, Inc. |
3 ;; Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica. | 3 ;; Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica. |
4 | 4 |
5 ;; This file is part of GCC. | 5 ;; This file is part of GCC. |
6 | 6 |
7 ;; GCC is free software; you can redistribute it and/or modify it | 7 ;; GCC is free software; you can redistribute it and/or modify it |
36 (UNSPEC_TLS_CALL 9) | 36 (UNSPEC_TLS_CALL 9) |
37 (UNSPEC_TP 10) | 37 (UNSPEC_TP 10) |
38 (UNSPEC_MEMW 11) | 38 (UNSPEC_MEMW 11) |
39 (UNSPEC_LSETUP_START 12) | 39 (UNSPEC_LSETUP_START 12) |
40 (UNSPEC_LSETUP_END 13) | 40 (UNSPEC_LSETUP_END 13) |
41 (UNSPEC_FRAME_BLOCKAGE 14) | |
41 | 42 |
42 (UNSPECV_SET_FP 1) | 43 (UNSPECV_SET_FP 1) |
43 (UNSPECV_ENTRY 2) | 44 (UNSPECV_ENTRY 2) |
44 (UNSPECV_S32RI 4) | 45 (UNSPECV_S32RI 4) |
45 (UNSPECV_S32C1I 5) | 46 (UNSPECV_S32C1I 5) |
1674 (set_attr "length" "2")]) | 1675 (set_attr "length" "2")]) |
1675 | 1676 |
1676 | 1677 |
1677 ;; Miscellaneous instructions. | 1678 ;; Miscellaneous instructions. |
1678 | 1679 |
1680 ;; In windowed ABI stack pointer adjustment must happen before any access | |
1681 ;; to the space allocated on stack is allowed, otherwise register spill | |
1682 ;; area may be clobbered. That's what frame blockage is supposed to enforce. | |
1683 | |
1684 (define_expand "allocate_stack" | |
1685 [(set (match_operand 0 "nonimmed_operand") | |
1686 (minus (reg A1_REG) (match_operand 1 "add_operand"))) | |
1687 (set (reg A1_REG) | |
1688 (minus (reg A1_REG) (match_dup 1)))] | |
1689 "TARGET_WINDOWED_ABI" | |
1690 { | |
1691 if (CONST_INT_P (operands[1])) | |
1692 { | |
1693 rtx neg_op0 = GEN_INT (-INTVAL (operands[1])); | |
1694 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0)); | |
1695 } | |
1696 else | |
1697 { | |
1698 emit_insn (gen_subsi3 (stack_pointer_rtx, stack_pointer_rtx, | |
1699 operands[1])); | |
1700 } | |
1701 emit_move_insn (operands[0], virtual_stack_dynamic_rtx); | |
1702 emit_insn (gen_frame_blockage ()); | |
1703 DONE; | |
1704 }) | |
1705 | |
1679 (define_expand "prologue" | 1706 (define_expand "prologue" |
1680 [(const_int 0)] | 1707 [(const_int 0)] |
1681 "" | 1708 "" |
1682 { | 1709 { |
1683 xtensa_expand_prologue (); | 1710 xtensa_expand_prologue (); |
1764 [(unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE)] | 1791 [(unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE)] |
1765 "" | 1792 "" |
1766 "" | 1793 "" |
1767 [(set_attr "length" "0") | 1794 [(set_attr "length" "0") |
1768 (set_attr "type" "nop")]) | 1795 (set_attr "type" "nop")]) |
1796 | |
1797 ;; Do not schedule instructions accessing memory before this point. | |
1798 | |
1799 (define_expand "frame_blockage" | |
1800 [(set (match_dup 0) | |
1801 (unspec:BLK [(match_dup 1)] UNSPEC_FRAME_BLOCKAGE))] | |
1802 "" | |
1803 { | |
1804 operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode)); | |
1805 MEM_VOLATILE_P (operands[0]) = 1; | |
1806 operands[1] = stack_pointer_rtx; | |
1807 }) | |
1808 | |
1809 (define_insn "*frame_blockage" | |
1810 [(set (match_operand:BLK 0 "" "") | |
1811 (unspec:BLK [(match_operand:SI 1 "" "")] UNSPEC_FRAME_BLOCKAGE))] | |
1812 "" | |
1813 "" | |
1814 [(set_attr "length" "0")]) | |
1769 | 1815 |
1770 (define_insn "trap" | 1816 (define_insn "trap" |
1771 [(trap_if (const_int 1) (const_int 0))] | 1817 [(trap_if (const_int 1) (const_int 0))] |
1772 "" | 1818 "" |
1773 { | 1819 { |