comparison gcc/config/alpha/alpha.h @ 0:a06113de4d67

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author kent <kent@cr.ie.u-ryukyu.ac.jp>
date Fri, 17 Jul 2009 14:47:48 +0900
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1 /* Definitions of target machine for GNU compiler, for DEC Alpha.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2004, 2005, 2007, 2008 Free Software Foundation, Inc.
4 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 /* Target CPU builtins. */
23 #define TARGET_CPU_CPP_BUILTINS() \
24 do \
25 { \
26 builtin_define ("__alpha"); \
27 builtin_define ("__alpha__"); \
28 builtin_assert ("cpu=alpha"); \
29 builtin_assert ("machine=alpha"); \
30 if (TARGET_CIX) \
31 { \
32 builtin_define ("__alpha_cix__"); \
33 builtin_assert ("cpu=cix"); \
34 } \
35 if (TARGET_FIX) \
36 { \
37 builtin_define ("__alpha_fix__"); \
38 builtin_assert ("cpu=fix"); \
39 } \
40 if (TARGET_BWX) \
41 { \
42 builtin_define ("__alpha_bwx__"); \
43 builtin_assert ("cpu=bwx"); \
44 } \
45 if (TARGET_MAX) \
46 { \
47 builtin_define ("__alpha_max__"); \
48 builtin_assert ("cpu=max"); \
49 } \
50 if (alpha_cpu == PROCESSOR_EV6) \
51 { \
52 builtin_define ("__alpha_ev6__"); \
53 builtin_assert ("cpu=ev6"); \
54 } \
55 else if (alpha_cpu == PROCESSOR_EV5) \
56 { \
57 builtin_define ("__alpha_ev5__"); \
58 builtin_assert ("cpu=ev5"); \
59 } \
60 else /* Presumably ev4. */ \
61 { \
62 builtin_define ("__alpha_ev4__"); \
63 builtin_assert ("cpu=ev4"); \
64 } \
65 if (TARGET_IEEE || TARGET_IEEE_WITH_INEXACT) \
66 builtin_define ("_IEEE_FP"); \
67 if (TARGET_IEEE_WITH_INEXACT) \
68 builtin_define ("_IEEE_FP_INEXACT"); \
69 if (TARGET_LONG_DOUBLE_128) \
70 builtin_define ("__LONG_DOUBLE_128__"); \
71 \
72 /* Macros dependent on the C dialect. */ \
73 SUBTARGET_LANGUAGE_CPP_BUILTINS(); \
74 } while (0)
75
76 #ifndef SUBTARGET_LANGUAGE_CPP_BUILTINS
77 #define SUBTARGET_LANGUAGE_CPP_BUILTINS() \
78 do \
79 { \
80 if (preprocessing_asm_p ()) \
81 builtin_define_std ("LANGUAGE_ASSEMBLY"); \
82 else if (c_dialect_cxx ()) \
83 { \
84 builtin_define ("__LANGUAGE_C_PLUS_PLUS"); \
85 builtin_define ("__LANGUAGE_C_PLUS_PLUS__"); \
86 } \
87 else \
88 builtin_define_std ("LANGUAGE_C"); \
89 if (c_dialect_objc ()) \
90 { \
91 builtin_define ("__LANGUAGE_OBJECTIVE_C"); \
92 builtin_define ("__LANGUAGE_OBJECTIVE_C__"); \
93 } \
94 } \
95 while (0)
96 #endif
97
98 #define WORD_SWITCH_TAKES_ARG(STR) \
99 (!strcmp (STR, "rpath") || DEFAULT_WORD_SWITCH_TAKES_ARG(STR))
100
101 /* Print subsidiary information on the compiler version in use. */
102 #define TARGET_VERSION
103
104 /* Run-time compilation parameters selecting different hardware subsets. */
105
106 /* Which processor to schedule for. The cpu attribute defines a list that
107 mirrors this list, so changes to alpha.md must be made at the same time. */
108
109 enum processor_type
110 {
111 PROCESSOR_EV4, /* 2106[46]{a,} */
112 PROCESSOR_EV5, /* 21164{a,pc,} */
113 PROCESSOR_EV6, /* 21264 */
114 PROCESSOR_MAX
115 };
116
117 extern enum processor_type alpha_cpu;
118 extern enum processor_type alpha_tune;
119
120 enum alpha_trap_precision
121 {
122 ALPHA_TP_PROG, /* No precision (default). */
123 ALPHA_TP_FUNC, /* Trap contained within originating function. */
124 ALPHA_TP_INSN /* Instruction accuracy and code is resumption safe. */
125 };
126
127 enum alpha_fp_rounding_mode
128 {
129 ALPHA_FPRM_NORM, /* Normal rounding mode. */
130 ALPHA_FPRM_MINF, /* Round towards minus-infinity. */
131 ALPHA_FPRM_CHOP, /* Chopped rounding mode (towards 0). */
132 ALPHA_FPRM_DYN /* Dynamic rounding mode. */
133 };
134
135 enum alpha_fp_trap_mode
136 {
137 ALPHA_FPTM_N, /* Normal trap mode. */
138 ALPHA_FPTM_U, /* Underflow traps enabled. */
139 ALPHA_FPTM_SU, /* Software completion, w/underflow traps */
140 ALPHA_FPTM_SUI /* Software completion, w/underflow & inexact traps */
141 };
142
143 extern int target_flags;
144
145 extern enum alpha_trap_precision alpha_tp;
146 extern enum alpha_fp_rounding_mode alpha_fprm;
147 extern enum alpha_fp_trap_mode alpha_fptm;
148
149 /* Invert the easy way to make options work. */
150 #define TARGET_FP (!TARGET_SOFT_FP)
151
152 /* These are for target os support and cannot be changed at runtime. */
153 #define TARGET_ABI_WINDOWS_NT 0
154 #define TARGET_ABI_OPEN_VMS 0
155 #define TARGET_ABI_UNICOSMK 0
156 #define TARGET_ABI_OSF (!TARGET_ABI_WINDOWS_NT \
157 && !TARGET_ABI_OPEN_VMS \
158 && !TARGET_ABI_UNICOSMK)
159
160 #ifndef TARGET_AS_CAN_SUBTRACT_LABELS
161 #define TARGET_AS_CAN_SUBTRACT_LABELS TARGET_GAS
162 #endif
163 #ifndef TARGET_AS_SLASH_BEFORE_SUFFIX
164 #define TARGET_AS_SLASH_BEFORE_SUFFIX TARGET_GAS
165 #endif
166 #ifndef TARGET_CAN_FAULT_IN_PROLOGUE
167 #define TARGET_CAN_FAULT_IN_PROLOGUE 0
168 #endif
169 #ifndef TARGET_HAS_XFLOATING_LIBS
170 #define TARGET_HAS_XFLOATING_LIBS TARGET_LONG_DOUBLE_128
171 #endif
172 #ifndef TARGET_PROFILING_NEEDS_GP
173 #define TARGET_PROFILING_NEEDS_GP 0
174 #endif
175 #ifndef TARGET_LD_BUGGY_LDGP
176 #define TARGET_LD_BUGGY_LDGP 0
177 #endif
178 #ifndef TARGET_FIXUP_EV5_PREFETCH
179 #define TARGET_FIXUP_EV5_PREFETCH 0
180 #endif
181 #ifndef HAVE_AS_TLS
182 #define HAVE_AS_TLS 0
183 #endif
184
185 #define TARGET_DEFAULT MASK_FPREGS
186
187 #ifndef TARGET_CPU_DEFAULT
188 #define TARGET_CPU_DEFAULT 0
189 #endif
190
191 #ifndef TARGET_DEFAULT_EXPLICIT_RELOCS
192 #ifdef HAVE_AS_EXPLICIT_RELOCS
193 #define TARGET_DEFAULT_EXPLICIT_RELOCS MASK_EXPLICIT_RELOCS
194 #define TARGET_SUPPORT_ARCH 1
195 #else
196 #define TARGET_DEFAULT_EXPLICIT_RELOCS 0
197 #endif
198 #endif
199
200 #ifndef TARGET_SUPPORT_ARCH
201 #define TARGET_SUPPORT_ARCH 0
202 #endif
203
204 /* Support for a compile-time default CPU, et cetera. The rules are:
205 --with-cpu is ignored if -mcpu is specified.
206 --with-tune is ignored if -mtune is specified. */
207 #define OPTION_DEFAULT_SPECS \
208 {"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \
209 {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }
210
211 /* Sometimes certain combinations of command options do not make sense
212 on a particular target machine. You can define a macro
213 `OVERRIDE_OPTIONS' to take account of this. This macro, if
214 defined, is executed once just after all the command options have
215 been parsed.
216
217 On the Alpha, it is used to translate target-option strings into
218 numeric values. */
219
220 #define OVERRIDE_OPTIONS override_options ()
221
222
223 /* Define this macro to change register usage conditional on target flags.
224
225 On the Alpha, we use this to disable the floating-point registers when
226 they don't exist. */
227
228 #define CONDITIONAL_REGISTER_USAGE \
229 { \
230 int i; \
231 if (! TARGET_FPREGS) \
232 for (i = 32; i < 63; i++) \
233 fixed_regs[i] = call_used_regs[i] = 1; \
234 }
235
236
237 /* Show we can debug even without a frame pointer. */
238 #define CAN_DEBUG_WITHOUT_FP
239
240 /* target machine storage layout */
241
242 /* Define the size of `int'. The default is the same as the word size. */
243 #define INT_TYPE_SIZE 32
244
245 /* Define the size of `long long'. The default is the twice the word size. */
246 #define LONG_LONG_TYPE_SIZE 64
247
248 /* The two floating-point formats we support are S-floating, which is
249 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double'
250 and `long double' are T. */
251
252 #define FLOAT_TYPE_SIZE 32
253 #define DOUBLE_TYPE_SIZE 64
254 #define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64)
255
256 /* Define this to set long double type size to use in libgcc2.c, which can
257 not depend on target_flags. */
258 #ifdef __LONG_DOUBLE_128__
259 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128
260 #else
261 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
262 #endif
263
264 /* Work around target_flags dependency in ada/targtyps.c. */
265 #define WIDEST_HARDWARE_FP_SIZE 64
266
267 #define WCHAR_TYPE "unsigned int"
268 #define WCHAR_TYPE_SIZE 32
269
270 /* Define this macro if it is advisable to hold scalars in registers
271 in a wider mode than that declared by the program. In such cases,
272 the value is constrained to be within the bounds of the declared
273 type, but kept valid in the wider mode. The signedness of the
274 extension may differ from that of the type.
275
276 For Alpha, we always store objects in a full register. 32-bit integers
277 are always sign-extended, but smaller objects retain their signedness.
278
279 Note that small vector types can get mapped onto integer modes at the
280 whim of not appearing in alpha-modes.def. We never promoted these
281 values before; don't do so now that we've trimmed the set of modes to
282 those actually implemented in the backend. */
283
284 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
285 if (GET_MODE_CLASS (MODE) == MODE_INT \
286 && (TYPE == NULL || TREE_CODE (TYPE) != VECTOR_TYPE) \
287 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
288 { \
289 if ((MODE) == SImode) \
290 (UNSIGNEDP) = 0; \
291 (MODE) = DImode; \
292 }
293
294 /* Define this if most significant bit is lowest numbered
295 in instructions that operate on numbered bit-fields.
296
297 There are no such instructions on the Alpha, but the documentation
298 is little endian. */
299 #define BITS_BIG_ENDIAN 0
300
301 /* Define this if most significant byte of a word is the lowest numbered.
302 This is false on the Alpha. */
303 #define BYTES_BIG_ENDIAN 0
304
305 /* Define this if most significant word of a multiword number is lowest
306 numbered.
307
308 For Alpha we can decide arbitrarily since there are no machine instructions
309 for them. Might as well be consistent with bytes. */
310 #define WORDS_BIG_ENDIAN 0
311
312 /* Width of a word, in units (bytes). */
313 #define UNITS_PER_WORD 8
314
315 /* Width in bits of a pointer.
316 See also the macro `Pmode' defined below. */
317 #define POINTER_SIZE 64
318
319 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
320 #define PARM_BOUNDARY 64
321
322 /* Boundary (in *bits*) on which stack pointer should be aligned. */
323 #define STACK_BOUNDARY 128
324
325 /* Allocation boundary (in *bits*) for the code of a function. */
326 #define FUNCTION_BOUNDARY 32
327
328 /* Alignment of field after `int : 0' in a structure. */
329 #define EMPTY_FIELD_BOUNDARY 64
330
331 /* Every structure's size must be a multiple of this. */
332 #define STRUCTURE_SIZE_BOUNDARY 8
333
334 /* A bit-field declared as `int' forces `int' alignment for the struct. */
335 #define PCC_BITFIELD_TYPE_MATTERS 1
336
337 /* No data type wants to be aligned rounder than this. */
338 #define BIGGEST_ALIGNMENT 128
339
340 /* For atomic access to objects, must have at least 32-bit alignment
341 unless the machine has byte operations. */
342 #define MINIMUM_ATOMIC_ALIGNMENT ((unsigned int) (TARGET_BWX ? 8 : 32))
343
344 /* Align all constants and variables to at least a word boundary so
345 we can pick up pieces of them faster. */
346 /* ??? Only if block-move stuff knows about different source/destination
347 alignment. */
348 #if 0
349 #define CONSTANT_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
350 #define DATA_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
351 #endif
352
353 /* Set this nonzero if move instructions will actually fail to work
354 when given unaligned data.
355
356 Since we get an error message when we do one, call them invalid. */
357
358 #define STRICT_ALIGNMENT 1
359
360 /* Set this nonzero if unaligned move instructions are extremely slow.
361
362 On the Alpha, they trap. */
363
364 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1
365
366 /* Standard register usage. */
367
368 /* Number of actual hardware registers.
369 The hardware registers are assigned numbers for the compiler
370 from 0 to just below FIRST_PSEUDO_REGISTER.
371 All registers that the compiler knows about must be given numbers,
372 even those that are not normally considered general registers.
373
374 We define all 32 integer registers, even though $31 is always zero,
375 and all 32 floating-point registers, even though $f31 is also
376 always zero. We do not bother defining the FP status register and
377 there are no other registers.
378
379 Since $31 is always zero, we will use register number 31 as the
380 argument pointer. It will never appear in the generated code
381 because we will always be eliminating it in favor of the stack
382 pointer or hardware frame pointer.
383
384 Likewise, we use $f31 for the frame pointer, which will always
385 be eliminated in favor of the hardware frame pointer or the
386 stack pointer. */
387
388 #define FIRST_PSEUDO_REGISTER 64
389
390 /* 1 for registers that have pervasive standard uses
391 and are not available for the register allocator. */
392
393 #define FIXED_REGISTERS \
394 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
395 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
396 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
397 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
398
399 /* 1 for registers not available across function calls.
400 These must include the FIXED_REGISTERS and also any
401 registers that can be used without being saved.
402 The latter must include the registers where values are returned
403 and the register where structure-value addresses are passed.
404 Aside from that, you can include as many other registers as you like. */
405 #define CALL_USED_REGISTERS \
406 {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
407 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \
408 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
409 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
410
411 /* List the order in which to allocate registers. Each register must be
412 listed once, even those in FIXED_REGISTERS. */
413
414 #define REG_ALLOC_ORDER { \
415 1, 2, 3, 4, 5, 6, 7, 8, /* nonsaved integer registers */ \
416 22, 23, 24, 25, 28, /* likewise */ \
417 0, /* likewise, but return value */ \
418 21, 20, 19, 18, 17, 16, /* likewise, but input args */ \
419 27, /* likewise, but OSF procedure value */ \
420 \
421 42, 43, 44, 45, 46, 47, /* nonsaved floating-point registers */ \
422 54, 55, 56, 57, 58, 59, /* likewise */ \
423 60, 61, 62, /* likewise */ \
424 32, 33, /* likewise, but return values */ \
425 53, 52, 51, 50, 49, 48, /* likewise, but input args */ \
426 \
427 9, 10, 11, 12, 13, 14, /* saved integer registers */ \
428 26, /* return address */ \
429 15, /* hard frame pointer */ \
430 \
431 34, 35, 36, 37, 38, 39, /* saved floating-point registers */ \
432 40, 41, /* likewise */ \
433 \
434 29, 30, 31, 63 /* gp, sp, ap, sfp */ \
435 }
436
437 /* Return number of consecutive hard regs needed starting at reg REGNO
438 to hold something of mode MODE.
439 This is ordinarily the length in words of a value of mode MODE
440 but can be less for certain modes in special long registers. */
441
442 #define HARD_REGNO_NREGS(REGNO, MODE) \
443 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
444
445 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
446 On Alpha, the integer registers can hold any mode. The floating-point
447 registers can hold 64-bit integers as well, but not smaller values. */
448
449 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
450 ((REGNO) >= 32 && (REGNO) <= 62 \
451 ? (MODE) == SFmode || (MODE) == DFmode || (MODE) == DImode \
452 || (MODE) == SCmode || (MODE) == DCmode \
453 : 1)
454
455 /* A C expression that is nonzero if a value of mode
456 MODE1 is accessible in mode MODE2 without copying.
457
458 This asymmetric test is true when MODE1 could be put
459 in an FP register but MODE2 could not. */
460
461 #define MODES_TIEABLE_P(MODE1, MODE2) \
462 (HARD_REGNO_MODE_OK (32, (MODE1)) \
463 ? HARD_REGNO_MODE_OK (32, (MODE2)) \
464 : 1)
465
466 /* Specify the registers used for certain standard purposes.
467 The values of these macros are register numbers. */
468
469 /* Alpha pc isn't overloaded on a register that the compiler knows about. */
470 /* #define PC_REGNUM */
471
472 /* Register to use for pushing function arguments. */
473 #define STACK_POINTER_REGNUM 30
474
475 /* Base register for access to local variables of the function. */
476 #define HARD_FRAME_POINTER_REGNUM 15
477
478 /* Value should be nonzero if functions must have frame pointers.
479 Zero means the frame pointer need not be set up (and parms
480 may be accessed via the stack pointer) in functions that seem suitable.
481 This is computed in `reload', in reload1.c. */
482 #define FRAME_POINTER_REQUIRED 0
483
484 /* Base register for access to arguments of the function. */
485 #define ARG_POINTER_REGNUM 31
486
487 /* Base register for access to local variables of function. */
488 #define FRAME_POINTER_REGNUM 63
489
490 /* Register in which static-chain is passed to a function.
491
492 For the Alpha, this is based on an example; the calling sequence
493 doesn't seem to specify this. */
494 #define STATIC_CHAIN_REGNUM 1
495
496 /* The register number of the register used to address a table of
497 static data addresses in memory. */
498 #define PIC_OFFSET_TABLE_REGNUM 29
499
500 /* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM'
501 is clobbered by calls. */
502 /* ??? It is and it isn't. It's required to be valid for a given
503 function when the function returns. It isn't clobbered by
504 current_file functions. Moreover, we do not expose the ldgp
505 until after reload, so we're probably safe. */
506 /* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */
507
508 /* Define the classes of registers for register constraints in the
509 machine description. Also define ranges of constants.
510
511 One of the classes must always be named ALL_REGS and include all hard regs.
512 If there is more than one class, another class must be named NO_REGS
513 and contain no registers.
514
515 The name GENERAL_REGS must be the name of a class (or an alias for
516 another name such as ALL_REGS). This is the class of registers
517 that is allowed by "g" or "r" in a register constraint.
518 Also, registers outside this class are allocated only when
519 instructions express preferences for them.
520
521 The classes must be numbered in nondecreasing order; that is,
522 a larger-numbered class must never be contained completely
523 in a smaller-numbered class.
524
525 For any two classes, it is very desirable that there be another
526 class that represents their union. */
527
528 enum reg_class {
529 NO_REGS, R0_REG, R24_REG, R25_REG, R27_REG,
530 GENERAL_REGS, FLOAT_REGS, ALL_REGS,
531 LIM_REG_CLASSES
532 };
533
534 #define N_REG_CLASSES (int) LIM_REG_CLASSES
535
536 /* Give names of register classes as strings for dump file. */
537
538 #define REG_CLASS_NAMES \
539 {"NO_REGS", "R0_REG", "R24_REG", "R25_REG", "R27_REG", \
540 "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }
541
542 /* Define which registers fit in which classes.
543 This is an initializer for a vector of HARD_REG_SET
544 of length N_REG_CLASSES. */
545
546 #define REG_CLASS_CONTENTS \
547 { {0x00000000, 0x00000000}, /* NO_REGS */ \
548 {0x00000001, 0x00000000}, /* R0_REG */ \
549 {0x01000000, 0x00000000}, /* R24_REG */ \
550 {0x02000000, 0x00000000}, /* R25_REG */ \
551 {0x08000000, 0x00000000}, /* R27_REG */ \
552 {0xffffffff, 0x80000000}, /* GENERAL_REGS */ \
553 {0x00000000, 0x7fffffff}, /* FLOAT_REGS */ \
554 {0xffffffff, 0xffffffff} }
555
556 /* The following macro defines cover classes for Integrated Register
557 Allocator. Cover classes is a set of non-intersected register
558 classes covering all hard registers used for register allocation
559 purpose. Any move between two registers of a cover class should be
560 cheaper than load or store of the registers. The macro value is
561 array of register classes with LIM_REG_CLASSES used as the end
562 marker. */
563
564 #define IRA_COVER_CLASSES \
565 { \
566 GENERAL_REGS, FLOAT_REGS, LIM_REG_CLASSES \
567 }
568
569 /* The same information, inverted:
570 Return the class number of the smallest class containing
571 reg number REGNO. This could be a conditional expression
572 or could index an array. */
573
574 #define REGNO_REG_CLASS(REGNO) \
575 ((REGNO) == 0 ? R0_REG \
576 : (REGNO) == 24 ? R24_REG \
577 : (REGNO) == 25 ? R25_REG \
578 : (REGNO) == 27 ? R27_REG \
579 : (REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS \
580 : GENERAL_REGS)
581
582 /* The class value for index registers, and the one for base regs. */
583 #define INDEX_REG_CLASS NO_REGS
584 #define BASE_REG_CLASS GENERAL_REGS
585
586 /* Given an rtx X being reloaded into a reg required to be
587 in class CLASS, return the class of reg to actually use.
588 In general this is just CLASS; but on some machines
589 in some cases it is preferable to use a more restrictive class. */
590
591 #define PREFERRED_RELOAD_CLASS alpha_preferred_reload_class
592
593 /* If we are copying between general and FP registers, we need a memory
594 location unless the FIX extension is available. */
595
596 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
597 (! TARGET_FIX && (((CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS) \
598 || ((CLASS2) == FLOAT_REGS && (CLASS1) != FLOAT_REGS)))
599
600 /* Specify the mode to be used for memory when a secondary memory
601 location is needed. If MODE is floating-point, use it. Otherwise,
602 widen to a word like the default. This is needed because we always
603 store integers in FP registers in quadword format. This whole
604 area is very tricky! */
605 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
606 (GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE) \
607 : GET_MODE_SIZE (MODE) >= 4 ? (MODE) \
608 : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0))
609
610 /* Return the maximum number of consecutive registers
611 needed to represent mode MODE in a register of class CLASS. */
612
613 #define CLASS_MAX_NREGS(CLASS, MODE) \
614 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
615
616 /* Return the class of registers that cannot change mode from FROM to TO. */
617
618 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
619 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
620 ? reg_classes_intersect_p (FLOAT_REGS, CLASS) : 0)
621
622 /* Define the cost of moving between registers of various classes. Moving
623 between FLOAT_REGS and anything else except float regs is expensive.
624 In fact, we make it quite expensive because we really don't want to
625 do these moves unless it is clearly worth it. Optimizations may
626 reduce the impact of not being able to allocate a pseudo to a
627 hard register. */
628
629 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
630 (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) ? 2 \
631 : TARGET_FIX ? ((CLASS1) == FLOAT_REGS ? 6 : 8) \
632 : 4+2*alpha_memory_latency)
633
634 /* A C expressions returning the cost of moving data of MODE from a register to
635 or from memory.
636
637 On the Alpha, bump this up a bit. */
638
639 extern int alpha_memory_latency;
640 #define MEMORY_MOVE_COST(MODE,CLASS,IN) (2*alpha_memory_latency)
641
642 /* Provide the cost of a branch. Exact meaning under development. */
643 #define BRANCH_COST(speed_p, predictable_p) 5
644
645 /* Stack layout; function entry, exit and calling. */
646
647 /* Define this if pushing a word on the stack
648 makes the stack pointer a smaller address. */
649 #define STACK_GROWS_DOWNWARD
650
651 /* Define this to nonzero if the nominal address of the stack frame
652 is at the high-address end of the local variables;
653 that is, each additional local variable allocated
654 goes at a more negative offset in the frame. */
655 /* #define FRAME_GROWS_DOWNWARD 0 */
656
657 /* Offset within stack frame to start allocating local variables at.
658 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
659 first local allocated. Otherwise, it is the offset to the BEGINNING
660 of the first local allocated. */
661
662 #define STARTING_FRAME_OFFSET 0
663
664 /* If we generate an insn to push BYTES bytes,
665 this says how many the stack pointer really advances by.
666 On Alpha, don't define this because there are no push insns. */
667 /* #define PUSH_ROUNDING(BYTES) */
668
669 /* Define this to be nonzero if stack checking is built into the ABI. */
670 #define STACK_CHECK_BUILTIN 1
671
672 /* Define this if the maximum size of all the outgoing args is to be
673 accumulated and pushed during the prologue. The amount can be
674 found in the variable crtl->outgoing_args_size. */
675 #define ACCUMULATE_OUTGOING_ARGS 1
676
677 /* Offset of first parameter from the argument pointer register value. */
678
679 #define FIRST_PARM_OFFSET(FNDECL) 0
680
681 /* Definitions for register eliminations.
682
683 We have two registers that can be eliminated on the Alpha. First, the
684 frame pointer register can often be eliminated in favor of the stack
685 pointer register. Secondly, the argument pointer register can always be
686 eliminated; it is replaced with either the stack or frame pointer. */
687
688 /* This is an array of structures. Each structure initializes one pair
689 of eliminable registers. The "from" register number is given first,
690 followed by "to". Eliminations of the same "from" register are listed
691 in order of preference. */
692
693 #define ELIMINABLE_REGS \
694 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
695 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
696 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
697 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
698
699 /* Given FROM and TO register numbers, say whether this elimination is allowed.
700 Frame pointer elimination is automatically handled.
701
702 All eliminations are valid since the cases where FP can't be
703 eliminated are already handled. */
704
705 #define CAN_ELIMINATE(FROM, TO) 1
706
707 /* Round up to a multiple of 16 bytes. */
708 #define ALPHA_ROUND(X) (((X) + 15) & ~ 15)
709
710 /* Define the offset between two registers, one to be eliminated, and the other
711 its replacement, at the start of a routine. */
712 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
713 ((OFFSET) = alpha_initial_elimination_offset(FROM, TO))
714
715 /* Define this if stack space is still allocated for a parameter passed
716 in a register. */
717 /* #define REG_PARM_STACK_SPACE */
718
719 /* Value is the number of bytes of arguments automatically
720 popped when returning from a subroutine call.
721 FUNDECL is the declaration node of the function (as a tree),
722 FUNTYPE is the data type of the function (as a tree),
723 or for a library call it is an identifier node for the subroutine name.
724 SIZE is the number of bytes of arguments passed on the stack. */
725
726 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
727
728 /* Define how to find the value returned by a function.
729 VALTYPE is the data type of the value (as a tree).
730 If the precise function being called is known, FUNC is its FUNCTION_DECL;
731 otherwise, FUNC is 0.
732
733 On Alpha the value is found in $0 for integer functions and
734 $f0 for floating-point functions. */
735
736 #define FUNCTION_VALUE(VALTYPE, FUNC) \
737 function_value (VALTYPE, FUNC, VOIDmode)
738
739 /* Define how to find the value returned by a library function
740 assuming the value has mode MODE. */
741
742 #define LIBCALL_VALUE(MODE) \
743 function_value (NULL, NULL, MODE)
744
745 /* 1 if N is a possible register number for a function value
746 as seen by the caller. */
747
748 #define FUNCTION_VALUE_REGNO_P(N) \
749 ((N) == 0 || (N) == 1 || (N) == 32 || (N) == 33)
750
751 /* 1 if N is a possible register number for function argument passing.
752 On Alpha, these are $16-$21 and $f16-$f21. */
753
754 #define FUNCTION_ARG_REGNO_P(N) \
755 (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
756
757 /* Define a data type for recording info about an argument list
758 during the scan of that argument list. This data type should
759 hold all necessary information about the function itself
760 and about the args processed so far, enough to enable macros
761 such as FUNCTION_ARG to determine where the next arg should go.
762
763 On Alpha, this is a single integer, which is a number of words
764 of arguments scanned so far.
765 Thus 6 or more means all following args should go on the stack. */
766
767 #define CUMULATIVE_ARGS int
768
769 /* Initialize a variable CUM of type CUMULATIVE_ARGS
770 for a call to a function whose data type is FNTYPE.
771 For a library call, FNTYPE is 0. */
772
773 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
774 (CUM) = 0
775
776 /* Define intermediate macro to compute the size (in registers) of an argument
777 for the Alpha. */
778
779 #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \
780 ((MODE) == TFmode || (MODE) == TCmode ? 1 \
781 : (((MODE) == BLKmode ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \
782 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
783
784 /* Update the data in CUM to advance over an argument
785 of mode MODE and data type TYPE.
786 (TYPE is null for libcalls where that information may not be available.) */
787
788 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
789 ((CUM) += \
790 (targetm.calls.must_pass_in_stack (MODE, TYPE)) \
791 ? 6 : ALPHA_ARG_SIZE (MODE, TYPE, NAMED))
792
793 /* Determine where to put an argument to a function.
794 Value is zero to push the argument on the stack,
795 or a hard register in which to store the argument.
796
797 MODE is the argument's machine mode.
798 TYPE is the data type of the argument (as a tree).
799 This is null for libcalls where that information may
800 not be available.
801 CUM is a variable of type CUMULATIVE_ARGS which gives info about
802 the preceding args and about the function being called.
803 NAMED is nonzero if this argument is a named parameter
804 (otherwise it is an extra parameter matching an ellipsis).
805
806 On Alpha the first 6 words of args are normally in registers
807 and the rest are pushed. */
808
809 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
810 function_arg((CUM), (MODE), (TYPE), (NAMED))
811
812 /* Try to output insns to set TARGET equal to the constant C if it can be
813 done in less than N insns. Do all computations in MODE. Returns the place
814 where the output has been placed if it can be done and the insns have been
815 emitted. If it would take more than N insns, zero is returned and no
816 insns and emitted. */
817
818 /* Define the information needed to generate branch and scc insns. This is
819 stored from the compare operation. Note that we can't use "rtx" here
820 since it hasn't been defined! */
821
822 struct alpha_compare
823 {
824 struct rtx_def *op0, *op1;
825 int fp_p;
826 };
827
828 extern struct alpha_compare alpha_compare;
829
830 /* Make (or fake) .linkage entry for function call.
831 IS_LOCAL is 0 if name is used in call, 1 if name is used in definition. */
832
833 /* This macro defines the start of an assembly comment. */
834
835 #define ASM_COMMENT_START " #"
836
837 /* This macro produces the initial definition of a function. */
838
839 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
840 alpha_start_function(FILE,NAME,DECL);
841
842 /* This macro closes up a function definition for the assembler. */
843
844 #define ASM_DECLARE_FUNCTION_SIZE(FILE,NAME,DECL) \
845 alpha_end_function(FILE,NAME,DECL)
846
847 /* Output any profiling code before the prologue. */
848
849 #define PROFILE_BEFORE_PROLOGUE 1
850
851 /* Never use profile counters. */
852
853 #define NO_PROFILE_COUNTERS 1
854
855 /* Output assembler code to FILE to increment profiler label # LABELNO
856 for profiling a function entry. Under OSF/1, profiling is enabled
857 by simply passing -pg to the assembler and linker. */
858
859 #define FUNCTION_PROFILER(FILE, LABELNO)
860
861 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
862 the stack pointer does not matter. The value is tested only in
863 functions that have frame pointers.
864 No definition is equivalent to always zero. */
865
866 #define EXIT_IGNORE_STACK 1
867
868 /* Define registers used by the epilogue and return instruction. */
869
870 #define EPILOGUE_USES(REGNO) ((REGNO) == 26)
871
872 /* Output assembler code for a block containing the constant parts
873 of a trampoline, leaving space for the variable parts.
874
875 The trampoline should set the static chain pointer to value placed
876 into the trampoline and should branch to the specified routine.
877 Note that $27 has been set to the address of the trampoline, so we can
878 use it for addressability of the two data items. */
879
880 #define TRAMPOLINE_TEMPLATE(FILE) \
881 do { \
882 fprintf (FILE, "\tldq $1,24($27)\n"); \
883 fprintf (FILE, "\tldq $27,16($27)\n"); \
884 fprintf (FILE, "\tjmp $31,($27),0\n"); \
885 fprintf (FILE, "\tnop\n"); \
886 fprintf (FILE, "\t.quad 0,0\n"); \
887 } while (0)
888
889 /* Section in which to place the trampoline. On Alpha, instructions
890 may only be placed in a text segment. */
891
892 #define TRAMPOLINE_SECTION text_section
893
894 /* Length in units of the trampoline for entering a nested function. */
895
896 #define TRAMPOLINE_SIZE 32
897
898 /* The alignment of a trampoline, in bits. */
899
900 #define TRAMPOLINE_ALIGNMENT 64
901
902 /* Emit RTL insns to initialize the variable parts of a trampoline.
903 FNADDR is an RTX for the address of the function's pure code.
904 CXT is an RTX for the static chain value for the function. */
905
906 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
907 alpha_initialize_trampoline (TRAMP, FNADDR, CXT, 16, 24, 8)
908
909 /* A C expression whose value is RTL representing the value of the return
910 address for the frame COUNT steps up from the current frame.
911 FRAMEADDR is the frame pointer of the COUNT frame, or the frame pointer of
912 the COUNT-1 frame if RETURN_ADDR_IN_PREVIOUS_FRAME is defined. */
913
914 #define RETURN_ADDR_RTX alpha_return_addr
915
916 /* Before the prologue, RA lives in $26. */
917 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, 26)
918 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (26)
919 #define DWARF_ALT_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (64)
920 #define DWARF_ZERO_REG 31
921
922 /* Describe how we implement __builtin_eh_return. */
923 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 16 : INVALID_REGNUM)
924 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 28)
925 #define EH_RETURN_HANDLER_RTX \
926 gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, \
927 crtl->outgoing_args_size))
928
929 /* Addressing modes, and classification of registers for them. */
930
931 /* Macros to check register numbers against specific register classes. */
932
933 /* These assume that REGNO is a hard or pseudo reg number.
934 They give nonzero only if REGNO is a hard reg of the suitable class
935 or a pseudo reg currently allocated to a suitable hard reg.
936 Since they use reg_renumber, they are safe only once reg_renumber
937 has been allocated, which happens in local-alloc.c. */
938
939 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
940 #define REGNO_OK_FOR_BASE_P(REGNO) \
941 ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \
942 || (REGNO) == 63 || reg_renumber[REGNO] == 63)
943
944 /* Maximum number of registers that can appear in a valid memory address. */
945 #define MAX_REGS_PER_ADDRESS 1
946
947 /* Recognize any constant value that is a valid address. For the Alpha,
948 there are only constants none since we want to use LDA to load any
949 symbolic addresses into registers. */
950
951 #define CONSTANT_ADDRESS_P(X) \
952 (GET_CODE (X) == CONST_INT \
953 && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
954
955 /* Include all constant integers and constant doubles, but not
956 floating-point, except for floating-point zero. */
957
958 #define LEGITIMATE_CONSTANT_P alpha_legitimate_constant_p
959
960 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
961 and check its validity for a certain class.
962 We have two alternate definitions for each of them.
963 The usual definition accepts all pseudo regs; the other rejects
964 them unless they have been allocated suitable hard regs.
965 The symbol REG_OK_STRICT causes the latter definition to be used.
966
967 Most source files want to accept pseudo regs in the hope that
968 they will get allocated to the class that the insn wants them to be in.
969 Source files for reload pass need to be strict.
970 After reload, it makes no difference, since pseudo regs have
971 been eliminated by then. */
972
973 /* Nonzero if X is a hard reg that can be used as an index
974 or if it is a pseudo reg. */
975 #define REG_OK_FOR_INDEX_P(X) 0
976
977 /* Nonzero if X is a hard reg that can be used as a base reg
978 or if it is a pseudo reg. */
979 #define NONSTRICT_REG_OK_FOR_BASE_P(X) \
980 (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
981
982 /* ??? Nonzero if X is the frame pointer, or some virtual register
983 that may eliminate to the frame pointer. These will be allowed to
984 have offsets greater than 32K. This is done because register
985 elimination offsets will change the hi/lo split, and if we split
986 before reload, we will require additional instructions. */
987 #define NONSTRICT_REG_OK_FP_BASE_P(X) \
988 (REGNO (X) == 31 || REGNO (X) == 63 \
989 || (REGNO (X) >= FIRST_PSEUDO_REGISTER \
990 && REGNO (X) < LAST_VIRTUAL_REGISTER))
991
992 /* Nonzero if X is a hard reg that can be used as a base reg. */
993 #define STRICT_REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
994
995 #ifdef REG_OK_STRICT
996 #define REG_OK_FOR_BASE_P(X) STRICT_REG_OK_FOR_BASE_P (X)
997 #else
998 #define REG_OK_FOR_BASE_P(X) NONSTRICT_REG_OK_FOR_BASE_P (X)
999 #endif
1000
1001 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
1002 valid memory address for an instruction. */
1003
1004 #ifdef REG_OK_STRICT
1005 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
1006 do { \
1007 if (alpha_legitimate_address_p (MODE, X, 1)) \
1008 goto WIN; \
1009 } while (0)
1010 #else
1011 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
1012 do { \
1013 if (alpha_legitimate_address_p (MODE, X, 0)) \
1014 goto WIN; \
1015 } while (0)
1016 #endif
1017
1018 /* Try machine-dependent ways of modifying an illegitimate address
1019 to be legitimate. If we find one, return the new, valid address.
1020 This macro is used in only one place: `memory_address' in explow.c. */
1021
1022 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1023 do { \
1024 rtx new_x = alpha_legitimize_address (X, NULL_RTX, MODE); \
1025 if (new_x) \
1026 { \
1027 X = new_x; \
1028 goto WIN; \
1029 } \
1030 } while (0)
1031
1032 /* Try a machine-dependent way of reloading an illegitimate address
1033 operand. If we find one, push the reload and jump to WIN. This
1034 macro is used in only one place: `find_reloads_address' in reload.c. */
1035
1036 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \
1037 do { \
1038 rtx new_x = alpha_legitimize_reload_address (X, MODE, OPNUM, TYPE, IND_L); \
1039 if (new_x) \
1040 { \
1041 X = new_x; \
1042 goto WIN; \
1043 } \
1044 } while (0)
1045
1046 /* Go to LABEL if ADDR (a legitimate address expression)
1047 has an effect that depends on the machine mode it is used for.
1048 On the Alpha this is true only for the unaligned modes. We can
1049 simplify this test since we know that the address must be valid. */
1050
1051 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1052 { if (GET_CODE (ADDR) == AND) goto LABEL; }
1053
1054 /* Specify the machine mode that this machine uses
1055 for the index in the tablejump instruction. */
1056 #define CASE_VECTOR_MODE SImode
1057
1058 /* Define as C expression which evaluates to nonzero if the tablejump
1059 instruction expects the table to contain offsets from the address of the
1060 table.
1061
1062 Do not define this if the table should contain absolute addresses.
1063 On the Alpha, the table is really GP-relative, not relative to the PC
1064 of the table, but we pretend that it is PC-relative; this should be OK,
1065 but we should try to find some better way sometime. */
1066 #define CASE_VECTOR_PC_RELATIVE 1
1067
1068 /* Define this as 1 if `char' should by default be signed; else as 0. */
1069 #define DEFAULT_SIGNED_CHAR 1
1070
1071 /* Max number of bytes we can move to or from memory
1072 in one reasonably fast instruction. */
1073
1074 #define MOVE_MAX 8
1075
1076 /* If a memory-to-memory move would take MOVE_RATIO or more simple
1077 move-instruction pairs, we will do a movmem or libcall instead.
1078
1079 Without byte/word accesses, we want no more than four instructions;
1080 with, several single byte accesses are better. */
1081
1082 #define MOVE_RATIO(speed) (TARGET_BWX ? 7 : 2)
1083
1084 /* Largest number of bytes of an object that can be placed in a register.
1085 On the Alpha we have plenty of registers, so use TImode. */
1086 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
1087
1088 /* Nonzero if access to memory by bytes is no faster than for words.
1089 Also nonzero if doing byte operations (specifically shifts) in registers
1090 is undesirable.
1091
1092 On the Alpha, we want to not use the byte operation and instead use
1093 masking operations to access fields; these will save instructions. */
1094
1095 #define SLOW_BYTE_ACCESS 1
1096
1097 /* Define if operations between registers always perform the operation
1098 on the full register even if a narrower mode is specified. */
1099 #define WORD_REGISTER_OPERATIONS
1100
1101 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1102 will either zero-extend or sign-extend. The value of this macro should
1103 be the code that says which one of the two operations is implicitly
1104 done, UNKNOWN if none. */
1105 #define LOAD_EXTEND_OP(MODE) ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND)
1106
1107 /* Define if loading short immediate values into registers sign extends. */
1108 #define SHORT_IMMEDIATES_SIGN_EXTEND
1109
1110 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1111 is done just by pretending it is already truncated. */
1112 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1113
1114 /* The CIX ctlz and cttz instructions return 64 for zero. */
1115 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX)
1116 #define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX)
1117
1118 /* Define the value returned by a floating-point comparison instruction. */
1119
1120 #define FLOAT_STORE_FLAG_VALUE(MODE) \
1121 REAL_VALUE_ATOF ((TARGET_FLOAT_VAX ? "0.5" : "2.0"), (MODE))
1122
1123 /* Canonicalize a comparison from one we don't have to one we do have. */
1124
1125 #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \
1126 do { \
1127 if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \
1128 && (GET_CODE (OP1) == REG || (OP1) == const0_rtx)) \
1129 { \
1130 rtx tem = (OP0); \
1131 (OP0) = (OP1); \
1132 (OP1) = tem; \
1133 (CODE) = swap_condition (CODE); \
1134 } \
1135 if (((CODE) == LT || (CODE) == LTU) \
1136 && GET_CODE (OP1) == CONST_INT && INTVAL (OP1) == 256) \
1137 { \
1138 (CODE) = (CODE) == LT ? LE : LEU; \
1139 (OP1) = GEN_INT (255); \
1140 } \
1141 } while (0)
1142
1143 /* Specify the machine mode that pointers have.
1144 After generation of rtl, the compiler makes no further distinction
1145 between pointers and any other objects of this machine mode. */
1146 #define Pmode DImode
1147
1148 /* Mode of a function address in a call instruction (for indexing purposes). */
1149
1150 #define FUNCTION_MODE Pmode
1151
1152 /* Define this if addresses of constant functions
1153 shouldn't be put through pseudo regs where they can be cse'd.
1154 Desirable on machines where ordinary constants are expensive
1155 but a CALL with constant address is cheap.
1156
1157 We define this on the Alpha so that gen_call and gen_call_value
1158 get to see the SYMBOL_REF (for the hint field of the jsr). It will
1159 then copy it into a register, thus actually letting the address be
1160 cse'ed. */
1161
1162 #define NO_FUNCTION_CSE
1163
1164 /* Define this to be nonzero if shift instructions ignore all but the low-order
1165 few bits. */
1166 #define SHIFT_COUNT_TRUNCATED 1
1167
1168 /* Control the assembler format that we output. */
1169
1170 /* Output to assembler file text saying following lines
1171 may contain character constants, extra white space, comments, etc. */
1172 #define ASM_APP_ON (TARGET_EXPLICIT_RELOCS ? "\t.set\tmacro\n" : "")
1173
1174 /* Output to assembler file text saying following lines
1175 no longer contain unusual constructs. */
1176 #define ASM_APP_OFF (TARGET_EXPLICIT_RELOCS ? "\t.set\tnomacro\n" : "")
1177
1178 #define TEXT_SECTION_ASM_OP "\t.text"
1179
1180 /* Output before read-only data. */
1181
1182 #define READONLY_DATA_SECTION_ASM_OP "\t.rdata"
1183
1184 /* Output before writable data. */
1185
1186 #define DATA_SECTION_ASM_OP "\t.data"
1187
1188 /* How to refer to registers in assembler output.
1189 This sequence is indexed by compiler's hard-register-number (see above). */
1190
1191 #define REGISTER_NAMES \
1192 {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
1193 "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
1194 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \
1195 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \
1196 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \
1197 "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
1198 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\
1199 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"}
1200
1201 /* Strip name encoding when emitting labels. */
1202
1203 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
1204 do { \
1205 const char *name_ = NAME; \
1206 if (*name_ == '@' || *name_ == '%') \
1207 name_ += 2; \
1208 if (*name_ == '*') \
1209 name_++; \
1210 else \
1211 fputs (user_label_prefix, STREAM); \
1212 fputs (name_, STREAM); \
1213 } while (0)
1214
1215 /* Globalizing directive for a label. */
1216 #define GLOBAL_ASM_OP "\t.globl "
1217
1218 /* The prefix to add to user-visible assembler symbols. */
1219
1220 #define USER_LABEL_PREFIX ""
1221
1222 /* This is how to output a label for a jump table. Arguments are the same as
1223 for (*targetm.asm_out.internal_label), except the insn for the jump table is
1224 passed. */
1225
1226 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1227 { ASM_OUTPUT_ALIGN (FILE, 2); (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); }
1228
1229 /* This is how to store into the string LABEL
1230 the symbol_ref name of an internal numbered label where
1231 PREFIX is the class of label and NUM is the number within the class.
1232 This is suitable for output with `assemble_name'. */
1233
1234 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1235 sprintf ((LABEL), "*$%s%ld", (PREFIX), (long)(NUM))
1236
1237 /* We use the default ASCII-output routine, except that we don't write more
1238 than 50 characters since the assembler doesn't support very long lines. */
1239
1240 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1241 do { \
1242 FILE *_hide_asm_out_file = (MYFILE); \
1243 const unsigned char *_hide_p = (const unsigned char *) (MYSTRING); \
1244 int _hide_thissize = (MYLENGTH); \
1245 int _size_so_far = 0; \
1246 { \
1247 FILE *asm_out_file = _hide_asm_out_file; \
1248 const unsigned char *p = _hide_p; \
1249 int thissize = _hide_thissize; \
1250 int i; \
1251 fprintf (asm_out_file, "\t.ascii \""); \
1252 \
1253 for (i = 0; i < thissize; i++) \
1254 { \
1255 register int c = p[i]; \
1256 \
1257 if (_size_so_far ++ > 50 && i < thissize - 4) \
1258 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1259 \
1260 if (c == '\"' || c == '\\') \
1261 putc ('\\', asm_out_file); \
1262 if (c >= ' ' && c < 0177) \
1263 putc (c, asm_out_file); \
1264 else \
1265 { \
1266 fprintf (asm_out_file, "\\%o", c); \
1267 /* After an octal-escape, if a digit follows, \
1268 terminate one string constant and start another. \
1269 The VAX assembler fails to stop reading the escape \
1270 after three digits, so this is the only way we \
1271 can get it to parse the data properly. */ \
1272 if (i < thissize - 1 && ISDIGIT (p[i + 1])) \
1273 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1274 } \
1275 } \
1276 fprintf (asm_out_file, "\"\n"); \
1277 } \
1278 } \
1279 while (0)
1280
1281 /* This is how to output an element of a case-vector that is relative. */
1282
1283 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1284 fprintf (FILE, "\t.%s $L%d\n", TARGET_ABI_WINDOWS_NT ? "long" : "gprel32", \
1285 (VALUE))
1286
1287 /* This is how to output an assembler line
1288 that says to advance the location counter
1289 to a multiple of 2**LOG bytes. */
1290
1291 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1292 if ((LOG) != 0) \
1293 fprintf (FILE, "\t.align %d\n", LOG);
1294
1295 /* This is how to advance the location counter by SIZE bytes. */
1296
1297 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1298 fprintf (FILE, "\t.space "HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
1299
1300 /* This says how to output an assembler line
1301 to define a global common symbol. */
1302
1303 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1304 ( fputs ("\t.comm ", (FILE)), \
1305 assemble_name ((FILE), (NAME)), \
1306 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)))
1307
1308 /* This says how to output an assembler line
1309 to define a local common symbol. */
1310
1311 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1312 ( fputs ("\t.lcomm ", (FILE)), \
1313 assemble_name ((FILE), (NAME)), \
1314 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)))
1315
1316
1317 /* Print operand X (an rtx) in assembler syntax to file FILE.
1318 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1319 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1320
1321 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1322
1323 /* Determine which codes are valid without a following integer. These must
1324 not be alphabetic.
1325
1326 ~ Generates the name of the current function.
1327
1328 / Generates the instruction suffix. The TRAP_SUFFIX and ROUND_SUFFIX
1329 attributes are examined to determine what is appropriate.
1330
1331 , Generates single precision suffix for floating point
1332 instructions (s for IEEE, f for VAX)
1333
1334 - Generates double precision suffix for floating point
1335 instructions (t for IEEE, g for VAX)
1336 */
1337
1338 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1339 ((CODE) == '/' || (CODE) == ',' || (CODE) == '-' || (CODE) == '~' \
1340 || (CODE) == '#' || (CODE) == '*' || (CODE) == '&')
1341
1342 /* Print a memory address as an operand to reference that memory location. */
1343
1344 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1345 print_operand_address((FILE), (ADDR))
1346
1347 /* Tell collect that the object format is ECOFF. */
1348 #define OBJECT_FORMAT_COFF
1349 #define EXTENDED_COFF
1350
1351 /* If we use NM, pass -g to it so it only lists globals. */
1352 #define NM_FLAGS "-pg"
1353
1354 /* Definitions for debugging. */
1355
1356 #define SDB_DEBUGGING_INFO 1 /* generate info for mips-tfile */
1357 #define DBX_DEBUGGING_INFO 1 /* generate embedded stabs */
1358 #define MIPS_DEBUGGING_INFO 1 /* MIPS specific debugging info */
1359
1360 #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
1361 #define PREFERRED_DEBUGGING_TYPE SDB_DEBUG
1362 #endif
1363
1364
1365 /* Correct the offset of automatic variables and arguments. Note that
1366 the Alpha debug format wants all automatic variables and arguments
1367 to be in terms of two different offsets from the virtual frame pointer,
1368 which is the stack pointer before any adjustment in the function.
1369 The offset for the argument pointer is fixed for the native compiler,
1370 it is either zero (for the no arguments case) or large enough to hold
1371 all argument registers.
1372 The offset for the auto pointer is the fourth argument to the .frame
1373 directive (local_offset).
1374 To stay compatible with the native tools we use the same offsets
1375 from the virtual frame pointer and adjust the debugger arg/auto offsets
1376 accordingly. These debugger offsets are set up in output_prolog. */
1377
1378 extern long alpha_arg_offset;
1379 extern long alpha_auto_offset;
1380 #define DEBUGGER_AUTO_OFFSET(X) \
1381 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset)
1382 #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset)
1383
1384 /* mips-tfile doesn't understand .stabd directives. */
1385 #define DBX_OUTPUT_SOURCE_LINE(STREAM, LINE, COUNTER) do { \
1386 dbxout_begin_stabn_sline (LINE); \
1387 dbxout_stab_value_internal_label ("LM", &COUNTER); \
1388 } while (0)
1389
1390 /* We want to use MIPS-style .loc directives for SDB line numbers. */
1391 extern int num_source_filenames;
1392 #define SDB_OUTPUT_SOURCE_LINE(STREAM, LINE) \
1393 fprintf (STREAM, "\t.loc\t%d %d\n", num_source_filenames, LINE)
1394
1395 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
1396 alpha_output_filename (STREAM, NAME)
1397
1398 /* mips-tfile.c limits us to strings of one page. We must underestimate this
1399 number, because the real length runs past this up to the next
1400 continuation point. This is really a dbxout.c bug. */
1401 #define DBX_CONTIN_LENGTH 3000
1402
1403 /* By default, turn on GDB extensions. */
1404 #define DEFAULT_GDB_EXTENSIONS 1
1405
1406 /* Stabs-in-ECOFF can't handle dbxout_function_end(). */
1407 #define NO_DBX_FUNCTION_END 1
1408
1409 /* If we are smuggling stabs through the ALPHA ECOFF object
1410 format, put a comment in front of the .stab<x> operation so
1411 that the ALPHA assembler does not choke. The mips-tfile program
1412 will correctly put the stab into the object file. */
1413
1414 #define ASM_STABS_OP ((TARGET_GAS) ? "\t.stabs\t" : " #.stabs\t")
1415 #define ASM_STABN_OP ((TARGET_GAS) ? "\t.stabn\t" : " #.stabn\t")
1416 #define ASM_STABD_OP ((TARGET_GAS) ? "\t.stabd\t" : " #.stabd\t")
1417
1418 /* Forward references to tags are allowed. */
1419 #define SDB_ALLOW_FORWARD_REFERENCES
1420
1421 /* Unknown tags are also allowed. */
1422 #define SDB_ALLOW_UNKNOWN_REFERENCES
1423
1424 #define PUT_SDB_DEF(a) \
1425 do { \
1426 fprintf (asm_out_file, "\t%s.def\t", \
1427 (TARGET_GAS) ? "" : "#"); \
1428 ASM_OUTPUT_LABELREF (asm_out_file, a); \
1429 fputc (';', asm_out_file); \
1430 } while (0)
1431
1432 #define PUT_SDB_PLAIN_DEF(a) \
1433 do { \
1434 fprintf (asm_out_file, "\t%s.def\t.%s;", \
1435 (TARGET_GAS) ? "" : "#", (a)); \
1436 } while (0)
1437
1438 #define PUT_SDB_TYPE(a) \
1439 do { \
1440 fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \
1441 } while (0)
1442
1443 /* For block start and end, we create labels, so that
1444 later we can figure out where the correct offset is.
1445 The normal .ent/.end serve well enough for functions,
1446 so those are just commented out. */
1447
1448 extern int sdb_label_count; /* block start/end next label # */
1449
1450 #define PUT_SDB_BLOCK_START(LINE) \
1451 do { \
1452 fprintf (asm_out_file, \
1453 "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \
1454 sdb_label_count, \
1455 (TARGET_GAS) ? "" : "#", \
1456 sdb_label_count, \
1457 (LINE)); \
1458 sdb_label_count++; \
1459 } while (0)
1460
1461 #define PUT_SDB_BLOCK_END(LINE) \
1462 do { \
1463 fprintf (asm_out_file, \
1464 "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \
1465 sdb_label_count, \
1466 (TARGET_GAS) ? "" : "#", \
1467 sdb_label_count, \
1468 (LINE)); \
1469 sdb_label_count++; \
1470 } while (0)
1471
1472 #define PUT_SDB_FUNCTION_START(LINE)
1473
1474 #define PUT_SDB_FUNCTION_END(LINE)
1475
1476 #define PUT_SDB_EPILOGUE_END(NAME) ((void)(NAME))
1477
1478 /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
1479 mips-tdump.c to print them out.
1480
1481 These must match the corresponding definitions in gdb/mipsread.c.
1482 Unfortunately, gcc and gdb do not currently share any directories. */
1483
1484 #define CODE_MASK 0x8F300
1485 #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
1486 #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
1487 #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
1488
1489 /* Override some mips-tfile definitions. */
1490
1491 #define SHASH_SIZE 511
1492 #define THASH_SIZE 55
1493
1494 /* Align ecoff symbol tables to avoid OSF1/1.3 nm complaints. */
1495
1496 #define ALIGN_SYMTABLE_OFFSET(OFFSET) (((OFFSET) + 7) & ~7)
1497
1498 /* The system headers under Alpha systems are generally C++-aware. */
1499 #define NO_IMPLICIT_EXTERN_C