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comparison gcc/config/avr/avr.h @ 0:a06113de4d67

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author kent <kent@cr.ie.u-ryukyu.ac.jp>
date Fri, 17 Jul 2009 14:47:48 +0900
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children 77e2b8dfacca
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-1:000000000000 0:a06113de4d67
1 /* Definitions of target machine for GNU compiler,
2 for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
3 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
4 2008, 2009 Free Software Foundation, Inc.
5 Contributed by Denis Chertykov (denisc@overta.ru)
6
7 This file is part of GCC.
8
9 GCC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
13
14 GCC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
22
23 /* Names to predefine in the preprocessor for this target machine. */
24
25 struct base_arch_s {
26 /* Assembler only. */
27 int asm_only;
28
29 /* Core have 'MUL*' instructions. */
30 int have_mul;
31
32 /* Core have 'CALL' and 'JMP' instructions. */
33 int have_jmp_call;
34
35 /* Core have 'MOVW' and 'LPM Rx,Z' instructions. */
36 int have_movw_lpmx;
37
38 /* Core have 'ELPM' instructions. */
39 int have_elpm;
40
41 /* Core have 'ELPM Rx,Z' instructions. */
42 int have_elpmx;
43
44 /* Core have 'EICALL' and 'EIJMP' instructions. */
45 int have_eijmp_eicall;
46
47 /* Reserved. */
48 int reserved;
49
50 const char *const macro;
51 };
52
53 extern const struct base_arch_s *avr_current_arch;
54
55 #define TARGET_CPU_CPP_BUILTINS() \
56 do \
57 { \
58 builtin_define_std ("AVR"); \
59 if (avr_current_arch->macro) \
60 builtin_define (avr_current_arch->macro); \
61 if (avr_extra_arch_macro) \
62 builtin_define (avr_extra_arch_macro); \
63 if (avr_current_arch->have_elpm) \
64 builtin_define ("__AVR_HAVE_RAMPZ__"); \
65 if (avr_current_arch->have_elpm) \
66 builtin_define ("__AVR_HAVE_ELPM__"); \
67 if (avr_current_arch->have_elpmx) \
68 builtin_define ("__AVR_HAVE_ELPMX__"); \
69 if (avr_current_arch->have_movw_lpmx) \
70 { \
71 builtin_define ("__AVR_HAVE_MOVW__"); \
72 builtin_define ("__AVR_HAVE_LPMX__"); \
73 } \
74 if (avr_current_arch->asm_only) \
75 builtin_define ("__AVR_ASM_ONLY__"); \
76 if (avr_current_arch->have_mul) \
77 { \
78 builtin_define ("__AVR_ENHANCED__"); \
79 builtin_define ("__AVR_HAVE_MUL__"); \
80 } \
81 if (avr_current_arch->have_jmp_call) \
82 { \
83 builtin_define ("__AVR_MEGA__"); \
84 builtin_define ("__AVR_HAVE_JMP_CALL__"); \
85 } \
86 if (avr_current_arch->have_eijmp_eicall) \
87 { \
88 builtin_define ("__AVR_HAVE_EIJMP_EICALL__"); \
89 builtin_define ("__AVR_3_BYTE_PC__"); \
90 } \
91 else \
92 { \
93 builtin_define ("__AVR_2_BYTE_PC__"); \
94 } \
95 if (TARGET_NO_INTERRUPTS) \
96 builtin_define ("__NO_INTERRUPTS__"); \
97 } \
98 while (0)
99
100 extern const char *avr_extra_arch_macro;
101
102 #if !defined(IN_LIBGCC2) && !defined(IN_TARGET_LIBS)
103 extern GTY(()) section *progmem_section;
104 #endif
105
106 #define AVR_HAVE_JMP_CALL (avr_current_arch->have_jmp_call && !TARGET_SHORT_CALLS)
107 #define AVR_HAVE_MUL (avr_current_arch->have_mul)
108 #define AVR_HAVE_MOVW (avr_current_arch->have_movw_lpmx)
109 #define AVR_HAVE_LPMX (avr_current_arch->have_movw_lpmx)
110 #define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm)
111 #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
112
113 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
114 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
115
116 #define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");
117
118 #define OVERRIDE_OPTIONS avr_override_options ()
119
120 #define CAN_DEBUG_WITHOUT_FP
121
122 #define BITS_BIG_ENDIAN 0
123 #define BYTES_BIG_ENDIAN 0
124 #define WORDS_BIG_ENDIAN 0
125
126 #ifdef IN_LIBGCC2
127 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */
128 #define UNITS_PER_WORD 4
129 #else
130 /* Width of a word, in units (bytes). */
131 #define UNITS_PER_WORD 1
132 #endif
133
134 #define POINTER_SIZE 16
135
136
137 /* Maximum sized of reasonable data type
138 DImode or Dfmode ... */
139 #define MAX_FIXED_MODE_SIZE 32
140
141 #define PARM_BOUNDARY 8
142
143 #define FUNCTION_BOUNDARY 8
144
145 #define EMPTY_FIELD_BOUNDARY 8
146
147 /* No data type wants to be aligned rounder than this. */
148 #define BIGGEST_ALIGNMENT 8
149
150 #define MAX_OFILE_ALIGNMENT (32768 * 8)
151
152 #define TARGET_VTABLE_ENTRY_ALIGN 8
153
154 #define STRICT_ALIGNMENT 0
155
156 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
157 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
158 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
159 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
160 #define FLOAT_TYPE_SIZE 32
161 #define DOUBLE_TYPE_SIZE 32
162 #define LONG_DOUBLE_TYPE_SIZE 32
163
164 #define DEFAULT_SIGNED_CHAR 1
165
166 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
167 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
168
169 #define WCHAR_TYPE_SIZE 16
170
171 #define FIRST_PSEUDO_REGISTER 36
172
173 #define FIXED_REGISTERS {\
174 1,1,/* r0 r1 */\
175 0,0,/* r2 r3 */\
176 0,0,/* r4 r5 */\
177 0,0,/* r6 r7 */\
178 0,0,/* r8 r9 */\
179 0,0,/* r10 r11 */\
180 0,0,/* r12 r13 */\
181 0,0,/* r14 r15 */\
182 0,0,/* r16 r17 */\
183 0,0,/* r18 r19 */\
184 0,0,/* r20 r21 */\
185 0,0,/* r22 r23 */\
186 0,0,/* r24 r25 */\
187 0,0,/* r26 r27 */\
188 0,0,/* r28 r29 */\
189 0,0,/* r30 r31 */\
190 1,1,/* STACK */\
191 1,1 /* arg pointer */ }
192
193 #define CALL_USED_REGISTERS { \
194 1,1,/* r0 r1 */ \
195 0,0,/* r2 r3 */ \
196 0,0,/* r4 r5 */ \
197 0,0,/* r6 r7 */ \
198 0,0,/* r8 r9 */ \
199 0,0,/* r10 r11 */ \
200 0,0,/* r12 r13 */ \
201 0,0,/* r14 r15 */ \
202 0,0,/* r16 r17 */ \
203 1,1,/* r18 r19 */ \
204 1,1,/* r20 r21 */ \
205 1,1,/* r22 r23 */ \
206 1,1,/* r24 r25 */ \
207 1,1,/* r26 r27 */ \
208 0,0,/* r28 r29 */ \
209 1,1,/* r30 r31 */ \
210 1,1,/* STACK */ \
211 1,1 /* arg pointer */ }
212
213 #define REG_ALLOC_ORDER { \
214 24,25, \
215 18,19, \
216 20,21, \
217 22,23, \
218 30,31, \
219 26,27, \
220 28,29, \
221 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \
222 0,1, \
223 32,33,34,35 \
224 }
225
226 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
227
228
229 #define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
230
231 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
232
233 #define MODES_TIEABLE_P(MODE1, MODE2) 1
234
235 enum reg_class {
236 NO_REGS,
237 R0_REG, /* r0 */
238 POINTER_X_REGS, /* r26 - r27 */
239 POINTER_Y_REGS, /* r28 - r29 */
240 POINTER_Z_REGS, /* r30 - r31 */
241 STACK_REG, /* STACK */
242 BASE_POINTER_REGS, /* r28 - r31 */
243 POINTER_REGS, /* r26 - r31 */
244 ADDW_REGS, /* r24 - r31 */
245 SIMPLE_LD_REGS, /* r16 - r23 */
246 LD_REGS, /* r16 - r31 */
247 NO_LD_REGS, /* r0 - r15 */
248 GENERAL_REGS, /* r0 - r31 */
249 ALL_REGS, LIM_REG_CLASSES
250 };
251
252
253 #define N_REG_CLASSES (int)LIM_REG_CLASSES
254
255 #define REG_CLASS_NAMES { \
256 "NO_REGS", \
257 "R0_REG", /* r0 */ \
258 "POINTER_X_REGS", /* r26 - r27 */ \
259 "POINTER_Y_REGS", /* r28 - r29 */ \
260 "POINTER_Z_REGS", /* r30 - r31 */ \
261 "STACK_REG", /* STACK */ \
262 "BASE_POINTER_REGS", /* r28 - r31 */ \
263 "POINTER_REGS", /* r26 - r31 */ \
264 "ADDW_REGS", /* r24 - r31 */ \
265 "SIMPLE_LD_REGS", /* r16 - r23 */ \
266 "LD_REGS", /* r16 - r31 */ \
267 "NO_LD_REGS", /* r0 - r15 */ \
268 "GENERAL_REGS", /* r0 - r31 */ \
269 "ALL_REGS" }
270
271 #define REG_CLASS_CONTENTS { \
272 {0x00000000,0x00000000}, /* NO_REGS */ \
273 {0x00000001,0x00000000}, /* R0_REG */ \
274 {3 << REG_X,0x00000000}, /* POINTER_X_REGS, r26 - r27 */ \
275 {3 << REG_Y,0x00000000}, /* POINTER_Y_REGS, r28 - r29 */ \
276 {3 << REG_Z,0x00000000}, /* POINTER_Z_REGS, r30 - r31 */ \
277 {0x00000000,0x00000003}, /* STACK_REG, STACK */ \
278 {(3 << REG_Y) | (3 << REG_Z), \
279 0x00000000}, /* BASE_POINTER_REGS, r28 - r31 */ \
280 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z), \
281 0x00000000}, /* POINTER_REGS, r26 - r31 */ \
282 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W), \
283 0x00000000}, /* ADDW_REGS, r24 - r31 */ \
284 {0x00ff0000,0x00000000}, /* SIMPLE_LD_REGS r16 - r23 */ \
285 {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16), \
286 0x00000000}, /* LD_REGS, r16 - r31 */ \
287 {0x0000ffff,0x00000000}, /* NO_LD_REGS r0 - r15 */ \
288 {0xffffffff,0x00000000}, /* GENERAL_REGS, r0 - r31 */ \
289 {0xffffffff,0x00000003} /* ALL_REGS */ \
290 }
291
292 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
293
294 /* The following macro defines cover classes for Integrated Register
295 Allocator. Cover classes is a set of non-intersected register
296 classes covering all hard registers used for register allocation
297 purpose. Any move between two registers of a cover class should be
298 cheaper than load or store of the registers. The macro value is
299 array of register classes with LIM_REG_CLASSES used as the end
300 marker. */
301
302 #define IRA_COVER_CLASSES \
303 { \
304 GENERAL_REGS, LIM_REG_CLASSES \
305 }
306
307 #define BASE_REG_CLASS (reload_completed ? BASE_POINTER_REGS : POINTER_REGS)
308
309 #define INDEX_REG_CLASS NO_REGS
310
311 #define REGNO_OK_FOR_BASE_P(r) (((r) < FIRST_PSEUDO_REGISTER \
312 && ((r) == REG_X \
313 || (r) == REG_Y \
314 || (r) == REG_Z \
315 || (r) == ARG_POINTER_REGNUM)) \
316 || (reg_renumber \
317 && (reg_renumber[r] == REG_X \
318 || reg_renumber[r] == REG_Y \
319 || reg_renumber[r] == REG_Z \
320 || (reg_renumber[r] \
321 == ARG_POINTER_REGNUM))))
322
323 #define REGNO_OK_FOR_INDEX_P(NUM) 0
324
325 #define PREFERRED_RELOAD_CLASS(X, CLASS) preferred_reload_class(X,CLASS)
326
327 #define SMALL_REGISTER_CLASSES 1
328
329 #define CLASS_LIKELY_SPILLED_P(c) class_likely_spilled_p(c)
330
331 #define CLASS_MAX_NREGS(CLASS, MODE) class_max_nregs (CLASS, MODE)
332
333 #define STACK_PUSH_CODE POST_DEC
334
335 #define STACK_GROWS_DOWNWARD
336
337 #define STARTING_FRAME_OFFSET 1
338
339 #define STACK_POINTER_OFFSET 1
340
341 #define FIRST_PARM_OFFSET(FUNDECL) 0
342
343 #define STACK_BOUNDARY 8
344
345 #define STACK_POINTER_REGNUM 32
346
347 #define FRAME_POINTER_REGNUM REG_Y
348
349 #define ARG_POINTER_REGNUM 34
350
351 #define STATIC_CHAIN_REGNUM 2
352
353 #define FRAME_POINTER_REQUIRED frame_pointer_required_p()
354
355 /* Offset from the frame pointer register value to the top of the stack. */
356 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
357
358 #define ELIMINABLE_REGS { \
359 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
360 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
361 ,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}}
362
363 #define CAN_ELIMINATE(FROM, TO) (((FROM) == ARG_POINTER_REGNUM \
364 && (TO) == FRAME_POINTER_REGNUM) \
365 || (((FROM) == FRAME_POINTER_REGNUM \
366 || (FROM) == FRAME_POINTER_REGNUM+1) \
367 && ! FRAME_POINTER_REQUIRED \
368 ))
369
370 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
371 OFFSET = initial_elimination_offset (FROM, TO)
372
373 #define RETURN_ADDR_RTX(count, x) \
374 gen_rtx_MEM (Pmode, memory_address (Pmode, plus_constant (tem, 1)))
375
376 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken
377 for POST_DEC targets (PR27386). */
378 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
379
380 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
381
382 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) (function_arg (&(CUM), MODE, TYPE, NAMED))
383
384 typedef struct avr_args {
385 int nregs; /* # registers available for passing */
386 int regno; /* next available register number */
387 } CUMULATIVE_ARGS;
388
389 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
390 init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
391
392 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
393 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
394
395 #define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r)
396
397 extern int avr_reg_order[];
398
399 #define RET_REGISTER avr_ret_register ()
400
401 #define LIBCALL_VALUE(MODE) avr_libcall_value (MODE)
402
403 #define FUNCTION_VALUE_REGNO_P(N) ((int) (N) == RET_REGISTER)
404
405 #define DEFAULT_PCC_STRUCT_RETURN 0
406
407 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO)
408
409 #define HAVE_POST_INCREMENT 1
410 #define HAVE_PRE_DECREMENT 1
411
412 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
413
414 #define MAX_REGS_PER_ADDRESS 1
415
416 #ifdef REG_OK_STRICT
417 # define GO_IF_LEGITIMATE_ADDRESS(mode, operand, ADDR) \
418 { \
419 if (legitimate_address_p (mode, operand, 1)) \
420 goto ADDR; \
421 }
422 # else
423 # define GO_IF_LEGITIMATE_ADDRESS(mode, operand, ADDR) \
424 { \
425 if (legitimate_address_p (mode, operand, 0)) \
426 goto ADDR; \
427 }
428 #endif
429
430 #define REG_OK_FOR_BASE_NOSTRICT_P(X) \
431 (REGNO (X) >= FIRST_PSEUDO_REGISTER || REG_OK_FOR_BASE_STRICT_P(X))
432
433 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
434
435 #ifdef REG_OK_STRICT
436 # define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X)
437 #else
438 # define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NOSTRICT_P (X)
439 #endif
440
441 #define REG_OK_FOR_INDEX_P(X) 0
442
443 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
444 { \
445 (X) = legitimize_address (X, OLDX, MODE); \
446 if (memory_address_p (MODE, X)) \
447 goto WIN; \
448 }
449
450 #define XEXP_(X,Y) (X)
451
452 /* LEGITIMIZE_RELOAD_ADDRESS will allow register R26/27 to be used, where it
453 is no worse than normal base pointers R28/29 and R30/31. For example:
454 If base offset is greater than 63 bytes or for R++ or --R addressing. */
455
456 #define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN) \
457 do { \
458 if (1&&(GET_CODE (X) == POST_INC || GET_CODE (X) == PRE_DEC)) \
459 { \
460 push_reload (XEXP (X,0), XEXP (X,0), &XEXP (X,0), &XEXP (X,0), \
461 POINTER_REGS, GET_MODE (X),GET_MODE (X) , 0, 0, \
462 OPNUM, RELOAD_OTHER); \
463 goto WIN; \
464 } \
465 if (GET_CODE (X) == PLUS \
466 && REG_P (XEXP (X, 0)) \
467 && reg_equiv_constant[REGNO (XEXP (X, 0))] == 0 \
468 && GET_CODE (XEXP (X, 1)) == CONST_INT \
469 && INTVAL (XEXP (X, 1)) >= 1) \
470 { \
471 int fit = INTVAL (XEXP (X, 1)) <= (64 - GET_MODE_SIZE (MODE)); \
472 if (fit) \
473 { \
474 if (reg_equiv_address[REGNO (XEXP (X, 0))] != 0) \
475 { \
476 int regno = REGNO (XEXP (X, 0)); \
477 rtx mem = make_memloc (X, regno); \
478 push_reload (XEXP (mem,0), NULL, &XEXP (mem,0), NULL, \
479 POINTER_REGS, Pmode, VOIDmode, 0, 0, \
480 1, ADDR_TYPE (TYPE)); \
481 push_reload (mem, NULL_RTX, &XEXP (X, 0), NULL, \
482 BASE_POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
483 OPNUM, TYPE); \
484 goto WIN; \
485 } \
486 } \
487 else if (! (frame_pointer_needed && XEXP (X,0) == frame_pointer_rtx)) \
488 { \
489 push_reload (X, NULL_RTX, &X, NULL, \
490 POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
491 OPNUM, TYPE); \
492 goto WIN; \
493 } \
494 } \
495 } while(0)
496
497 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
498
499 #define LEGITIMATE_CONSTANT_P(X) 1
500
501 #define REGISTER_MOVE_COST(MODE, FROM, TO) ((FROM) == STACK_REG ? 6 \
502 : (TO) == STACK_REG ? 12 \
503 : 2)
504
505 #define MEMORY_MOVE_COST(MODE,CLASS,IN) ((MODE)==QImode ? 2 : \
506 (MODE)==HImode ? 4 : \
507 (MODE)==SImode ? 8 : \
508 (MODE)==SFmode ? 8 : 16)
509
510 #define BRANCH_COST(speed_p, predictable_p) 0
511
512 #define SLOW_BYTE_ACCESS 0
513
514 #define NO_FUNCTION_CSE
515
516 #define TEXT_SECTION_ASM_OP "\t.text"
517
518 #define DATA_SECTION_ASM_OP "\t.data"
519
520 #define BSS_SECTION_ASM_OP "\t.section .bss"
521
522 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
523 There are no shared libraries on this target, and these sections are
524 placed in the read-only program memory, so they are not writable. */
525
526 #undef CTORS_SECTION_ASM_OP
527 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
528
529 #undef DTORS_SECTION_ASM_OP
530 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
531
532 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
533
534 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
535
536 #define SUPPORTS_INIT_PRIORITY 0
537
538 #define JUMP_TABLES_IN_TEXT_SECTION 0
539
540 #define ASM_COMMENT_START " ; "
541
542 #define ASM_APP_ON "/* #APP */\n"
543
544 #define ASM_APP_OFF "/* #NOAPP */\n"
545
546 /* Switch into a generic section. */
547 #define TARGET_ASM_NAMED_SECTION default_elf_asm_named_section
548 #define TARGET_ASM_INIT_SECTIONS avr_asm_init_sections
549
550 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) gas_output_ascii (FILE,P,SIZE)
551
552 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
553
554 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
555 do { \
556 fputs ("\t.comm ", (STREAM)); \
557 assemble_name ((STREAM), (NAME)); \
558 fprintf ((STREAM), ",%lu,1\n", (unsigned long)(SIZE)); \
559 } while (0)
560
561 #define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \
562 asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED))
563
564 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
565 do { \
566 fputs ("\t.lcomm ", (STREAM)); \
567 assemble_name ((STREAM), (NAME)); \
568 fprintf ((STREAM), ",%d\n", (int)(SIZE)); \
569 } while (0)
570
571 #undef TYPE_ASM_OP
572 #undef SIZE_ASM_OP
573 #undef WEAK_ASM_OP
574 #define TYPE_ASM_OP "\t.type\t"
575 #define SIZE_ASM_OP "\t.size\t"
576 #define WEAK_ASM_OP "\t.weak\t"
577 /* Define the strings used for the special svr4 .type and .size directives.
578 These strings generally do not vary from one system running svr4 to
579 another, but if a given system (e.g. m88k running svr) needs to use
580 different pseudo-op names for these, they may be overridden in the
581 file which includes this one. */
582
583
584 #undef TYPE_OPERAND_FMT
585 #define TYPE_OPERAND_FMT "@%s"
586 /* The following macro defines the format used to output the second
587 operand of the .type assembler directive. Different svr4 assemblers
588 expect various different forms for this operand. The one given here
589 is just a default. You may need to override it in your machine-
590 specific tm.h file (depending upon the particulars of your assembler). */
591
592 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
593 avr_asm_declare_function_name ((FILE), (NAME), (DECL))
594
595 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
596 do { \
597 if (!flag_inhibit_size_directive) \
598 ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \
599 } while (0)
600
601 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
602 do { \
603 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
604 size_directive_output = 0; \
605 if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \
606 { \
607 size_directive_output = 1; \
608 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, \
609 int_size_in_bytes (TREE_TYPE (DECL))); \
610 } \
611 ASM_OUTPUT_LABEL(FILE, NAME); \
612 } while (0)
613
614 #undef ASM_FINISH_DECLARE_OBJECT
615 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
616 do { \
617 const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
618 HOST_WIDE_INT size; \
619 if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
620 && ! AT_END && TOP_LEVEL \
621 && DECL_INITIAL (DECL) == error_mark_node \
622 && !size_directive_output) \
623 { \
624 size_directive_output = 1; \
625 size = int_size_in_bytes (TREE_TYPE (DECL)); \
626 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, name, size); \
627 } \
628 } while (0)
629
630
631 #define ESCAPES \
632 "\1\1\1\1\1\1\1\1btn\1fr\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
633 \0\0\"\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\
634 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\\\0\0\0\
635 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\
636 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
637 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
638 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
639 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1"
640 /* A table of bytes codes used by the ASM_OUTPUT_ASCII and
641 ASM_OUTPUT_LIMITED_STRING macros. Each byte in the table
642 corresponds to a particular byte value [0..255]. For any
643 given byte value, if the value in the corresponding table
644 position is zero, the given character can be output directly.
645 If the table value is 1, the byte must be output as a \ooo
646 octal escape. If the tables value is anything else, then the
647 byte value should be output as a \ followed by the value
648 in the table. Note that we can use standard UN*X escape
649 sequences for many control characters, but we don't use
650 \a to represent BEL because some svr4 assemblers (e.g. on
651 the i386) don't know about that. Also, we don't use \v
652 since some versions of gas, such as 2.2 did not accept it. */
653
654 #define STRING_LIMIT ((unsigned) 64)
655 #define STRING_ASM_OP "\t.string\t"
656 /* Some svr4 assemblers have a limit on the number of characters which
657 can appear in the operand of a .string directive. If your assembler
658 has such a limitation, you should define STRING_LIMIT to reflect that
659 limit. Note that at least some svr4 assemblers have a limit on the
660 actual number of bytes in the double-quoted string, and that they
661 count each character in an escape sequence as one byte. Thus, an
662 escape sequence like \377 would count as four bytes.
663
664 If your target assembler doesn't support the .string directive, you
665 should define this to zero. */
666
667 /* Globalizing directive for a label. */
668 #define GLOBAL_ASM_OP ".global\t"
669
670 #define SET_ASM_OP "\t.set\t"
671
672 #define ASM_WEAKEN_LABEL(FILE, NAME) \
673 do \
674 { \
675 fputs ("\t.weak\t", (FILE)); \
676 assemble_name ((FILE), (NAME)); \
677 fputc ('\n', (FILE)); \
678 } \
679 while (0)
680
681 #define SUPPORTS_WEAK 1
682
683 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
684 sprintf (STRING, "*.%s%lu", PREFIX, (unsigned long)(NUM))
685
686 #define HAS_INIT_SECTION 1
687
688 #define REGISTER_NAMES { \
689 "r0","r1","r2","r3","r4","r5","r6","r7", \
690 "r8","r9","r10","r11","r12","r13","r14","r15", \
691 "r16","r17","r18","r19","r20","r21","r22","r23", \
692 "r24","r25","r26","r27","r28","r29","r30","r31", \
693 "__SP_L__","__SP_H__","argL","argH"}
694
695 #define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop)
696
697 #define PRINT_OPERAND(STREAM, X, CODE) print_operand (STREAM, X, CODE)
698
699 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '~' || (CODE) == '!')
700
701 #define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
702
703 #define USER_LABEL_PREFIX ""
704
705 #define ASSEMBLER_DIALECT AVR_HAVE_MOVW
706
707 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \
708 { \
709 gcc_assert (REGNO < 32); \
710 fprintf (STREAM, "\tpush\tr%d", REGNO); \
711 }
712
713 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \
714 { \
715 gcc_assert (REGNO < 32); \
716 fprintf (STREAM, "\tpop\tr%d", REGNO); \
717 }
718
719 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
720 avr_output_addr_vec_elt(STREAM, VALUE)
721
722 #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, TABLE) \
723 (switch_to_section (progmem_section), \
724 (*targetm.asm_out.internal_label) (STREAM, PREFIX, NUM))
725
726 #define ASM_OUTPUT_SKIP(STREAM, N) \
727 fprintf (STREAM, "\t.skip %lu,0\n", (unsigned long)(N))
728
729 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
730 do { \
731 if ((POWER) > 1) \
732 fprintf (STREAM, "\t.p2align\t%d\n", POWER); \
733 } while (0)
734
735 #define CASE_VECTOR_MODE HImode
736
737 extern int avr_case_values_threshold;
738
739 #define CASE_VALUES_THRESHOLD avr_case_values_threshold
740
741 #undef WORD_REGISTER_OPERATIONS
742
743 #define MOVE_MAX 4
744
745 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
746
747 #define Pmode HImode
748
749 #define FUNCTION_MODE HImode
750
751 #define DOLLARS_IN_IDENTIFIERS 0
752
753 #define NO_DOLLAR_IN_LABEL 1
754
755 #define TRAMPOLINE_TEMPLATE(FILE) \
756 internal_error ("trampolines not supported")
757
758 #define TRAMPOLINE_SIZE 4
759
760 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
761 { \
762 emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 2)), CXT); \
763 emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 6)), FNADDR); \
764 }
765 /* Store in cc_status the expressions
766 that the condition codes will describe
767 after execution of an instruction whose pattern is EXP.
768 Do not alter them if the instruction would not alter the cc's. */
769
770 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
771
772 /* The add insns don't set overflow in a usable way. */
773 #define CC_OVERFLOW_UNUSABLE 01000
774 /* The mov,and,or,xor insns don't set carry. That's ok though as the
775 Z bit is all we need when doing unsigned comparisons on the result of
776 these insns (since they're always with 0). However, conditions.h has
777 CC_NO_OVERFLOW defined for this purpose. Rename it to something more
778 understandable. */
779 #define CC_NO_CARRY CC_NO_OVERFLOW
780
781
782 /* Output assembler code to FILE to increment profiler label # LABELNO
783 for profiling a function entry. */
784
785 #define FUNCTION_PROFILER(FILE, LABELNO) \
786 fprintf (FILE, "/* profiler %d */", (LABELNO))
787
788 #define ADJUST_INSN_LENGTH(INSN, LENGTH) (LENGTH =\
789 adjust_insn_length (INSN, LENGTH))
790
791 #define CPP_SPEC "%{posix:-D_POSIX_SOURCE}"
792
793 #define CC1_SPEC "%{profile:-p}"
794
795 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
796 %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
797 %{!fexceptions:-fno-exceptions}"
798 /* A C string constant that tells the GCC driver program options to
799 pass to `cc1plus'. */
800
801 #define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;mmcu=avr35:-mmcu=avr3;mmcu=avr31:-mmcu=avr3;mmcu=avr51:-mmcu=avr5;\
802 mmcu=*:-mmcu=%*}"
803
804 #define LINK_SPEC "\
805 %{mrelax:--relax\
806 %{mpmem-wrap-around:%{mmcu=at90usb8*:--pmem-wrap-around=8k}\
807 %{mmcu=atmega16*:--pmem-wrap-around=16k}\
808 %{mmcu=atmega32*|\
809 mmcu=at90can32*:--pmem-wrap-around=32k}\
810 %{mmcu=atmega64*|\
811 mmcu=at90can64*|\
812 mmcu=at90usb64*:--pmem-wrap-around=64k}}}\
813 %{!mmcu*: -m avr2}\
814 %{mmcu=at90s1200|\
815 mmcu=attiny11|\
816 mmcu=attiny12|\
817 mmcu=attiny15|\
818 mmcu=attiny28: -m avr1}\
819 %{mmcu=attiny22|\
820 mmcu=attiny26|\
821 mmcu=at90s2*|\
822 mmcu=at90s4*|\
823 mmcu=at90s8*|\
824 mmcu=at90c8*|\
825 mmcu=at86rf401|\
826 mmcu=ata6289|\
827 mmcu=attiny13*|\
828 mmcu=attiny2313|\
829 mmcu=attiny24|\
830 mmcu=attiny25|\
831 mmcu=attiny261|\
832 mmcu=attiny4*|\
833 mmcu=attiny8*: -m avr2}\
834 %{mmcu=atmega103|\
835 mmcu=at43*|\
836 mmcu=at76*|\
837 mmcu=at90usb82|\
838 mmcu=at90usb162|\
839 mmcu=attiny16*|\
840 mmcu=attiny32*: -m avr3}\
841 %{mmcu=atmega8*|\
842 mmcu=atmega4*|\
843 mmcu=at90pwm1|\
844 mmcu=at90pwm2|\
845 mmcu=at90pwm2b|\
846 mmcu=at90pwm3|\
847 mmcu=at90pwm3b|\
848 mmcu=at90pwm81: -m avr4}\
849 %{mmcu=atmega16*|\
850 mmcu=atmega32*|\
851 mmcu=atmega406|\
852 mmcu=atmega64*|\
853 mmcu=atmega128*|\
854 mmcu=at90can*|\
855 mmcu=at90pwm216|\
856 mmcu=at90pwm316|\
857 mmcu=at90scr100|\
858 mmcu=at90usb64*|\
859 mmcu=at90usb128*|\
860 mmcu=at94k|\
861 mmcu=m3000*|\
862 mmcu=m3001*: -m avr5}\
863 %{mmcu=atmega256*:-m avr6}\
864 %{mmcu=atmega324*|\
865 mmcu=atmega325*|\
866 mmcu=atmega328p|\
867 mmcu=atmega329*|\
868 mmcu=atmega406|\
869 mmcu=atmega48*|\
870 mmcu=atmega88*|\
871 mmcu=atmega64|\
872 mmcu=atmega644*|\
873 mmcu=atmega645*|\
874 mmcu=atmega649*|\
875 mmcu=atmega128|\
876 mmcu=atmega1284p|\
877 mmcu=atmega162|\
878 mmcu=atmega164*|\
879 mmcu=atmega165*|\
880 mmcu=atmega168*|\
881 mmcu=atmega169*|\
882 mmcu=atmega4hv*|\
883 mmcu=atmega8hv*|\
884 mmcu=atmega16hv*|\
885 mmcu=atmega32hv*|\
886 mmcu=attiny48|\
887 mmcu=attiny88|\
888 mmcu=attiny87|\
889 mmcu=attiny167|\
890 mmcu=attiny327|\
891 mmcu=at90can*|\
892 mmcu=at90pwm*|\
893 mmcu=atmega8c1|\
894 mmcu=atmega16c1|\
895 mmcu=atmega32c1|\
896 mmcu=atmega64c1|\
897 mmcu=atmega8m1|\
898 mmcu=atmega16m1|\
899 mmcu=atmega32m1|\
900 mmcu=atmega64m1|\
901 mmcu=atmega16u4|\
902 mmcu=atmega32u*|\
903 mmcu=at90scr100|\
904 mmcu=ata6289|\
905 mmcu=at90usb*: -Tdata 0x800100}\
906 %{mmcu=atmega640|\
907 mmcu=atmega1280|\
908 mmcu=atmega1281|\
909 mmcu=atmega256*|\
910 mmcu=atmega128rfa1: -Tdata 0x800200}\
911 %{mmcu=m3000*|\
912 mmcu=m3001*: -Tdata 0x801000}"
913
914 #define LIB_SPEC \
915 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
916
917 #define LIBSTDCXX "-lgcc"
918 /* No libstdc++ for now. Empty string doesn't work. */
919
920 #define LIBGCC_SPEC \
921 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}"
922
923 #define STARTFILE_SPEC "%(crt_binutils)"
924
925 #define ENDFILE_SPEC ""
926
927 #define CRT_BINUTILS_SPECS "\
928 %{mmcu=at90s1200|mmcu=avr1:crts1200.o%s} \
929 %{mmcu=attiny11:crttn11.o%s} \
930 %{mmcu=attiny12:crttn12.o%s} \
931 %{mmcu=attiny15:crttn15.o%s} \
932 %{mmcu=attiny28:crttn28.o%s} \
933 %{!mmcu*|mmcu=at90s8515|mmcu=avr2:crts8515.o%s} \
934 %{mmcu=at90s2313:crts2313.o%s} \
935 %{mmcu=at90s2323:crts2323.o%s} \
936 %{mmcu=at90s2333:crts2333.o%s} \
937 %{mmcu=at90s2343:crts2343.o%s} \
938 %{mmcu=attiny22:crttn22.o%s} \
939 %{mmcu=attiny26:crttn26.o%s} \
940 %{mmcu=at90s4433:crts4433.o%s} \
941 %{mmcu=at90s4414:crts4414.o%s} \
942 %{mmcu=at90s4434:crts4434.o%s} \
943 %{mmcu=at90c8534:crtc8534.o%s} \
944 %{mmcu=at90s8535:crts8535.o%s} \
945 %{mmcu=at86rf401:crt86401.o%s} \
946 %{mmcu=attiny13:crttn13.o%s} \
947 %{mmcu=attiny13a:crttn13a.o%s} \
948 %{mmcu=attiny2313|mmcu=avr25:crttn2313.o%s} \
949 %{mmcu=attiny24:crttn24.o%s} \
950 %{mmcu=attiny44:crttn44.o%s} \
951 %{mmcu=attiny84:crttn84.o%s} \
952 %{mmcu=attiny25:crttn25.o%s} \
953 %{mmcu=attiny45:crttn45.o%s} \
954 %{mmcu=attiny85:crttn85.o%s} \
955 %{mmcu=attiny261:crttn261.o%s} \
956 %{mmcu=attiny461:crttn461.o%s} \
957 %{mmcu=attiny861:crttn861.o%s} \
958 %{mmcu=attiny43u:crttn43u.o%s} \
959 %{mmcu=attiny87:crttn87.o%s} \
960 %{mmcu=attiny48:crttn48.o%s} \
961 %{mmcu=attiny88:crttn88.o%s} \
962 %{mmcu=ata6289:crta6289.o%s} \
963 %{mmcu=at43usb355|mmcu=avr3:crt43355.o%s} \
964 %{mmcu=at76c711:crt76711.o%s} \
965 %{mmcu=atmega103|mmcu=avr31:crtm103.o%s} \
966 %{mmcu=at43usb320:crt43320.o%s} \
967 %{mmcu=at90usb162|mmcu=avr35:crtusb162.o%s} \
968 %{mmcu=at90usb82:crtusb82.o%s} \
969 %{mmcu=attiny167:crttn167.o%s} \
970 %{mmcu=attiny327:crttn327.o%s} \
971 %{mmcu=atmega8|mmcu=avr4:crtm8.o%s} \
972 %{mmcu=atmega48:crtm48.o%s} \
973 %{mmcu=atmega48p:crtm48p.o%s} \
974 %{mmcu=atmega88:crtm88.o%s} \
975 %{mmcu=atmega88p:crtm88p.o%s} \
976 %{mmcu=atmega8515:crtm8515.o%s} \
977 %{mmcu=atmega8535:crtm8535.o%s} \
978 %{mmcu=atmega8c1:crtm8c1.o%s} \
979 %{mmcu=atmega8m1:crtm8m1.o%s} \
980 %{mmcu=at90pwm1:crt90pwm1.o%s} \
981 %{mmcu=at90pwm2:crt90pwm2.o%s} \
982 %{mmcu=at90pwm2b:crt90pwm2b.o%s} \
983 %{mmcu=at90pwm3:crt90pwm3.o%s} \
984 %{mmcu=at90pwm3b:crt90pwm3b.o%s} \
985 %{mmcu=at90pwm81:crt90pwm81.o%s} \
986 %{mmcu=atmega16:crtm16.o%s} \
987 %{mmcu=atmega161|mmcu=avr5:crtm161.o%s} \
988 %{mmcu=atmega162:crtm162.o%s} \
989 %{mmcu=atmega163:crtm163.o%s} \
990 %{mmcu=atmega164p:crtm164p.o%s} \
991 %{mmcu=atmega165:crtm165.o%s} \
992 %{mmcu=atmega165p:crtm165p.o%s} \
993 %{mmcu=atmega168:crtm168.o%s} \
994 %{mmcu=atmega168p:crtm168p.o%s} \
995 %{mmcu=atmega169:crtm169.o%s} \
996 %{mmcu=atmega169p:crtm169p.o%s} \
997 %{mmcu=atmega32:crtm32.o%s} \
998 %{mmcu=atmega323:crtm323.o%s} \
999 %{mmcu=atmega324p:crtm324p.o%s} \
1000 %{mmcu=atmega325:crtm325.o%s} \
1001 %{mmcu=atmega325p:crtm325p.o%s} \
1002 %{mmcu=atmega3250:crtm3250.o%s} \
1003 %{mmcu=atmega3250p:crtm3250p.o%s} \
1004 %{mmcu=atmega328p:crtm328p.o%s} \
1005 %{mmcu=atmega329:crtm329.o%s} \
1006 %{mmcu=atmega329p:crtm329p.o%s} \
1007 %{mmcu=atmega3290:crtm3290.o%s} \
1008 %{mmcu=atmega3290p:crtm3290p.o%s} \
1009 %{mmcu=atmega406:crtm406.o%s} \
1010 %{mmcu=atmega64:crtm64.o%s} \
1011 %{mmcu=atmega640:crtm640.o%s} \
1012 %{mmcu=atmega644:crtm644.o%s} \
1013 %{mmcu=atmega644p:crtm644p.o%s} \
1014 %{mmcu=atmega645:crtm645.o%s} \
1015 %{mmcu=atmega6450:crtm6450.o%s} \
1016 %{mmcu=atmega649:crtm649.o%s} \
1017 %{mmcu=atmega6490:crtm6490.o%s} \
1018 %{mmcu=atmega8hva:crtm8hva.o%s} \
1019 %{mmcu=atmega16hva:crtm16hva.o%s} \
1020 %{mmcu=atmega16hvb:crtm16hvb.o%s} \
1021 %{mmcu=atmega32hvb:crtm32hvb.o%s} \
1022 %{mmcu=atmega4hvd:crtm4hvd.o%s} \
1023 %{mmcu=atmega8hvd:crtm8hvd.o%s} \
1024 %{mmcu=at90can32:crtcan32.o%s} \
1025 %{mmcu=at90can64:crtcan64.o%s} \
1026 %{mmcu=at90pwm216:crt90pwm216.o%s} \
1027 %{mmcu=at90pwm316:crt90pwm316.o%s} \
1028 %{mmcu=atmega16c1:crtm16c1.o%s} \
1029 %{mmcu=atmega32c1:crtm32c1.o%s} \
1030 %{mmcu=atmega64c1:crtm64c1.o%s} \
1031 %{mmcu=atmega16m1:crtm16m1.o%s} \
1032 %{mmcu=atmega32m1:crtm32m1.o%s} \
1033 %{mmcu=atmega64m1:crtm64m1.o%s} \
1034 %{mmcu=atmega16u4:crtm16u4.o%s} \
1035 %{mmcu=atmega32u4:crtm32u4.o%s} \
1036 %{mmcu=atmega32u6:crtm32u6.o%s} \
1037 %{mmcu=at90scr100:crt90scr100.o%s} \
1038 %{mmcu=at90usb646:crtusb646.o%s} \
1039 %{mmcu=at90usb647:crtusb647.o%s} \
1040 %{mmcu=at94k:crtat94k.o%s} \
1041 %{mmcu=atmega128|mmcu=avr51:crtm128.o%s} \
1042 %{mmcu=atmega1280:crtm1280.o%s} \
1043 %{mmcu=atmega1281:crtm1281.o%s} \
1044 %{mmcu=atmega1284p:crtm1284p.o%s} \
1045 %{mmcu=at90can128:crtcan128.o%s} \
1046 %{mmcu=atmega128rfa1:crtm128rfa1.o%s} \
1047 %{mmcu=at90usb1286:crtusb1286.o%s} \
1048 %{mmcu=at90usb1287:crtusb1287.o%s} \
1049 %{mmcu=m3000f:crtm3000f.o%s} \
1050 %{mmcu=m3000s:crtm3000s.o%s} \
1051 %{mmcu=m3001b:crtm3001b.o%s} \
1052 %{mmcu=atmega2560|mmcu=avr6:crtm2560.o%s} \
1053 %{mmcu=atmega2561:crtm2561.o%s}"
1054
1055 #define EXTRA_SPECS {"crt_binutils", CRT_BINUTILS_SPECS},
1056
1057 /* This is the default without any -mmcu=* option (AT90S*). */
1058 #define MULTILIB_DEFAULTS { "mmcu=avr2" }
1059
1060 /* This is undefined macro for collect2 disabling */
1061 #define LINKER_NAME "ld"
1062
1063 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
1064 TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
1065
1066 /* Note that the other files fail to use these
1067 in some of the places where they should. */
1068
1069 #if defined(__STDC__) || defined(ALMOST_STDC)
1070 #define AS2(a,b,c) #a " " #b "," #c
1071 #define AS2C(b,c) " " #b "," #c
1072 #define AS3(a,b,c,d) #a " " #b "," #c "," #d
1073 #define AS1(a,b) #a " " #b
1074 #else
1075 #define AS1(a,b) "a b"
1076 #define AS2(a,b,c) "a b,c"
1077 #define AS2C(b,c) " b,c"
1078 #define AS3(a,b,c,d) "a b,c,d"
1079 #endif
1080 #define OUT_AS1(a,b) output_asm_insn (AS1(a,b), operands)
1081 #define OUT_AS2(a,b,c) output_asm_insn (AS2(a,b,c), operands)
1082 #define CR_TAB "\n\t"
1083
1084 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
1085
1086 #define DWARF2_DEBUGGING_INFO 1
1087
1088 #define DWARF2_ADDR_SIZE 4
1089
1090 #define OBJECT_FORMAT_ELF
1091
1092 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
1093 avr_hard_regno_rename_ok (OLD_REG, NEW_REG)
1094
1095 /* A C structure for machine-specific, per-function data.
1096 This is added to the cfun structure. */
1097 struct machine_function GTY(())
1098 {
1099 /* 'true' - if the current function is a leaf function. */
1100 int is_leaf;
1101
1102 /* 'true' - if current function is a naked function. */
1103 int is_naked;
1104
1105 /* 'true' - if current function is an interrupt function
1106 as specified by the "interrupt" attribute. */
1107 int is_interrupt;
1108
1109 /* 'true' - if current function is a signal function
1110 as specified by the "signal" attribute. */
1111 int is_signal;
1112
1113 /* 'true' - if current function is a 'task' function
1114 as specified by the "OS_task" attribute. */
1115 int is_OS_task;
1116
1117 /* 'true' - if current function is a 'main' function
1118 as specified by the "OS_main" attribute. */
1119 int is_OS_main;
1120 };