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comparison gcc/config/fr30/predicates.md @ 0:a06113de4d67

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author kent <kent@cr.ie.u-ryukyu.ac.jp>
date Fri, 17 Jul 2009 14:47:48 +0900
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-1:000000000000 0:a06113de4d67
1 ;; Predicate definitions for FR30.
2 ;; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
3 ;;
4 ;; This file is part of GCC.
5 ;;
6 ;; GCC is free software; you can redistribute it and/or modify
7 ;; it under the terms of the GNU General Public License as published by
8 ;; the Free Software Foundation; either version 3, or (at your option)
9 ;; any later version.
10 ;;
11 ;; GCC is distributed in the hope that it will be useful,
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ;; GNU General Public License for more details.
15 ;;
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING3. If not see
18 ;; <http://www.gnu.org/licenses/>.
19
20 ;; Returns true if OP is an integer value suitable for use in an
21 ;; ADDSP instruction.
22
23 (define_predicate "stack_add_operand"
24 (match_code "const_int")
25 {
26 return
27 (GET_CODE (op) == CONST_INT
28 && INTVAL (op) >= -512
29 && INTVAL (op) <= 508
30 && ((INTVAL (op) & 3) == 0));
31 })
32
33 ;; Returns true if OP is hard register in the range 8 - 15.
34
35 (define_predicate "high_register_operand"
36 (match_code "reg")
37 {
38 return
39 (GET_CODE (op) == REG
40 && REGNO (op) <= 15
41 && REGNO (op) >= 8);
42 })
43
44 ;; Returns true if OP is hard register in the range 0 - 7.
45
46 (define_predicate "low_register_operand"
47 (match_code "reg")
48 {
49 return
50 (GET_CODE (op) == REG
51 && REGNO (op) <= 7);
52 })
53
54 ;; Returns true if OP is suitable for use in a CALL insn.
55
56 (define_predicate "call_operand"
57 (match_code "mem")
58 {
59 return (GET_CODE (op) == MEM
60 && (GET_CODE (XEXP (op, 0)) == SYMBOL_REF
61 || GET_CODE (XEXP (op, 0)) == REG));
62 })
63
64 ;; Returns TRUE if OP is a valid operand of a DImode operation.
65
66 (define_predicate "di_operand"
67 (match_code "const_int,const_double,reg,mem")
68 {
69 if (register_operand (op, mode))
70 return TRUE;
71
72 if (mode != VOIDmode && GET_MODE (op) != VOIDmode && GET_MODE (op) != DImode)
73 return FALSE;
74
75 if (GET_CODE (op) == SUBREG)
76 op = SUBREG_REG (op);
77
78 switch (GET_CODE (op))
79 {
80 case CONST_DOUBLE:
81 case CONST_INT:
82 return TRUE;
83
84 case MEM:
85 return memory_address_p (DImode, XEXP (op, 0));
86
87 default:
88 return FALSE;
89 }
90 })
91
92 ;; Returns TRUE if OP is a DImode register or MEM.
93
94 (define_predicate "nonimmediate_di_operand"
95 (match_code "reg,mem")
96 {
97 if (register_operand (op, mode))
98 return TRUE;
99
100 if (mode != VOIDmode && GET_MODE (op) != VOIDmode && GET_MODE (op) != DImode)
101 return FALSE;
102
103 if (GET_CODE (op) == SUBREG)
104 op = SUBREG_REG (op);
105
106 if (GET_CODE (op) == MEM)
107 return memory_address_p (DImode, XEXP (op, 0));
108
109 return FALSE;
110 })
111
112 ;; Returns true if OP is an integer value suitable for use in an ADD
113 ;; or ADD2 instruction, or if it is a register.
114
115 (define_predicate "add_immediate_operand"
116 (match_code "reg,const_int")
117 {
118 return
119 (GET_CODE (op) == REG
120 || (GET_CODE (op) == CONST_INT
121 && INTVAL (op) >= -16
122 && INTVAL (op) <= 15));
123 })