Mercurial > hg > CbC > CbC_gcc
comparison gcc/config/rs6000/constraints.md @ 0:a06113de4d67
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author | kent <kent@cr.ie.u-ryukyu.ac.jp> |
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date | Fri, 17 Jul 2009 14:47:48 +0900 |
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children | 77e2b8dfacca |
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1 ;; Constraint definitions for RS6000 | |
2 ;; Copyright (C) 2006, 2007 Free Software Foundation, Inc. | |
3 ;; | |
4 ;; This file is part of GCC. | |
5 ;; | |
6 ;; GCC is free software; you can redistribute it and/or modify | |
7 ;; it under the terms of the GNU General Public License as published by | |
8 ;; the Free Software Foundation; either version 3, or (at your option) | |
9 ;; any later version. | |
10 ;; | |
11 ;; GCC is distributed in the hope that it will be useful, | |
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 ;; GNU General Public License for more details. | |
15 ;; | |
16 ;; You should have received a copy of the GNU General Public License | |
17 ;; along with GCC; see the file COPYING3. If not see | |
18 ;; <http://www.gnu.org/licenses/>. | |
19 | |
20 ;; Register constraints | |
21 | |
22 (define_register_constraint "f" "TARGET_HARD_FLOAT && TARGET_FPRS | |
23 ? FLOAT_REGS : NO_REGS" | |
24 "@internal") | |
25 | |
26 (define_register_constraint "b" "BASE_REGS" | |
27 "@internal") | |
28 | |
29 (define_register_constraint "h" "SPECIAL_REGS" | |
30 "@internal") | |
31 | |
32 (define_register_constraint "q" "MQ_REGS" | |
33 "@internal") | |
34 | |
35 (define_register_constraint "c" "CTR_REGS" | |
36 "@internal") | |
37 | |
38 (define_register_constraint "l" "LINK_REGS" | |
39 "@internal") | |
40 | |
41 (define_register_constraint "v" "ALTIVEC_REGS" | |
42 "@internal") | |
43 | |
44 (define_register_constraint "x" "CR0_REGS" | |
45 "@internal") | |
46 | |
47 (define_register_constraint "y" "CR_REGS" | |
48 "@internal") | |
49 | |
50 (define_register_constraint "z" "XER_REGS" | |
51 "@internal") | |
52 | |
53 ;; Integer constraints | |
54 | |
55 (define_constraint "I" | |
56 "A signed 16-bit constant" | |
57 (and (match_code "const_int") | |
58 (match_test "(unsigned HOST_WIDE_INT) (ival + 0x8000) < 0x10000"))) | |
59 | |
60 (define_constraint "J" | |
61 "high-order 16 bits nonzero" | |
62 (and (match_code "const_int") | |
63 (match_test "(ival & (~ (unsigned HOST_WIDE_INT) 0xffff0000)) == 0"))) | |
64 | |
65 (define_constraint "K" | |
66 "low-order 16 bits nonzero" | |
67 (and (match_code "const_int") | |
68 (match_test "(ival & (~ (HOST_WIDE_INT) 0xffff)) == 0"))) | |
69 | |
70 (define_constraint "L" | |
71 "signed 16-bit constant shifted left 16 bits" | |
72 (and (match_code "const_int") | |
73 (match_test "((ival & 0xffff) == 0 | |
74 && (ival >> 31 == -1 || ival >> 31 == 0))"))) | |
75 | |
76 (define_constraint "M" | |
77 "constant greater than 31" | |
78 (and (match_code "const_int") | |
79 (match_test "ival > 31"))) | |
80 | |
81 (define_constraint "N" | |
82 "positive constant that is an exact power of two" | |
83 (and (match_code "const_int") | |
84 (match_test "ival > 0 && exact_log2 (ival) >= 0"))) | |
85 | |
86 (define_constraint "O" | |
87 "constant zero" | |
88 (and (match_code "const_int") | |
89 (match_test "ival == 0"))) | |
90 | |
91 (define_constraint "P" | |
92 "constant whose negation is signed 16-bit constant" | |
93 (and (match_code "const_int") | |
94 (match_test "(unsigned HOST_WIDE_INT) ((- ival) + 0x8000) < 0x10000"))) | |
95 | |
96 ;; Floating-point constraints | |
97 | |
98 (define_constraint "G" | |
99 "Constant that can be copied into GPR with two insns for DF/DI | |
100 and one for SF." | |
101 (and (match_code "const_double") | |
102 (match_test "num_insns_constant (op, mode) | |
103 == (mode == SFmode ? 1 : 2)"))) | |
104 | |
105 (define_constraint "H" | |
106 "DF/DI constant that takes three insns." | |
107 (and (match_code "const_double") | |
108 (match_test "num_insns_constant (op, mode) == 3"))) | |
109 | |
110 ;; Memory constraints | |
111 | |
112 (define_memory_constraint "Q" | |
113 "Memory operand that is just an offset from a reg" | |
114 (and (match_code "mem") | |
115 (match_test "GET_CODE (XEXP (op, 0)) == REG"))) | |
116 | |
117 (define_memory_constraint "Y" | |
118 "Indexed or word-aligned displacement memory operand" | |
119 (match_operand 0 "word_offset_memref_operand")) | |
120 | |
121 (define_memory_constraint "Z" | |
122 "Indexed or indirect memory operand" | |
123 (match_operand 0 "indexed_or_indirect_operand")) | |
124 | |
125 ;; Address constraints | |
126 | |
127 (define_address_constraint "a" | |
128 "Indexed or indirect address operand" | |
129 (match_operand 0 "indexed_or_indirect_address")) | |
130 | |
131 (define_constraint "R" | |
132 "AIX TOC entry" | |
133 (match_test "legitimate_constant_pool_address_p (op)")) | |
134 | |
135 ;; General constraints | |
136 | |
137 (define_constraint "S" | |
138 "Constant that can be placed into a 64-bit mask operand" | |
139 (match_operand 0 "mask64_operand")) | |
140 | |
141 (define_constraint "T" | |
142 "Constant that can be placed into a 32-bit mask operand" | |
143 (match_operand 0 "mask_operand")) | |
144 | |
145 (define_constraint "U" | |
146 "V.4 small data reference" | |
147 (and (match_test "DEFAULT_ABI == ABI_V4") | |
148 (match_operand 0 "small_data_operand"))) | |
149 | |
150 (define_constraint "t" | |
151 "AND masks that can be performed by two rldic{l,r} insns | |
152 (but excluding those that could match other constraints of anddi3)" | |
153 (and (and (and (match_operand 0 "mask64_2_operand") | |
154 (match_test "(fixed_regs[CR0_REGNO] | |
155 || !logical_operand (op, DImode))")) | |
156 (not (match_operand 0 "mask_operand"))) | |
157 (not (match_operand 0 "mask64_operand")))) | |
158 | |
159 (define_constraint "W" | |
160 "vector constant that does not require memory" | |
161 (match_operand 0 "easy_vector_constant")) |