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author kent <kent@cr.ie.u-ryukyu.ac.jp>
date Fri, 17 Jul 2009 14:47:48 +0900
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1 /* score.h for Sunplus S+CORE processor
2 Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc.
3 Contributed by Sunnorth.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20
21 #include "score-conv.h"
22
23 /* Controlling the Compilation Driver. */
24 #undef SWITCH_TAKES_ARG
25 #define SWITCH_TAKES_ARG(CHAR) \
26 (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')
27
28 #undef CPP_SPEC
29 #define CPP_SPEC "%{mscore3:-D__score3__} %{G*}"
30
31 #undef CC1_SPEC
32 #define CC1_SPEC "%{!mel:-meb} %{mel:-mel } \
33 %{!mscore*:-mscore7} \
34 %{mscore3:-mscore3} \
35 %{mscore3d:-mscore3d} \
36 %{mscore7:-mscore7} \
37 %{mscore7d:-mscore7d} \
38 %{G*}"
39
40 #undef ASM_SPEC
41 #define ASM_SPEC "%{!mel:-EB} %{mel:-EL} \
42 %{!mscore*:-march=score7} \
43 %{mscore7:-march=score7} \
44 %{mscore7d:-march=score7} \
45 %{mscore3:-march=score3} \
46 %{mscore3d:-march=score3} \
47 %{march=score5:-march=score7} \
48 %{march=score5u:-march=score7} \
49 %{march=score7:-march=score7} \
50 %{march=score7d:-march=score7} \
51 %{march=score3:-march=score3} \
52 %{march=score3d:-march=score3} \
53 %{G*}"
54
55 #undef LINK_SPEC
56 #define LINK_SPEC "%{!mel:-EB} %{mel:-EL} \
57 %{!mscore*:-mscore7_elf} \
58 %{mscore7:-mscore7_elf} \
59 %{mscore7d:-mscore7_elf} \
60 %{mscore3:-mscore3_elf} \
61 %{mscore3d:-mscore3_elf} \
62 %{march=score5:-mscore7_elf} \
63 %{march=score5u:-mscore7_elf} \
64 %{march=score7:-mscore7_elf} \
65 %{march=score7d:-mscore7_elf} \
66 %{march=score3:-mscore3_elf} \
67 %{march=score3d:-mscore3_elf} \
68 %{G*}"
69
70 /* Run-time Target Specification. */
71 #define TARGET_CPU_CPP_BUILTINS() \
72 do { \
73 builtin_define ("SUNPLUS"); \
74 builtin_define ("__SCORE__"); \
75 builtin_define ("__score__"); \
76 if (TARGET_LITTLE_ENDIAN) \
77 builtin_define ("__scorele__"); \
78 else \
79 builtin_define ("__scorebe__"); \
80 if (TARGET_SCORE5) \
81 builtin_define ("__score5__"); \
82 if (TARGET_SCORE5U) \
83 builtin_define ("__score5u__"); \
84 if (TARGET_SCORE7) \
85 builtin_define ("__score7__"); \
86 if (TARGET_SCORE7D) \
87 builtin_define ("__score7d__"); \
88 if (TARGET_SCORE3) \
89 builtin_define ("__score3__"); \
90 if (TARGET_SCORE3D) \
91 builtin_define ("__score3d__"); \
92 } while (0)
93
94 #define TARGET_DEFAULT 0
95
96 #define SCORE_GCC_VERSION "1.6"
97
98 #define TARGET_VERSION \
99 fprintf (stderr, "Sunplus S+core rev=%s", SCORE_GCC_VERSION);
100
101 #define OVERRIDE_OPTIONS score_override_options ()
102
103 /* Show we can debug even without a frame pointer. */
104 #define CAN_DEBUG_WITHOUT_FP
105
106 /* Target machine storage layout. */
107 #define BITS_BIG_ENDIAN 0
108 #define BYTES_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0)
109 #define WORDS_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0)
110
111 /* Define this to set the endianness to use in libgcc2.c, which can
112 not depend on target_flags. */
113 #if defined(__scorele__)
114 #define LIBGCC2_WORDS_BIG_ENDIAN 0
115 #else
116 #define LIBGCC2_WORDS_BIG_ENDIAN 1
117 #endif
118
119 /* Width of a word, in units (bytes). */
120 #define UNITS_PER_WORD 4
121
122 /* Define this macro if it is advisable to hold scalars in registers
123 in a wider mode than that declared by the program. In such cases,
124 the value is constrained to be within the bounds of the declared
125 type, but kept valid in the wider mode. The signedness of the
126 extension may differ from that of the type. */
127 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
128 if (GET_MODE_CLASS (MODE) == MODE_INT \
129 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
130 (MODE) = SImode;
131
132 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
133 #define PARM_BOUNDARY BITS_PER_WORD
134 #define STACK_BOUNDARY BITS_PER_WORD
135
136 /* Allocation boundary (in *bits*) for the code of a function. */
137 #define FUNCTION_BOUNDARY BITS_PER_WORD
138
139 /* There is no point aligning anything to a rounder boundary than this. */
140 #define BIGGEST_ALIGNMENT LONG_DOUBLE_TYPE_SIZE
141
142 /* If defined, a C expression to compute the alignment for a static
143 variable. TYPE is the data type, and ALIGN is the alignment that
144 the object would ordinarily have. The value of this macro is used
145 instead of that alignment to align the object.
146
147 If this macro is not defined, then ALIGN is used.
148
149 One use of this macro is to increase alignment of medium-size
150 data to make it all fit in fewer cache lines. Another is to
151 cause character arrays to be word-aligned so that `strcpy' calls
152 that copy constants to character arrays can be done inline. */
153 #define DATA_ALIGNMENT(TYPE, ALIGN) \
154 ((((ALIGN) < BITS_PER_WORD) \
155 && (TREE_CODE (TYPE) == ARRAY_TYPE \
156 || TREE_CODE (TYPE) == UNION_TYPE \
157 || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
158
159 /* If defined, a C expression to compute the alignment given to a
160 constant that is being placed in memory. EXP is the constant
161 and ALIGN is the alignment that the object would ordinarily have.
162 The value of this macro is used instead of that alignment to align
163 the object.
164
165 If this macro is not defined, then ALIGN is used.
166
167 The typical use of this macro is to increase alignment for string
168 constants to be word aligned so that `strcpy' calls that copy
169 constants can be done inline. */
170 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
171 ((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \
172 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
173
174 /* If defined, a C expression to compute the alignment for a local
175 variable. TYPE is the data type, and ALIGN is the alignment that
176 the object would ordinarily have. The value of this macro is used
177 instead of that alignment to align the object.
178
179 If this macro is not defined, then ALIGN is used.
180
181 One use of this macro is to increase alignment of medium-size
182 data to make it all fit in fewer cache lines. */
183 #define LOCAL_ALIGNMENT(TYPE, ALIGN) \
184 ((TREE_CODE (TYPE) == ARRAY_TYPE \
185 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
186 && (ALIGN) < BITS_PER_WORD) ? BITS_PER_WORD : (ALIGN))
187
188 /* Alignment of field after `int : 0' in a structure. */
189 #define EMPTY_FIELD_BOUNDARY 32
190
191 /* All accesses must be aligned. */
192 #define STRICT_ALIGNMENT 1
193
194 /* Score requires that structure alignment is affected by bitfields. */
195 #define PCC_BITFIELD_TYPE_MATTERS 1
196
197 /* long double is not a fixed mode, but the idea is that, if we
198 support long double, we also want a 128-bit integer type. */
199 #define MAX_FIXED_MODE_SIZE LONG_DOUBLE_TYPE_SIZE
200
201 /* Layout of Data Type. */
202 /* Set the sizes of the core types. */
203 #define INT_TYPE_SIZE 32
204 #define SHORT_TYPE_SIZE 16
205 #define LONG_TYPE_SIZE 32
206 #define LONG_LONG_TYPE_SIZE 64
207 #define CHAR_TYPE_SIZE 8
208 #define FLOAT_TYPE_SIZE 32
209 #define DOUBLE_TYPE_SIZE 64
210 #define LONG_DOUBLE_TYPE_SIZE 64
211
212 /* Define this as 1 if `char' should by default be signed; else as 0. */
213 #undef DEFAULT_SIGNED_CHAR
214 #define DEFAULT_SIGNED_CHAR 1
215
216 /* Default definitions for size_t and ptrdiff_t. */
217 #define SIZE_TYPE "unsigned int"
218
219 /* Register Usage
220
221 S+core have:
222 - 32 integer registers
223 - 16 control registers (cond)
224 - 16 special registers (ceh/cel/cnt/lcr/scr/arg/fp)
225 - 32 coprocessors 1 registers
226 - 32 coprocessors 2 registers
227 - 32 coprocessors 3 registers. */
228 #define FIRST_PSEUDO_REGISTER 160
229
230 /* By default, fix the kernel registers (r30 and r31), the global
231 pointer (r28) and the stack pointer (r0). This can change
232 depending on the command-line options.
233
234 Regarding coprocessor registers: without evidence to the contrary,
235 it's best to assume that each coprocessor register has a unique
236 use. This can be overridden, in, e.g., override_options() or
237 CONDITIONAL_REGISTER_USAGE should the assumption be inappropriate
238 for a particular target. */
239
240 /* Control Registers, use mfcr/mtcr insn
241 32 cr0 PSR
242 33 cr1 Condition
243 34 cr2 ECR
244 35 cr3 EXCPVec
245 36 cr4 CCR
246 37 cr5 EPC
247 38 cr6 EMA
248 39 cr7 TLBLock
249 40 cr8 TLBPT
250 41 cr8 PEADDR
251 42 cr10 TLBRPT
252 43 cr11 PEVN
253 44 cr12 PECTX
254 45 cr13
255 46 cr14
256 47 cr15
257
258 Custom Engine Register, use mfce/mtce
259 48 CEH CEH
260 49 CEL CEL
261
262 Special-Purpose Register, use mfsr/mtsr
263 50 sr0 CNT
264 51 sr1 LCR
265 52 sr2 SCR
266
267 53 ARG_POINTER_REGNUM
268 54 FRAME_POINTER_REGNUM
269 but Control register have 32 registers, cr16-cr31. */
270 #define FIXED_REGISTERS \
271 { \
272 /* General Purpose Registers */ \
273 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
274 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, \
275 /* Control Registers */ \
276 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
277 /* CEH/ CEL/ CNT/ LCR/ SCR / ARG_POINTER_REGNUM/ FRAME_POINTER_REGNUM */\
278 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
279 /* CP 1 Registers */ \
280 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
281 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
282 /* CP 2 Registers */ \
283 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
284 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
285 /* CP 3 Registers */ \
286 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
287 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
288 }
289
290 #define CALL_USED_REGISTERS \
291 { \
292 /* General purpose register */ \
293 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, \
294 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
295 /* Control Registers */ \
296 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
297 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
298 /* CP 1 Registers */ \
299 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
300 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
301 /* CP 2 Registers */ \
302 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
303 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
304 /* CP 3 Registers */ \
305 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
306 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
307 }
308
309 #define REG_ALLOC_ORDER \
310 { 0, 1, 6, 7, 8, 9, 10, 11, 4, 5, 22, 23, 24, 25, 26, 27, \
311 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 28, 29, 30, 31, 2, 3, \
312 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \
313 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, \
314 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \
315 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, \
316 96, 97, 98, 99,100,101,102,103,104,105,106,107,108,109,110,111, \
317 112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127, \
318 128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143, \
319 144,145,146,147,148,149,150,151,152,153,154,155,156,157,158,159 }
320
321 /* Macro to conditionally modify fixed_regs/call_used_regs. */
322 #define PIC_OFFSET_TABLE_REGNUM 29
323
324 #define CONDITIONAL_REGISTER_USAGE \
325 { \
326 if (!flag_pic) \
327 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = \
328 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 0; \
329 }
330
331 #define HARD_REGNO_NREGS(REGNO, MODE) \
332 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
333
334 /* Return true if REGNO is suitable for holding a quantity of type MODE. */
335 #define HARD_REGNO_MODE_OK(REGNO, MODE) score_hard_regno_mode_ok (REGNO, MODE)
336
337 /* Value is 1 if it is a good idea to tie two pseudo registers
338 when one has mode MODE1 and one has mode MODE2.
339 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
340 for any hard reg, then this must be 0 for correct output. */
341 #define MODES_TIEABLE_P(MODE1, MODE2) \
342 ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \
343 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
344 == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \
345 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
346
347 /* Register Classes. */
348 /* Define the classes of registers for register constraints in the
349 machine description. Also define ranges of constants. */
350 enum reg_class
351 {
352 NO_REGS,
353 G16_REGS, /* r0 ~ r15 */
354 G32_REGS, /* r0 ~ r31 */
355 T32_REGS, /* r8 ~ r11 | r22 ~ r27 */
356
357 HI_REG, /* hi */
358 LO_REG, /* lo */
359 CE_REGS, /* hi + lo */
360
361 CN_REG, /* cnt */
362 LC_REG, /* lcb */
363 SC_REG, /* scb */
364 SP_REGS, /* cnt + lcb + scb */
365
366 CR_REGS, /* cr0 - cr15 */
367
368 CP1_REGS, /* cp1 */
369 CP2_REGS, /* cp2 */
370 CP3_REGS, /* cp3 */
371 CPA_REGS, /* cp1 + cp2 + cp3 */
372
373 ALL_REGS,
374 LIM_REG_CLASSES
375 };
376
377 #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
378
379 #define GENERAL_REGS G32_REGS
380
381 /* Give names of register classes as strings for dump file. */
382 #define REG_CLASS_NAMES \
383 { \
384 "NO_REGS", \
385 "G16_REGS", \
386 "G32_REGS", \
387 "T32_REGS", \
388 \
389 "HI_REG", \
390 "LO_REG", \
391 "CE_REGS", \
392 \
393 "CN_REG", \
394 "LC_REG", \
395 "SC_REG", \
396 "SP_REGS", \
397 \
398 "CR_REGS", \
399 \
400 "CP1_REGS", \
401 "CP2_REGS", \
402 "CP3_REGS", \
403 "CPA_REGS", \
404 \
405 "ALL_REGS", \
406 }
407
408 /* Define which registers fit in which classes. */
409 #define REG_CLASS_CONTENTS \
410 { \
411 /* NO_REGS/G16/G32/T32 */ \
412 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, \
413 { 0x0000ffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, \
414 { 0xffffffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, \
415 { 0x0fc00f00, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, \
416 /* HI/LO/CE */ \
417 { 0x00000000, 0x00010000, 0x00000000, 0x00000000, 0x00000000}, \
418 { 0x00000000, 0x00020000, 0x00000000, 0x00000000, 0x00000000}, \
419 { 0x00000000, 0x00030000, 0x00000000, 0x00000000, 0x00000000}, \
420 /* CN/LC/SC/SP/CR */ \
421 { 0x00000000, 0x00040000, 0x00000000, 0x00000000, 0x00000000}, \
422 { 0x00000000, 0x00080000, 0x00000000, 0x00000000, 0x00000000}, \
423 { 0x00000000, 0x00100000, 0x00000000, 0x00000000, 0x00000000}, \
424 { 0x00000000, 0x001c0000, 0x00000000, 0x00000000, 0x00000000}, \
425 { 0x00000000, 0x0000ffff, 0x00000000, 0x00000000, 0x00000000}, \
426 /* CP1/CP2/CP3/CPA */ \
427 { 0x00000000, 0x00000000, 0xffffffff, 0x00000000, 0x00000000}, \
428 { 0x00000000, 0x00000000, 0x00000000, 0xffffffff, 0x00000000}, \
429 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffffff}, \
430 { 0x00000000, 0x00000000, 0xffffffff, 0xffffffff, 0xffffffff}, \
431 /* ALL_REGS */ \
432 { 0xffffffff, 0x001fffff, 0xffffffff, 0xffffffff, 0xffffffff}, \
433 }
434
435 /* A C expression whose value is a register class containing hard
436 register REGNO. In general there is more that one such class;
437 choose a class which is "minimal", meaning that no smaller class
438 also contains the register. */
439 #define REGNO_REG_CLASS(REGNO) score_reg_class (REGNO)
440
441 /* The following macro defines cover classes for Integrated Register
442 Allocator. Cover classes is a set of non-intersected register
443 classes covering all hard registers used for register allocation
444 purpose. Any move between two registers of a cover class should be
445 cheaper than load or store of the registers. The macro value is
446 array of register classes with LIM_REG_CLASSES used as the end
447 marker. */
448 #define IRA_COVER_CLASSES \
449 { \
450 G32_REGS, CE_REGS, SP_REGS, LIM_REG_CLASSES \
451 }
452
453 /* A macro whose definition is the name of the class to which a
454 valid base register must belong. A base register is one used in
455 an address which is the register value plus a displacement. */
456 #define BASE_REG_CLASS G16_REGS
457
458 /* The class value for index registers. */
459 #define INDEX_REG_CLASS NO_REGS
460
461 extern enum reg_class score_char_to_class[256];
462 #define REG_CLASS_FROM_LETTER(C) score_char_to_class[(unsigned char) (C)]
463
464 /* Addressing modes, and classification of registers for them. */
465 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) \
466 score_regno_mode_ok_for_base_p (REGNO, 1)
467
468 #define REGNO_OK_FOR_INDEX_P(NUM) 0
469
470 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
471 score_preferred_reload_class (X, CLASS)
472
473 /* If we need to load shorts byte-at-a-time, then we need a scratch. */
474 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
475 score_secondary_reload_class (CLASS, MODE, X)
476
477 /* Return the register class of a scratch register needed to copy IN into
478 or out of a register in CLASS in MODE. If it can be done directly,
479 NO_REGS is returned. */
480 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
481 score_secondary_reload_class (CLASS, MODE, X)
482
483 /* Return the maximum number of consecutive registers
484 needed to represent mode MODE in a register of class CLASS. */
485 #define CLASS_MAX_NREGS(CLASS, MODE) \
486 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
487
488 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
489 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
490 ? reg_classes_intersect_p (HI_REG, (CLASS)) : 0)
491
492 /* The letters I, J, K, L, M, N, O, and P in a register constraint
493 string can be used to stand for particular ranges of immediate
494 operands. This macro defines what the ranges are. C is the
495 letter, and VALUE is a constant value. Return 1 if VALUE is
496 in the range specified by C. */
497 #define CONST_OK_FOR_LETTER_P(VALUE, C) score_const_ok_for_letter_p (VALUE, C)
498
499 /* Similar, but for floating constants, and defining letters G and H.
500 Here VALUE is the CONST_DOUBLE rtx itself. */
501
502 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
503 ((C) == 'G' && (VALUE) == CONST0_RTX (GET_MODE (VALUE)))
504
505 /* Letters in the range `Q' through `U' may be defined in a
506 machine-dependent fashion to stand for arbitrary operand types.
507 The machine description macro `EXTRA_CONSTRAINT' is passed the
508 operand as its first argument and the constraint letter as its
509 second operand. */
510 #define EXTRA_CONSTRAINT(VALUE, C) score_extra_constraint (VALUE, C)
511
512 /* Basic Stack Layout. */
513 /* Stack layout; function entry, exit and calling. */
514 #define STACK_GROWS_DOWNWARD
515
516 #define STACK_PUSH_CODE PRE_DEC
517 #define STACK_POP_CODE POST_INC
518
519 /* The offset of the first local variable from the beginning of the frame.
520 See compute_frame_size for details about the frame layout. */
521 #define STARTING_FRAME_OFFSET crtl->outgoing_args_size
522
523 /* The argument pointer always points to the first argument. */
524 #define FIRST_PARM_OFFSET(FUNDECL) 0
525
526 /* A C expression whose value is RTL representing the value of the return
527 address for the frame COUNT steps up from the current frame. */
528 #define RETURN_ADDR_RTX(count, frame) score_return_addr (count, frame)
529
530 /* Pick up the return address upon entry to a procedure. */
531 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, RA_REGNUM)
532
533 /* Exception handling Support. */
534 /* Use r0 to r3 to pass exception handling information. */
535 #define EH_RETURN_DATA_REGNO(N) \
536 ((N) < 4 ? (N) + ARG_REG_FIRST : INVALID_REGNUM)
537
538 /* The register that holds the return address in exception handlers. */
539 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, EH_REGNUM)
540
541 /* Registers That Address the Stack Frame. */
542 /* Register to use for pushing function arguments. */
543 #define STACK_POINTER_REGNUM SP_REGNUM
544
545 /* These two registers don't really exist: they get eliminated to either
546 the stack or hard frame pointer. */
547 #define FRAME_POINTER_REGNUM 53
548
549 /* we use r2 as the frame pointer. */
550 #define HARD_FRAME_POINTER_REGNUM FP_REGNUM
551
552 #define ARG_POINTER_REGNUM 54
553
554 /* Register in which static-chain is passed to a function. */
555 #define STATIC_CHAIN_REGNUM 23
556
557 /* Elimination Frame Pointer and Arg Pointer */
558 /* Value should be nonzero if functions must have frame pointers.
559 Zero means the frame pointer need not be set up (and parms
560 may be accessed via the stack pointer) in functions that seem suitable.
561 This is computed in `reload', in reload1.c. */
562 #define FRAME_POINTER_REQUIRED cfun->calls_alloca
563
564 #define ELIMINABLE_REGS \
565 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
566 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
567 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
568 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
569
570 /* We can always eliminate to the hard frame pointer. We can eliminate
571 to the stack pointer unless a frame pointer is needed. */
572 #define CAN_ELIMINATE(FROM, TO) \
573 (((TO) == HARD_FRAME_POINTER_REGNUM) \
574 || ((TO) == STACK_POINTER_REGNUM \
575 && !frame_pointer_needed))
576
577 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
578 (OFFSET) = score_initial_elimination_offset ((FROM), (TO))
579
580 /* Passing Function Arguments on the Stack. */
581 /* Allocate stack space for arguments at the beginning of each function. */
582 #define ACCUMULATE_OUTGOING_ARGS 1
583
584 /* reserve stack space for all argument registers. */
585 #define REG_PARM_STACK_SPACE(FNDECL) UNITS_PER_WORD
586
587 /* Define this if it is the responsibility of the caller to
588 allocate the area reserved for arguments passed in registers.
589 If `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect
590 of this macro is to determine whether the space is included in
591 `crtl->outgoing_args_size'. */
592 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
593
594 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
595
596 /* Passing Arguments in Registers */
597 /* Determine where to put an argument to a function.
598 Value is zero to push the argument on the stack,
599 or a hard register in which to store the argument.
600
601 MODE is the argument's machine mode.
602 TYPE is the data type of the argument (as a tree).
603 This is null for libcalls where that information may
604 not be available.
605 CUM is a variable of type CUMULATIVE_ARGS which gives info about
606 the preceding args and about the function being called.
607 NAMED is nonzero if this argument is a named parameter
608 (otherwise it is an extra parameter matching an ellipsis). */
609 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
610 score_function_arg (&CUM, MODE, TYPE, NAMED)
611
612 /* A C type for declaring a variable that is used as the first argument of
613 `FUNCTION_ARG' and other related values. For some target machines, the
614 type `int' suffices and can hold the number of bytes of argument so far. */
615 typedef struct score_args
616 {
617 unsigned int arg_number; /* how many arguments have been seen */
618 unsigned int num_gprs; /* number of gprs in use */
619 unsigned int stack_words; /* number of words in stack */
620 } score_args_t;
621
622 #define CUMULATIVE_ARGS score_args_t
623
624 /* Initialize a variable CUM of type CUMULATIVE_ARGS
625 for a call to a function whose data type is FNTYPE.
626 For a library call, FNTYPE is 0. */
627 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, n_named_args) \
628 score_init_cumulative_args (&CUM, FNTYPE, LIBNAME)
629
630 /* Update the data in CUM to advance over an argument
631 of mode MODE and data type TYPE.
632 (TYPE is null for libcalls where that information may not be available.) */
633 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
634 score_function_arg_advance (&CUM, MODE, TYPE, NAMED)
635
636 /* 1 if N is a possible register number for function argument passing.
637 We have no FP argument registers when soft-float. When FP registers
638 are 32 bits, we can't directly reference the odd numbered ones. */
639 #define FUNCTION_ARG_REGNO_P(REGNO) \
640 REG_CONTAIN (REGNO, ARG_REG_FIRST, ARG_REG_NUM)
641
642 /* How Scalar Function Values Are Returned. */
643 #define FUNCTION_VALUE(VALTYPE, FUNC) \
644 score_function_value ((VALTYPE), (FUNC), VOIDmode)
645
646 #define LIBCALL_VALUE(MODE) score_function_value (NULL_TREE, NULL, (MODE))
647
648 /* 1 if N is a possible register number for a function value. */
649 #define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == (ARG_REG_FIRST))
650
651 #define PIC_FUNCTION_ADDR_REGNUM (GP_REG_FIRST + 25)
652
653 /* How Large Values Are Returned. */
654 #define STRUCT_VALUE 0
655
656 /* Function Entry and Exit */
657 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
658 the stack pointer does not matter. The value is tested only in
659 functions that have frame pointers.
660 No definition is equivalent to always zero. */
661 #define EXIT_IGNORE_STACK 1
662
663 /* Generating Code for Profiling */
664 /* Output assembler code to FILE to increment profiler label # LABELNO
665 for profiling a function entry. */
666 #define FUNCTION_PROFILER(FILE, LABELNO) \
667 do { \
668 if (TARGET_SCORE7) \
669 { \
670 fprintf (FILE, " .set r1 \n"); \
671 fprintf (FILE, " mv r%d,r%d \n", AT_REGNUM, RA_REGNUM); \
672 fprintf (FILE, " subi r%d, %d \n", STACK_POINTER_REGNUM, 8); \
673 fprintf (FILE, " jl _mcount \n"); \
674 fprintf (FILE, " .set nor1 \n"); \
675 } \
676 else if (TARGET_SCORE3) \
677 { \
678 fprintf (FILE, " .set r1 \n"); \
679 fprintf (FILE, " mv! r%d,r%d \n", AT_REGNUM, RA_REGNUM); \
680 fprintf (FILE, " addi! r%d, %d \n", STACK_POINTER_REGNUM, -8);\
681 fprintf (FILE, " jl _mcount \n"); \
682 fprintf (FILE, " .set nor1 \n"); \
683 } \
684 } while (0)
685
686 #define TRAMPOLINE_TEMPLATE(STREAM) \
687 do { \
688 if (TARGET_SCORE7) \
689 { \
690 fprintf (STREAM, "\t.set r1\n"); \
691 fprintf (STREAM, "\tmv r31, r3\n"); \
692 fprintf (STREAM, "\tbl nextinsn\n"); \
693 fprintf (STREAM, "nextinsn:\n"); \
694 fprintf (STREAM, "\tlw r1, [r3, 6*4-8]\n"); \
695 fprintf (STREAM, "\tlw r23, [r3, 6*4-4]\n"); \
696 fprintf (STREAM, "\tmv r3, r31\n"); \
697 fprintf (STREAM, "\tbr! r1\n"); \
698 fprintf (STREAM, "\tnop!\n"); \
699 fprintf (STREAM, "\t.set nor1\n"); \
700 } \
701 else if (TARGET_SCORE3) \
702 { \
703 fprintf (STREAM, "\t.set r1\n"); \
704 fprintf (STREAM, "\tmv! r31, r3\n"); \
705 fprintf (STREAM, "\tnop!\n"); \
706 fprintf (STREAM, "\tbl nextinsn\n"); \
707 fprintf (STREAM, "nextinsn:\n"); \
708 fprintf (STREAM, "\tlw! r1, [r3, 6*4-8]\n"); \
709 fprintf (STREAM, "\tnop!\n"); \
710 fprintf (STREAM, "\tlw r23, [r3, 6*4-4]\n"); \
711 fprintf (STREAM, "\tmv! r3, r31\n"); \
712 fprintf (STREAM, "\tnop!\n"); \
713 fprintf (STREAM, "\tbr! r1\n"); \
714 fprintf (STREAM, "\tnop!\n"); \
715 fprintf (STREAM, "\t.set nor1\n"); \
716 } \
717 } while (0)
718
719 /* Trampolines for Nested Functions. */
720 #define TRAMPOLINE_INSNS 6
721
722 /* A C expression for the size in bytes of the trampoline, as an integer. */
723 #define TRAMPOLINE_SIZE (24 + GET_MODE_SIZE (ptr_mode) * 2)
724
725 /* A C statement to initialize the variable parts of a trampoline.
726 ADDR is an RTX for the address of the trampoline; FNADDR is an
727 RTX for the address of the nested function; STATIC_CHAIN is an
728 RTX for the static chain value that should be passed to the
729 function when it is called. */
730
731 #define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN) \
732 score_initialize_trampoline (ADDR, FUNC, CHAIN)
733
734 #define HAVE_PRE_INCREMENT 1
735 #define HAVE_PRE_DECREMENT 1
736 #define HAVE_POST_INCREMENT 1
737 #define HAVE_POST_DECREMENT 1
738 #define HAVE_PRE_MODIFY_DISP 1
739 #define HAVE_POST_MODIFY_DISP 1
740 #define HAVE_PRE_MODIFY_REG 0
741 #define HAVE_POST_MODIFY_REG 0
742
743 /* Recognize any constant value that is a valid address. */
744 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
745
746 /* Maximum number of registers that can appear in a valid memory address. */
747 #define MAX_REGS_PER_ADDRESS 1
748
749 #ifdef REG_OK_STRICT
750 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
751 if (score_address_p (MODE, X, 1)) \
752 goto LABEL;
753 #else
754 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
755 if (score_address_p (MODE, X, 0)) \
756 goto LABEL;
757 #endif
758
759 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
760 and check its validity for a certain class.
761 We have two alternate definitions for each of them.
762 The usual definition accepts all pseudo regs; the other rejects them all.
763 The symbol REG_OK_STRICT causes the latter definition to be used.
764
765 Most source files want to accept pseudo regs in the hope that
766 they will get allocated to the class that the insn wants them to be in.
767 Some source files that are used after register allocation
768 need to be strict. */
769 #ifndef REG_OK_STRICT
770 #define REG_MODE_OK_FOR_BASE_P(X, MODE) \
771 score_regno_mode_ok_for_base_p (REGNO (X), 0)
772 #else
773 #define REG_MODE_OK_FOR_BASE_P(X, MODE) \
774 score_regno_mode_ok_for_base_p (REGNO (X), 1)
775 #endif
776
777 #define REG_OK_FOR_INDEX_P(X) 0
778
779 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
780 do { \
781 if (score_legitimize_address (&(X))) \
782 goto WIN; \
783 } while (0)
784
785 /* Go to LABEL if ADDR (a legitimate address expression)
786 has an effect that depends on the machine mode it is used for. */
787 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) {}
788
789 #define LEGITIMATE_CONSTANT_P(X) 1
790
791 /* Condition Code Status. */
792 #define SELECT_CC_MODE(OP, X, Y) score_select_cc_mode (OP, X, Y)
793
794 /* Return nonzero if SELECT_CC_MODE will never return MODE for a
795 floating point inequality comparison. */
796 #define REVERSIBLE_CC_MODE(MODE) 1
797
798 /* Describing Relative Costs of Operations */
799 /* Compute extra cost of moving data between one register class and another. */
800 #define REGISTER_MOVE_COST(MODE, FROM, TO) \
801 score_register_move_cost (MODE, FROM, TO)
802
803 /* Moves to and from memory are quite expensive */
804 #define MEMORY_MOVE_COST(MODE, CLASS, TO_P) \
805 (4 + memory_move_secondary_cost ((MODE), (CLASS), (TO_P)))
806
807 /* Try to generate sequences that don't involve branches. */
808 #define BRANCH_COST(speed_p, predictable_p) 2
809
810 /* Nonzero if access to memory by bytes is slow and undesirable. */
811 #define SLOW_BYTE_ACCESS 1
812
813 /* Define this macro if it is as good or better to call a constant
814 function address than to call an address kept in a register. */
815 #define NO_FUNCTION_CSE 1
816
817 /* Dividing the Output into Sections (Texts, Data, ...). */
818 /* Define the strings to put out for each section in the object file. */
819 #define TEXT_SECTION_ASM_OP "\t.text"
820 #define DATA_SECTION_ASM_OP "\t.data"
821 #define SDATA_SECTION_ASM_OP "\t.sdata"
822
823 #undef READONLY_DATA_SECTION_ASM_OP
824 #define READONLY_DATA_SECTION_ASM_OP "\t.rdata"
825
826 /* The Overall Framework of an Assembler File */
827 /* How to start an assembler comment.
828 The leading space is important. */
829 #define ASM_COMMENT_START "#"
830
831 /* Output to assembler file text saying following lines
832 may contain character constants, extra white space, comments, etc. */
833 #define ASM_APP_ON "#APP\n\t.set volatile\n"
834
835 /* Output to assembler file text saying following lines
836 no longer contain unusual constructs. */
837 #define ASM_APP_OFF "#NO_APP\n\t.set optimize\n"
838
839 /* Output of Uninitialized Variables. */
840 /* This says how to define a global common symbol. */
841 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \
842 do { \
843 fputs ("\n\t.comm\t", STREAM); \
844 assemble_name (STREAM, NAME); \
845 fprintf (STREAM, " , " HOST_WIDE_INT_PRINT_UNSIGNED ", %u\n", \
846 SIZE, ALIGN / BITS_PER_UNIT); \
847 } while (0)
848
849 /* This says how to define a local common symbol (i.e., not visible to
850 linker). */
851 #undef ASM_OUTPUT_ALIGNED_LOCAL
852 #define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN) \
853 do { \
854 fputs ("\n\t.lcomm\t", STREAM); \
855 assemble_name (STREAM, NAME); \
856 fprintf (STREAM, " , " HOST_WIDE_INT_PRINT_UNSIGNED ", %u\n", \
857 SIZE, ALIGN / BITS_PER_UNIT); \
858 } while (0)
859
860 /* Globalizing directive for a label. */
861 #define GLOBAL_ASM_OP "\t.globl\t"
862
863 /* Output and Generation of Labels */
864 /* This is how to declare a function name. The actual work of
865 emitting the label is moved to function_prologue, so that we can
866 get the line number correctly emitted before the .ent directive,
867 and after any .file directives. Define as empty so that the function
868 is not declared before the .ent directive elsewhere. */
869 #undef ASM_DECLARE_FUNCTION_NAME
870 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL)
871
872 #undef ASM_DECLARE_OBJECT_NAME
873 #define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL) \
874 do { \
875 assemble_name (STREAM, NAME); \
876 fprintf (STREAM, ":\n"); \
877 } while (0)
878
879 /* This says how to output an external. It would be possible not to
880 output anything and let undefined symbol become external. However
881 the assembler uses length information on externals to allocate in
882 data/sdata bss/sbss, thereby saving exec time. */
883 #undef ASM_OUTPUT_EXTERNAL
884 #define ASM_OUTPUT_EXTERNAL(STREAM, DECL, NAME) \
885 score_output_external (STREAM, DECL, NAME)
886
887 /* This handles the magic '..CURRENT_FUNCTION' symbol, which means
888 'the start of the function that this code is output in'. */
889 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
890 fprintf ((STREAM), "%s", (NAME))
891
892 /* Local compiler-generated symbols must have a prefix that the assembler
893 understands. */
894 #define LOCAL_LABEL_PREFIX (TARGET_SCORE7 ? "." : "$")
895
896 #undef ASM_GENERATE_INTERNAL_LABEL
897 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
898 sprintf ((LABEL), "*%s%s%ld", (LOCAL_LABEL_PREFIX), (PREFIX), (long) (NUM))
899
900 /* Output of Assembler Instructions. */
901 #define REGISTER_NAMES \
902 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
903 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
904 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
905 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", \
906 \
907 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", \
908 "cr8", "cr9", "cr10", "cr11", "cr12", "cr13", "cr14", "cr15", \
909 \
910 "ceh", "cel", "sr0", "sr1", "sr2", "_arg", "_frame", "", \
911 "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31", \
912 \
913 "c1r0", "c1r1", "c1r2", "c1r3", "c1r4", "c1r5", "c1r6", "c1r7", \
914 "c1r8", "c1r9", "c1r10", "c1r11", "c1r12", "c1r13", "c1r14", "c1r15", \
915 "c1r16", "c1r17", "c1r18", "c1r19", "c1r20", "c1r21", "c1r22", "c1r23", \
916 "c1r24", "c1r25", "c1r26", "c1r27", "c1r28", "c1r29", "c1r30", "c1r31", \
917 \
918 "c2r0", "c2r1", "c2r2", "c2r3", "c2r4", "c2r5", "c2r6", "c2r7", \
919 "c2r8", "c2r9", "c2r10", "c2r11", "c2r12", "c2r13", "c2r14", "c2r15", \
920 "c2r16", "c2r17", "c2r18", "c2r19", "c2r20", "c2r21", "c2r22", "c2r23", \
921 "c2r24", "c2r25", "c2r26", "c2r27", "c2r28", "c2r29", "c2r30", "c2r31", \
922 \
923 "c3r0", "c3r1", "c3r2", "c3r3", "c3r4", "c3r5", "c3r6", "c3r7", \
924 "c3r8", "c3r9", "c3r10", "c3r11", "c3r12", "c3r13", "c3r14", "c3r15", \
925 "c3r16", "c3r17", "c3r18", "c3r19", "c3r20", "c3r21", "c3r22", "c3r23", \
926 "c3r24", "c3r25", "c3r26", "c3r27", "c3r28", "c3r29", "c3r30", "c3r31", \
927 }
928
929 /* Print operand X (an rtx) in assembler syntax to file FILE. */
930 #define PRINT_OPERAND(STREAM, X, CODE) score_print_operand (STREAM, X, CODE)
931
932 /* A C expression which evaluates to true if CODE is a valid
933 punctuation character for use in the `PRINT_OPERAND' macro. */
934 #define PRINT_OPERAND_PUNCT_VALID_P(C) ((C) == '[' || (C) == ']')
935
936 /* Print a memory address as an operand to reference that memory location. */
937 #define PRINT_OPERAND_ADDRESS(STREAM, X) \
938 score_print_operand_address (STREAM, X)
939
940 /* By default on the S+core, external symbols do not have an underscore
941 prepended. */
942 #define USER_LABEL_PREFIX ""
943
944 /* This is how to output an insn to push a register on the stack. */
945 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \
946 do { \
947 if (TARGET_SCORE7) \
948 fprintf (STREAM, "\tpush! %s,[%s]\n", \
949 reg_names[REGNO], \
950 reg_names[STACK_POINTER_REGNUM]); \
951 else if (TARGET_SCORE3) \
952 fprintf (STREAM, "\tpush!\t%s\n", \
953 reg_names[REGNO]); \
954 } while (0)
955
956 /* This is how to output an insn to pop a register from the stack. */
957 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \
958 do { \
959 if (TARGET_SCORE7) \
960 fprintf (STREAM, "\tpop! %s,[%s]\n", \
961 reg_names[REGNO], \
962 reg_names[STACK_POINTER_REGNUM]); \
963 else if (TARGET_SCORE3) \
964 fprintf (STREAM, "\tpop!\t%s\n", \
965 reg_names[REGNO]); \
966 } while (0)
967
968 /* Output of Dispatch Tables. */
969 /* This is how to output an element of a case-vector. We can make the
970 entries PC-relative in GP-relative when .gp(d)word is supported. */
971 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
972 do { \
973 if (TARGET_SCORE7) \
974 if (flag_pic) \
975 fprintf (STREAM, "\t.gpword %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
976 else \
977 fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
978 else if (TARGET_SCORE3) \
979 { \
980 switch (GET_MODE(BODY)) \
981 { \
982 case QImode: /* TBB */ \
983 asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d_tbb)/2\n", \
984 VALUE, REL); \
985 break; \
986 case HImode: /* TBH */ \
987 asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d_tbb)/2\n", \
988 VALUE, REL); \
989 break; \
990 case SImode: \
991 if (flag_pic) \
992 fprintf (STREAM, "\t.gpword %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
993 else \
994 fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
995 break; \
996 default: \
997 gcc_unreachable(); \
998 } \
999 } \
1000 } while (0)
1001
1002 /* Jump table alignment is explicit in ASM_OUTPUT_CASE_LABEL. */
1003 #define ADDR_VEC_ALIGN(JUMPTABLE) (GET_MODE (PATTERN (JUMPTABLE)) == SImode ? 2 \
1004 : GET_MODE (PATTERN (JUMPTABLE)) == HImode ? 1 : 0)
1005
1006 /* This is how to output a label which precedes a jumptable. Since
1007 Score3 instructions are 2 bytes, we may need explicit alignment here. */
1008 #undef ASM_OUTPUT_CASE_LABEL
1009 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, JUMPTABLE) \
1010 do { \
1011 if ((TARGET_SCORE7) && GET_MODE (PATTERN (JUMPTABLE)) == SImode) \
1012 ASM_OUTPUT_ALIGN (FILE, 2); \
1013 (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); \
1014 } while (0)
1015
1016 /* Specify the machine mode that this machine uses
1017 for the index in the tablejump instruction. */
1018 #define CASE_VECTOR_MODE SImode
1019
1020 #define CASE_VECTOR_PC_RELATIVE (TARGET_SCORE3)
1021
1022 #define CASE_VECTOR_SHORTEN_MODE(min, max, body) \
1023 ((min < 0 || max >= 0x2000 || TARGET_SCORE7) ? SImode \
1024 : (max >= 0x200) ? HImode \
1025 : QImode)
1026
1027 /* This is how to output an element of a case-vector that is absolute. */
1028 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
1029 fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE)
1030
1031 /* Assembler Commands for Exception Regions */
1032 /* Since the S+core is encoded in the least-significant bit
1033 of the address, mask it off return addresses for purposes of
1034 finding exception handling regions. */
1035 #define MASK_RETURN_ADDR constm1_rtx
1036
1037 /* Assembler Commands for Alignment */
1038 /* This is how to output an assembler line to advance the location
1039 counter by SIZE bytes. */
1040 #undef ASM_OUTPUT_SKIP
1041 #define ASM_OUTPUT_SKIP(STREAM, SIZE) \
1042 fprintf (STREAM, "\t.space\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
1043
1044 /* This is how to output an assembler line
1045 that says to advance the location counter
1046 to a multiple of 2**LOG bytes. */
1047 #define ASM_OUTPUT_ALIGN(STREAM, LOG) \
1048 fprintf (STREAM, "\t.align\t%d\n", (LOG))
1049
1050 /* Macros Affecting All Debugging Formats. */
1051 #ifndef PREFERRED_DEBUGGING_TYPE
1052 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
1053 #endif
1054
1055 /* Specific Options for DBX Output. */
1056 #define DBX_DEBUGGING_INFO 1
1057
1058 /* By default, turn on GDB extensions. */
1059 #define DEFAULT_GDB_EXTENSIONS 1
1060
1061 #define DBX_CONTIN_LENGTH 0
1062
1063 /* File Names in DBX Format. */
1064 #define DWARF2_DEBUGGING_INFO 1
1065
1066 /* The DWARF 2 CFA column which tracks the return address. */
1067 #define DWARF_FRAME_RETURN_COLUMN 3
1068
1069 /* Define if operations between registers always perform the operation
1070 on the full register even if a narrower mode is specified. */
1071 #define WORD_REGISTER_OPERATIONS
1072
1073 /* All references are zero extended. */
1074 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1075
1076 /* Define if loading short immediate values into registers sign extends. */
1077 #define SHORT_IMMEDIATES_SIGN_EXTEND
1078
1079 /* Max number of bytes we can move from memory to memory
1080 in one reasonably fast instruction. */
1081 #define MOVE_MAX 4
1082
1083 /* Define this to be nonzero if shift instructions ignore all but the low-order
1084 few bits. */
1085 #define SHIFT_COUNT_TRUNCATED 1
1086
1087 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1088 is done just by pretending it is already truncated. */
1089 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1090
1091 /* Specify the machine mode that pointers have.
1092 After generation of rtl, the compiler makes no further distinction
1093 between pointers and any other objects of this machine mode. */
1094 #define Pmode SImode
1095
1096 /* Give call MEMs SImode since it is the "most permissive" mode
1097 for 32-bit targets. */
1098 #define FUNCTION_MODE Pmode
1099
1100 struct extern_list GTY ((chain_next ("%h.next")))
1101 {
1102 struct extern_list *next; /* next external */
1103 const char *name; /* name of the external */
1104 int size; /* size in bytes */
1105 };
1106
1107 extern GTY (()) struct extern_list *extern_head;