Mercurial > hg > CbC > CbC_gcc
comparison gcc/lower-subreg.c @ 0:a06113de4d67
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author | kent <kent@cr.ie.u-ryukyu.ac.jp> |
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date | Fri, 17 Jul 2009 14:47:48 +0900 |
parents | |
children | 77e2b8dfacca |
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1 /* Decompose multiword subregs. | |
2 Copyright (C) 2007, 2008, 2009 Free Software Foundation, Inc. | |
3 Contributed by Richard Henderson <rth@redhat.com> | |
4 Ian Lance Taylor <iant@google.com> | |
5 | |
6 This file is part of GCC. | |
7 | |
8 GCC is free software; you can redistribute it and/or modify it under | |
9 the terms of the GNU General Public License as published by the Free | |
10 Software Foundation; either version 3, or (at your option) any later | |
11 version. | |
12 | |
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 for more details. | |
17 | |
18 You should have received a copy of the GNU General Public License | |
19 along with GCC; see the file COPYING3. If not see | |
20 <http://www.gnu.org/licenses/>. */ | |
21 | |
22 #include "config.h" | |
23 #include "system.h" | |
24 #include "coretypes.h" | |
25 #include "machmode.h" | |
26 #include "tm.h" | |
27 #include "rtl.h" | |
28 #include "tm_p.h" | |
29 #include "timevar.h" | |
30 #include "flags.h" | |
31 #include "insn-config.h" | |
32 #include "obstack.h" | |
33 #include "basic-block.h" | |
34 #include "recog.h" | |
35 #include "bitmap.h" | |
36 #include "expr.h" | |
37 #include "except.h" | |
38 #include "regs.h" | |
39 #include "tree-pass.h" | |
40 #include "df.h" | |
41 | |
42 #ifdef STACK_GROWS_DOWNWARD | |
43 # undef STACK_GROWS_DOWNWARD | |
44 # define STACK_GROWS_DOWNWARD 1 | |
45 #else | |
46 # define STACK_GROWS_DOWNWARD 0 | |
47 #endif | |
48 | |
49 DEF_VEC_P (bitmap); | |
50 DEF_VEC_ALLOC_P (bitmap,heap); | |
51 | |
52 /* Decompose multi-word pseudo-registers into individual | |
53 pseudo-registers when possible. This is possible when all the uses | |
54 of a multi-word register are via SUBREG, or are copies of the | |
55 register to another location. Breaking apart the register permits | |
56 more CSE and permits better register allocation. */ | |
57 | |
58 /* Bit N in this bitmap is set if regno N is used in a context in | |
59 which we can decompose it. */ | |
60 static bitmap decomposable_context; | |
61 | |
62 /* Bit N in this bitmap is set if regno N is used in a context in | |
63 which it can not be decomposed. */ | |
64 static bitmap non_decomposable_context; | |
65 | |
66 /* Bit N in the bitmap in element M of this array is set if there is a | |
67 copy from reg M to reg N. */ | |
68 static VEC(bitmap,heap) *reg_copy_graph; | |
69 | |
70 /* Return whether X is a simple object which we can take a word_mode | |
71 subreg of. */ | |
72 | |
73 static bool | |
74 simple_move_operand (rtx x) | |
75 { | |
76 if (GET_CODE (x) == SUBREG) | |
77 x = SUBREG_REG (x); | |
78 | |
79 if (!OBJECT_P (x)) | |
80 return false; | |
81 | |
82 if (GET_CODE (x) == LABEL_REF | |
83 || GET_CODE (x) == SYMBOL_REF | |
84 || GET_CODE (x) == HIGH | |
85 || GET_CODE (x) == CONST) | |
86 return false; | |
87 | |
88 if (MEM_P (x) | |
89 && (MEM_VOLATILE_P (x) | |
90 || mode_dependent_address_p (XEXP (x, 0)))) | |
91 return false; | |
92 | |
93 return true; | |
94 } | |
95 | |
96 /* If INSN is a single set between two objects, return the single set. | |
97 Such an insn can always be decomposed. INSN should have been | |
98 passed to recog and extract_insn before this is called. */ | |
99 | |
100 static rtx | |
101 simple_move (rtx insn) | |
102 { | |
103 rtx x; | |
104 rtx set; | |
105 enum machine_mode mode; | |
106 | |
107 if (recog_data.n_operands != 2) | |
108 return NULL_RTX; | |
109 | |
110 set = single_set (insn); | |
111 if (!set) | |
112 return NULL_RTX; | |
113 | |
114 x = SET_DEST (set); | |
115 if (x != recog_data.operand[0] && x != recog_data.operand[1]) | |
116 return NULL_RTX; | |
117 if (!simple_move_operand (x)) | |
118 return NULL_RTX; | |
119 | |
120 x = SET_SRC (set); | |
121 if (x != recog_data.operand[0] && x != recog_data.operand[1]) | |
122 return NULL_RTX; | |
123 /* For the src we can handle ASM_OPERANDS, and it is beneficial for | |
124 things like x86 rdtsc which returns a DImode value. */ | |
125 if (GET_CODE (x) != ASM_OPERANDS | |
126 && !simple_move_operand (x)) | |
127 return NULL_RTX; | |
128 | |
129 /* We try to decompose in integer modes, to avoid generating | |
130 inefficient code copying between integer and floating point | |
131 registers. That means that we can't decompose if this is a | |
132 non-integer mode for which there is no integer mode of the same | |
133 size. */ | |
134 mode = GET_MODE (SET_SRC (set)); | |
135 if (!SCALAR_INT_MODE_P (mode) | |
136 && (mode_for_size (GET_MODE_SIZE (mode) * BITS_PER_UNIT, MODE_INT, 0) | |
137 == BLKmode)) | |
138 return NULL_RTX; | |
139 | |
140 /* Reject PARTIAL_INT modes. They are used for processor specific | |
141 purposes and it's probably best not to tamper with them. */ | |
142 if (GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) | |
143 return NULL_RTX; | |
144 | |
145 return set; | |
146 } | |
147 | |
148 /* If SET is a copy from one multi-word pseudo-register to another, | |
149 record that in reg_copy_graph. Return whether it is such a | |
150 copy. */ | |
151 | |
152 static bool | |
153 find_pseudo_copy (rtx set) | |
154 { | |
155 rtx dest = SET_DEST (set); | |
156 rtx src = SET_SRC (set); | |
157 unsigned int rd, rs; | |
158 bitmap b; | |
159 | |
160 if (!REG_P (dest) || !REG_P (src)) | |
161 return false; | |
162 | |
163 rd = REGNO (dest); | |
164 rs = REGNO (src); | |
165 if (HARD_REGISTER_NUM_P (rd) || HARD_REGISTER_NUM_P (rs)) | |
166 return false; | |
167 | |
168 if (GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD) | |
169 return false; | |
170 | |
171 b = VEC_index (bitmap, reg_copy_graph, rs); | |
172 if (b == NULL) | |
173 { | |
174 b = BITMAP_ALLOC (NULL); | |
175 VEC_replace (bitmap, reg_copy_graph, rs, b); | |
176 } | |
177 | |
178 bitmap_set_bit (b, rd); | |
179 | |
180 return true; | |
181 } | |
182 | |
183 /* Look through the registers in DECOMPOSABLE_CONTEXT. For each case | |
184 where they are copied to another register, add the register to | |
185 which they are copied to DECOMPOSABLE_CONTEXT. Use | |
186 NON_DECOMPOSABLE_CONTEXT to limit this--we don't bother to track | |
187 copies of registers which are in NON_DECOMPOSABLE_CONTEXT. */ | |
188 | |
189 static void | |
190 propagate_pseudo_copies (void) | |
191 { | |
192 bitmap queue, propagate; | |
193 | |
194 queue = BITMAP_ALLOC (NULL); | |
195 propagate = BITMAP_ALLOC (NULL); | |
196 | |
197 bitmap_copy (queue, decomposable_context); | |
198 do | |
199 { | |
200 bitmap_iterator iter; | |
201 unsigned int i; | |
202 | |
203 bitmap_clear (propagate); | |
204 | |
205 EXECUTE_IF_SET_IN_BITMAP (queue, 0, i, iter) | |
206 { | |
207 bitmap b = VEC_index (bitmap, reg_copy_graph, i); | |
208 if (b) | |
209 bitmap_ior_and_compl_into (propagate, b, non_decomposable_context); | |
210 } | |
211 | |
212 bitmap_and_compl (queue, propagate, decomposable_context); | |
213 bitmap_ior_into (decomposable_context, propagate); | |
214 } | |
215 while (!bitmap_empty_p (queue)); | |
216 | |
217 BITMAP_FREE (queue); | |
218 BITMAP_FREE (propagate); | |
219 } | |
220 | |
221 /* A pointer to one of these values is passed to | |
222 find_decomposable_subregs via for_each_rtx. */ | |
223 | |
224 enum classify_move_insn | |
225 { | |
226 /* Not a simple move from one location to another. */ | |
227 NOT_SIMPLE_MOVE, | |
228 /* A simple move from one pseudo-register to another. */ | |
229 SIMPLE_PSEUDO_REG_MOVE, | |
230 /* A simple move involving a non-pseudo-register. */ | |
231 SIMPLE_MOVE | |
232 }; | |
233 | |
234 /* This is called via for_each_rtx. If we find a SUBREG which we | |
235 could use to decompose a pseudo-register, set a bit in | |
236 DECOMPOSABLE_CONTEXT. If we find an unadorned register which is | |
237 not a simple pseudo-register copy, DATA will point at the type of | |
238 move, and we set a bit in DECOMPOSABLE_CONTEXT or | |
239 NON_DECOMPOSABLE_CONTEXT as appropriate. */ | |
240 | |
241 static int | |
242 find_decomposable_subregs (rtx *px, void *data) | |
243 { | |
244 enum classify_move_insn *pcmi = (enum classify_move_insn *) data; | |
245 rtx x = *px; | |
246 | |
247 if (x == NULL_RTX) | |
248 return 0; | |
249 | |
250 if (GET_CODE (x) == SUBREG) | |
251 { | |
252 rtx inner = SUBREG_REG (x); | |
253 unsigned int regno, outer_size, inner_size, outer_words, inner_words; | |
254 | |
255 if (!REG_P (inner)) | |
256 return 0; | |
257 | |
258 regno = REGNO (inner); | |
259 if (HARD_REGISTER_NUM_P (regno)) | |
260 return -1; | |
261 | |
262 outer_size = GET_MODE_SIZE (GET_MODE (x)); | |
263 inner_size = GET_MODE_SIZE (GET_MODE (inner)); | |
264 outer_words = (outer_size + UNITS_PER_WORD - 1) / UNITS_PER_WORD; | |
265 inner_words = (inner_size + UNITS_PER_WORD - 1) / UNITS_PER_WORD; | |
266 | |
267 /* We only try to decompose single word subregs of multi-word | |
268 registers. When we find one, we return -1 to avoid iterating | |
269 over the inner register. | |
270 | |
271 ??? This doesn't allow, e.g., DImode subregs of TImode values | |
272 on 32-bit targets. We would need to record the way the | |
273 pseudo-register was used, and only decompose if all the uses | |
274 were the same number and size of pieces. Hopefully this | |
275 doesn't happen much. */ | |
276 | |
277 if (outer_words == 1 && inner_words > 1) | |
278 { | |
279 bitmap_set_bit (decomposable_context, regno); | |
280 return -1; | |
281 } | |
282 | |
283 /* If this is a cast from one mode to another, where the modes | |
284 have the same size, and they are not tieable, then mark this | |
285 register as non-decomposable. If we decompose it we are | |
286 likely to mess up whatever the backend is trying to do. */ | |
287 if (outer_words > 1 | |
288 && outer_size == inner_size | |
289 && !MODES_TIEABLE_P (GET_MODE (x), GET_MODE (inner))) | |
290 { | |
291 bitmap_set_bit (non_decomposable_context, regno); | |
292 return -1; | |
293 } | |
294 } | |
295 else if (REG_P (x)) | |
296 { | |
297 unsigned int regno; | |
298 | |
299 /* We will see an outer SUBREG before we see the inner REG, so | |
300 when we see a plain REG here it means a direct reference to | |
301 the register. | |
302 | |
303 If this is not a simple copy from one location to another, | |
304 then we can not decompose this register. If this is a simple | |
305 copy from one pseudo-register to another, and the mode is right | |
306 then we mark the register as decomposable. | |
307 Otherwise we don't say anything about this register -- | |
308 it could be decomposed, but whether that would be | |
309 profitable depends upon how it is used elsewhere. | |
310 | |
311 We only set bits in the bitmap for multi-word | |
312 pseudo-registers, since those are the only ones we care about | |
313 and it keeps the size of the bitmaps down. */ | |
314 | |
315 regno = REGNO (x); | |
316 if (!HARD_REGISTER_NUM_P (regno) | |
317 && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD) | |
318 { | |
319 switch (*pcmi) | |
320 { | |
321 case NOT_SIMPLE_MOVE: | |
322 bitmap_set_bit (non_decomposable_context, regno); | |
323 break; | |
324 case SIMPLE_PSEUDO_REG_MOVE: | |
325 if (MODES_TIEABLE_P (GET_MODE (x), word_mode)) | |
326 bitmap_set_bit (decomposable_context, regno); | |
327 break; | |
328 case SIMPLE_MOVE: | |
329 break; | |
330 default: | |
331 gcc_unreachable (); | |
332 } | |
333 } | |
334 } | |
335 else if (MEM_P (x)) | |
336 { | |
337 enum classify_move_insn cmi_mem = NOT_SIMPLE_MOVE; | |
338 | |
339 /* Any registers used in a MEM do not participate in a | |
340 SIMPLE_MOVE or SIMPLE_PSEUDO_REG_MOVE. Do our own recursion | |
341 here, and return -1 to block the parent's recursion. */ | |
342 for_each_rtx (&XEXP (x, 0), find_decomposable_subregs, &cmi_mem); | |
343 return -1; | |
344 } | |
345 | |
346 return 0; | |
347 } | |
348 | |
349 /* Decompose REGNO into word-sized components. We smash the REG node | |
350 in place. This ensures that (1) something goes wrong quickly if we | |
351 fail to make some replacement, and (2) the debug information inside | |
352 the symbol table is automatically kept up to date. */ | |
353 | |
354 static void | |
355 decompose_register (unsigned int regno) | |
356 { | |
357 rtx reg; | |
358 unsigned int words, i; | |
359 rtvec v; | |
360 | |
361 reg = regno_reg_rtx[regno]; | |
362 | |
363 regno_reg_rtx[regno] = NULL_RTX; | |
364 | |
365 words = GET_MODE_SIZE (GET_MODE (reg)); | |
366 words = (words + UNITS_PER_WORD - 1) / UNITS_PER_WORD; | |
367 | |
368 v = rtvec_alloc (words); | |
369 for (i = 0; i < words; ++i) | |
370 RTVEC_ELT (v, i) = gen_reg_rtx_offset (reg, word_mode, i * UNITS_PER_WORD); | |
371 | |
372 PUT_CODE (reg, CONCATN); | |
373 XVEC (reg, 0) = v; | |
374 | |
375 if (dump_file) | |
376 { | |
377 fprintf (dump_file, "; Splitting reg %u ->", regno); | |
378 for (i = 0; i < words; ++i) | |
379 fprintf (dump_file, " %u", REGNO (XVECEXP (reg, 0, i))); | |
380 fputc ('\n', dump_file); | |
381 } | |
382 } | |
383 | |
384 /* Get a SUBREG of a CONCATN. */ | |
385 | |
386 static rtx | |
387 simplify_subreg_concatn (enum machine_mode outermode, rtx op, | |
388 unsigned int byte) | |
389 { | |
390 unsigned int inner_size; | |
391 enum machine_mode innermode; | |
392 rtx part; | |
393 unsigned int final_offset; | |
394 | |
395 gcc_assert (GET_CODE (op) == CONCATN); | |
396 gcc_assert (byte % GET_MODE_SIZE (outermode) == 0); | |
397 | |
398 innermode = GET_MODE (op); | |
399 gcc_assert (byte < GET_MODE_SIZE (innermode)); | |
400 gcc_assert (GET_MODE_SIZE (outermode) <= GET_MODE_SIZE (innermode)); | |
401 | |
402 inner_size = GET_MODE_SIZE (innermode) / XVECLEN (op, 0); | |
403 part = XVECEXP (op, 0, byte / inner_size); | |
404 final_offset = byte % inner_size; | |
405 if (final_offset + GET_MODE_SIZE (outermode) > inner_size) | |
406 return NULL_RTX; | |
407 | |
408 return simplify_gen_subreg (outermode, part, GET_MODE (part), final_offset); | |
409 } | |
410 | |
411 /* Wrapper around simplify_gen_subreg which handles CONCATN. */ | |
412 | |
413 static rtx | |
414 simplify_gen_subreg_concatn (enum machine_mode outermode, rtx op, | |
415 enum machine_mode innermode, unsigned int byte) | |
416 { | |
417 rtx ret; | |
418 | |
419 /* We have to handle generating a SUBREG of a SUBREG of a CONCATN. | |
420 If OP is a SUBREG of a CONCATN, then it must be a simple mode | |
421 change with the same size and offset 0, or it must extract a | |
422 part. We shouldn't see anything else here. */ | |
423 if (GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == CONCATN) | |
424 { | |
425 rtx op2; | |
426 | |
427 if ((GET_MODE_SIZE (GET_MODE (op)) | |
428 == GET_MODE_SIZE (GET_MODE (SUBREG_REG (op)))) | |
429 && SUBREG_BYTE (op) == 0) | |
430 return simplify_gen_subreg_concatn (outermode, SUBREG_REG (op), | |
431 GET_MODE (SUBREG_REG (op)), byte); | |
432 | |
433 op2 = simplify_subreg_concatn (GET_MODE (op), SUBREG_REG (op), | |
434 SUBREG_BYTE (op)); | |
435 if (op2 == NULL_RTX) | |
436 { | |
437 /* We don't handle paradoxical subregs here. */ | |
438 gcc_assert (GET_MODE_SIZE (outermode) | |
439 <= GET_MODE_SIZE (GET_MODE (op))); | |
440 gcc_assert (GET_MODE_SIZE (GET_MODE (op)) | |
441 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (op)))); | |
442 op2 = simplify_subreg_concatn (outermode, SUBREG_REG (op), | |
443 byte + SUBREG_BYTE (op)); | |
444 gcc_assert (op2 != NULL_RTX); | |
445 return op2; | |
446 } | |
447 | |
448 op = op2; | |
449 gcc_assert (op != NULL_RTX); | |
450 gcc_assert (innermode == GET_MODE (op)); | |
451 } | |
452 | |
453 if (GET_CODE (op) == CONCATN) | |
454 return simplify_subreg_concatn (outermode, op, byte); | |
455 | |
456 ret = simplify_gen_subreg (outermode, op, innermode, byte); | |
457 | |
458 /* If we see an insn like (set (reg:DI) (subreg:DI (reg:SI) 0)) then | |
459 resolve_simple_move will ask for the high part of the paradoxical | |
460 subreg, which does not have a value. Just return a zero. */ | |
461 if (ret == NULL_RTX | |
462 && GET_CODE (op) == SUBREG | |
463 && SUBREG_BYTE (op) == 0 | |
464 && (GET_MODE_SIZE (innermode) | |
465 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))))) | |
466 return CONST0_RTX (outermode); | |
467 | |
468 gcc_assert (ret != NULL_RTX); | |
469 return ret; | |
470 } | |
471 | |
472 /* Return whether we should resolve X into the registers into which it | |
473 was decomposed. */ | |
474 | |
475 static bool | |
476 resolve_reg_p (rtx x) | |
477 { | |
478 return GET_CODE (x) == CONCATN; | |
479 } | |
480 | |
481 /* Return whether X is a SUBREG of a register which we need to | |
482 resolve. */ | |
483 | |
484 static bool | |
485 resolve_subreg_p (rtx x) | |
486 { | |
487 if (GET_CODE (x) != SUBREG) | |
488 return false; | |
489 return resolve_reg_p (SUBREG_REG (x)); | |
490 } | |
491 | |
492 /* This is called via for_each_rtx. Look for SUBREGs which need to be | |
493 decomposed. */ | |
494 | |
495 static int | |
496 resolve_subreg_use (rtx *px, void *data) | |
497 { | |
498 rtx insn = (rtx) data; | |
499 rtx x = *px; | |
500 | |
501 if (x == NULL_RTX) | |
502 return 0; | |
503 | |
504 if (resolve_subreg_p (x)) | |
505 { | |
506 x = simplify_subreg_concatn (GET_MODE (x), SUBREG_REG (x), | |
507 SUBREG_BYTE (x)); | |
508 | |
509 /* It is possible for a note to contain a reference which we can | |
510 decompose. In this case, return 1 to the caller to indicate | |
511 that the note must be removed. */ | |
512 if (!x) | |
513 { | |
514 gcc_assert (!insn); | |
515 return 1; | |
516 } | |
517 | |
518 validate_change (insn, px, x, 1); | |
519 return -1; | |
520 } | |
521 | |
522 if (resolve_reg_p (x)) | |
523 { | |
524 /* Return 1 to the caller to indicate that we found a direct | |
525 reference to a register which is being decomposed. This can | |
526 happen inside notes, multiword shift or zero-extend | |
527 instructions. */ | |
528 return 1; | |
529 } | |
530 | |
531 return 0; | |
532 } | |
533 | |
534 /* We are deleting INSN. Move any EH_REGION notes to INSNS. */ | |
535 | |
536 static void | |
537 move_eh_region_note (rtx insn, rtx insns) | |
538 { | |
539 rtx note, p; | |
540 | |
541 note = find_reg_note (insn, REG_EH_REGION, NULL_RTX); | |
542 if (note == NULL_RTX) | |
543 return; | |
544 | |
545 gcc_assert (CALL_P (insn) | |
546 || (flag_non_call_exceptions && may_trap_p (PATTERN (insn)))); | |
547 | |
548 for (p = insns; p != NULL_RTX; p = NEXT_INSN (p)) | |
549 { | |
550 if (CALL_P (p) | |
551 || (flag_non_call_exceptions | |
552 && INSN_P (p) | |
553 && may_trap_p (PATTERN (p)))) | |
554 add_reg_note (p, REG_EH_REGION, XEXP (note, 0)); | |
555 } | |
556 } | |
557 | |
558 /* Resolve any decomposed registers which appear in register notes on | |
559 INSN. */ | |
560 | |
561 static void | |
562 resolve_reg_notes (rtx insn) | |
563 { | |
564 rtx *pnote, note; | |
565 | |
566 note = find_reg_equal_equiv_note (insn); | |
567 if (note) | |
568 { | |
569 int old_count = num_validated_changes (); | |
570 if (for_each_rtx (&XEXP (note, 0), resolve_subreg_use, NULL)) | |
571 remove_note (insn, note); | |
572 else | |
573 if (old_count != num_validated_changes ()) | |
574 df_notes_rescan (insn); | |
575 } | |
576 | |
577 pnote = ®_NOTES (insn); | |
578 while (*pnote != NULL_RTX) | |
579 { | |
580 bool del = false; | |
581 | |
582 note = *pnote; | |
583 switch (REG_NOTE_KIND (note)) | |
584 { | |
585 case REG_DEAD: | |
586 case REG_UNUSED: | |
587 if (resolve_reg_p (XEXP (note, 0))) | |
588 del = true; | |
589 break; | |
590 | |
591 default: | |
592 break; | |
593 } | |
594 | |
595 if (del) | |
596 *pnote = XEXP (note, 1); | |
597 else | |
598 pnote = &XEXP (note, 1); | |
599 } | |
600 } | |
601 | |
602 /* Return whether X can be decomposed into subwords. */ | |
603 | |
604 static bool | |
605 can_decompose_p (rtx x) | |
606 { | |
607 if (REG_P (x)) | |
608 { | |
609 unsigned int regno = REGNO (x); | |
610 | |
611 if (HARD_REGISTER_NUM_P (regno)) | |
612 return (validate_subreg (word_mode, GET_MODE (x), x, UNITS_PER_WORD) | |
613 && HARD_REGNO_MODE_OK (regno, word_mode)); | |
614 else | |
615 return !bitmap_bit_p (non_decomposable_context, regno); | |
616 } | |
617 | |
618 return true; | |
619 } | |
620 | |
621 /* Decompose the registers used in a simple move SET within INSN. If | |
622 we don't change anything, return INSN, otherwise return the start | |
623 of the sequence of moves. */ | |
624 | |
625 static rtx | |
626 resolve_simple_move (rtx set, rtx insn) | |
627 { | |
628 rtx src, dest, real_dest, insns; | |
629 enum machine_mode orig_mode, dest_mode; | |
630 unsigned int words; | |
631 bool pushing; | |
632 | |
633 src = SET_SRC (set); | |
634 dest = SET_DEST (set); | |
635 orig_mode = GET_MODE (dest); | |
636 | |
637 words = (GET_MODE_SIZE (orig_mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD; | |
638 if (words <= 1) | |
639 return insn; | |
640 | |
641 start_sequence (); | |
642 | |
643 /* We have to handle copying from a SUBREG of a decomposed reg where | |
644 the SUBREG is larger than word size. Rather than assume that we | |
645 can take a word_mode SUBREG of the destination, we copy to a new | |
646 register and then copy that to the destination. */ | |
647 | |
648 real_dest = NULL_RTX; | |
649 | |
650 if (GET_CODE (src) == SUBREG | |
651 && resolve_reg_p (SUBREG_REG (src)) | |
652 && (SUBREG_BYTE (src) != 0 | |
653 || (GET_MODE_SIZE (orig_mode) | |
654 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))) | |
655 { | |
656 real_dest = dest; | |
657 dest = gen_reg_rtx (orig_mode); | |
658 if (REG_P (real_dest)) | |
659 REG_ATTRS (dest) = REG_ATTRS (real_dest); | |
660 } | |
661 | |
662 /* Similarly if we are copying to a SUBREG of a decomposed reg where | |
663 the SUBREG is larger than word size. */ | |
664 | |
665 if (GET_CODE (dest) == SUBREG | |
666 && resolve_reg_p (SUBREG_REG (dest)) | |
667 && (SUBREG_BYTE (dest) != 0 | |
668 || (GET_MODE_SIZE (orig_mode) | |
669 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))))) | |
670 { | |
671 rtx reg, minsn, smove; | |
672 | |
673 reg = gen_reg_rtx (orig_mode); | |
674 minsn = emit_move_insn (reg, src); | |
675 smove = single_set (minsn); | |
676 gcc_assert (smove != NULL_RTX); | |
677 resolve_simple_move (smove, minsn); | |
678 src = reg; | |
679 } | |
680 | |
681 /* If we didn't have any big SUBREGS of decomposed registers, and | |
682 neither side of the move is a register we are decomposing, then | |
683 we don't have to do anything here. */ | |
684 | |
685 if (src == SET_SRC (set) | |
686 && dest == SET_DEST (set) | |
687 && !resolve_reg_p (src) | |
688 && !resolve_subreg_p (src) | |
689 && !resolve_reg_p (dest) | |
690 && !resolve_subreg_p (dest)) | |
691 { | |
692 end_sequence (); | |
693 return insn; | |
694 } | |
695 | |
696 /* It's possible for the code to use a subreg of a decomposed | |
697 register while forming an address. We need to handle that before | |
698 passing the address to emit_move_insn. We pass NULL_RTX as the | |
699 insn parameter to resolve_subreg_use because we can not validate | |
700 the insn yet. */ | |
701 if (MEM_P (src) || MEM_P (dest)) | |
702 { | |
703 int acg; | |
704 | |
705 if (MEM_P (src)) | |
706 for_each_rtx (&XEXP (src, 0), resolve_subreg_use, NULL_RTX); | |
707 if (MEM_P (dest)) | |
708 for_each_rtx (&XEXP (dest, 0), resolve_subreg_use, NULL_RTX); | |
709 acg = apply_change_group (); | |
710 gcc_assert (acg); | |
711 } | |
712 | |
713 /* If SRC is a register which we can't decompose, or has side | |
714 effects, we need to move via a temporary register. */ | |
715 | |
716 if (!can_decompose_p (src) | |
717 || side_effects_p (src) | |
718 || GET_CODE (src) == ASM_OPERANDS) | |
719 { | |
720 rtx reg; | |
721 | |
722 reg = gen_reg_rtx (orig_mode); | |
723 emit_move_insn (reg, src); | |
724 src = reg; | |
725 } | |
726 | |
727 /* If DEST is a register which we can't decompose, or has side | |
728 effects, we need to first move to a temporary register. We | |
729 handle the common case of pushing an operand directly. We also | |
730 go through a temporary register if it holds a floating point | |
731 value. This gives us better code on systems which can't move | |
732 data easily between integer and floating point registers. */ | |
733 | |
734 dest_mode = orig_mode; | |
735 pushing = push_operand (dest, dest_mode); | |
736 if (!can_decompose_p (dest) | |
737 || (side_effects_p (dest) && !pushing) | |
738 || (!SCALAR_INT_MODE_P (dest_mode) | |
739 && !resolve_reg_p (dest) | |
740 && !resolve_subreg_p (dest))) | |
741 { | |
742 if (real_dest == NULL_RTX) | |
743 real_dest = dest; | |
744 if (!SCALAR_INT_MODE_P (dest_mode)) | |
745 { | |
746 dest_mode = mode_for_size (GET_MODE_SIZE (dest_mode) * BITS_PER_UNIT, | |
747 MODE_INT, 0); | |
748 gcc_assert (dest_mode != BLKmode); | |
749 } | |
750 dest = gen_reg_rtx (dest_mode); | |
751 if (REG_P (real_dest)) | |
752 REG_ATTRS (dest) = REG_ATTRS (real_dest); | |
753 } | |
754 | |
755 if (pushing) | |
756 { | |
757 unsigned int i, j, jinc; | |
758 | |
759 gcc_assert (GET_MODE_SIZE (orig_mode) % UNITS_PER_WORD == 0); | |
760 gcc_assert (GET_CODE (XEXP (dest, 0)) != PRE_MODIFY); | |
761 gcc_assert (GET_CODE (XEXP (dest, 0)) != POST_MODIFY); | |
762 | |
763 if (WORDS_BIG_ENDIAN == STACK_GROWS_DOWNWARD) | |
764 { | |
765 j = 0; | |
766 jinc = 1; | |
767 } | |
768 else | |
769 { | |
770 j = words - 1; | |
771 jinc = -1; | |
772 } | |
773 | |
774 for (i = 0; i < words; ++i, j += jinc) | |
775 { | |
776 rtx temp; | |
777 | |
778 temp = copy_rtx (XEXP (dest, 0)); | |
779 temp = adjust_automodify_address_nv (dest, word_mode, temp, | |
780 j * UNITS_PER_WORD); | |
781 emit_move_insn (temp, | |
782 simplify_gen_subreg_concatn (word_mode, src, | |
783 orig_mode, | |
784 j * UNITS_PER_WORD)); | |
785 } | |
786 } | |
787 else | |
788 { | |
789 unsigned int i; | |
790 | |
791 if (REG_P (dest) && !HARD_REGISTER_NUM_P (REGNO (dest))) | |
792 emit_clobber (dest); | |
793 | |
794 for (i = 0; i < words; ++i) | |
795 emit_move_insn (simplify_gen_subreg_concatn (word_mode, dest, | |
796 dest_mode, | |
797 i * UNITS_PER_WORD), | |
798 simplify_gen_subreg_concatn (word_mode, src, | |
799 orig_mode, | |
800 i * UNITS_PER_WORD)); | |
801 } | |
802 | |
803 if (real_dest != NULL_RTX) | |
804 { | |
805 rtx mdest, minsn, smove; | |
806 | |
807 if (dest_mode == orig_mode) | |
808 mdest = dest; | |
809 else | |
810 mdest = simplify_gen_subreg (orig_mode, dest, GET_MODE (dest), 0); | |
811 minsn = emit_move_insn (real_dest, mdest); | |
812 | |
813 smove = single_set (minsn); | |
814 gcc_assert (smove != NULL_RTX); | |
815 | |
816 resolve_simple_move (smove, minsn); | |
817 } | |
818 | |
819 insns = get_insns (); | |
820 end_sequence (); | |
821 | |
822 move_eh_region_note (insn, insns); | |
823 | |
824 emit_insn_before (insns, insn); | |
825 | |
826 delete_insn (insn); | |
827 | |
828 return insns; | |
829 } | |
830 | |
831 /* Change a CLOBBER of a decomposed register into a CLOBBER of the | |
832 component registers. Return whether we changed something. */ | |
833 | |
834 static bool | |
835 resolve_clobber (rtx pat, rtx insn) | |
836 { | |
837 rtx reg; | |
838 enum machine_mode orig_mode; | |
839 unsigned int words, i; | |
840 int ret; | |
841 | |
842 reg = XEXP (pat, 0); | |
843 if (!resolve_reg_p (reg) && !resolve_subreg_p (reg)) | |
844 return false; | |
845 | |
846 orig_mode = GET_MODE (reg); | |
847 words = GET_MODE_SIZE (orig_mode); | |
848 words = (words + UNITS_PER_WORD - 1) / UNITS_PER_WORD; | |
849 | |
850 ret = validate_change (NULL_RTX, &XEXP (pat, 0), | |
851 simplify_gen_subreg_concatn (word_mode, reg, | |
852 orig_mode, 0), | |
853 0); | |
854 df_insn_rescan (insn); | |
855 gcc_assert (ret != 0); | |
856 | |
857 for (i = words - 1; i > 0; --i) | |
858 { | |
859 rtx x; | |
860 | |
861 x = simplify_gen_subreg_concatn (word_mode, reg, orig_mode, | |
862 i * UNITS_PER_WORD); | |
863 x = gen_rtx_CLOBBER (VOIDmode, x); | |
864 emit_insn_after (x, insn); | |
865 } | |
866 | |
867 resolve_reg_notes (insn); | |
868 | |
869 return true; | |
870 } | |
871 | |
872 /* A USE of a decomposed register is no longer meaningful. Return | |
873 whether we changed something. */ | |
874 | |
875 static bool | |
876 resolve_use (rtx pat, rtx insn) | |
877 { | |
878 if (resolve_reg_p (XEXP (pat, 0)) || resolve_subreg_p (XEXP (pat, 0))) | |
879 { | |
880 delete_insn (insn); | |
881 return true; | |
882 } | |
883 | |
884 resolve_reg_notes (insn); | |
885 | |
886 return false; | |
887 } | |
888 | |
889 /* Checks if INSN is a decomposable multiword-shift or zero-extend and | |
890 sets the decomposable_context bitmap accordingly. A non-zero value | |
891 is returned if a decomposable insn has been found. */ | |
892 | |
893 static int | |
894 find_decomposable_shift_zext (rtx insn) | |
895 { | |
896 rtx set; | |
897 rtx op; | |
898 rtx op_operand; | |
899 | |
900 set = single_set (insn); | |
901 if (!set) | |
902 return 0; | |
903 | |
904 op = SET_SRC (set); | |
905 if (GET_CODE (op) != ASHIFT | |
906 && GET_CODE (op) != LSHIFTRT | |
907 && GET_CODE (op) != ZERO_EXTEND) | |
908 return 0; | |
909 | |
910 op_operand = XEXP (op, 0); | |
911 if (!REG_P (SET_DEST (set)) || !REG_P (op_operand) | |
912 || HARD_REGISTER_NUM_P (REGNO (SET_DEST (set))) | |
913 || HARD_REGISTER_NUM_P (REGNO (op_operand)) | |
914 || !SCALAR_INT_MODE_P (GET_MODE (op))) | |
915 return 0; | |
916 | |
917 if (GET_CODE (op) == ZERO_EXTEND) | |
918 { | |
919 if (GET_MODE (op_operand) != word_mode | |
920 || GET_MODE_BITSIZE (GET_MODE (op)) != 2 * BITS_PER_WORD) | |
921 return 0; | |
922 } | |
923 else /* left or right shift */ | |
924 { | |
925 if (GET_CODE (XEXP (op, 1)) != CONST_INT | |
926 || INTVAL (XEXP (op, 1)) < BITS_PER_WORD | |
927 || GET_MODE_BITSIZE (GET_MODE (op_operand)) != 2 * BITS_PER_WORD) | |
928 return 0; | |
929 } | |
930 | |
931 bitmap_set_bit (decomposable_context, REGNO (SET_DEST (set))); | |
932 | |
933 if (GET_CODE (op) != ZERO_EXTEND) | |
934 bitmap_set_bit (decomposable_context, REGNO (op_operand)); | |
935 | |
936 return 1; | |
937 } | |
938 | |
939 /* Decompose a more than word wide shift (in INSN) of a multiword | |
940 pseudo or a multiword zero-extend of a wordmode pseudo into a move | |
941 and 'set to zero' insn. Return a pointer to the new insn when a | |
942 replacement was done. */ | |
943 | |
944 static rtx | |
945 resolve_shift_zext (rtx insn) | |
946 { | |
947 rtx set; | |
948 rtx op; | |
949 rtx op_operand; | |
950 rtx insns; | |
951 rtx src_reg, dest_reg, dest_zero; | |
952 int src_reg_num, dest_reg_num, offset1, offset2, src_offset; | |
953 | |
954 set = single_set (insn); | |
955 if (!set) | |
956 return NULL_RTX; | |
957 | |
958 op = SET_SRC (set); | |
959 if (GET_CODE (op) != ASHIFT | |
960 && GET_CODE (op) != LSHIFTRT | |
961 && GET_CODE (op) != ZERO_EXTEND) | |
962 return NULL_RTX; | |
963 | |
964 op_operand = XEXP (op, 0); | |
965 | |
966 if (!resolve_reg_p (SET_DEST (set)) && !resolve_reg_p (op_operand)) | |
967 return NULL_RTX; | |
968 | |
969 /* src_reg_num is the number of the word mode register which we | |
970 are operating on. For a left shift and a zero_extend on little | |
971 endian machines this is register 0. */ | |
972 src_reg_num = GET_CODE (op) == LSHIFTRT ? 1 : 0; | |
973 | |
974 if (WORDS_BIG_ENDIAN | |
975 && GET_MODE_SIZE (GET_MODE (op_operand)) > UNITS_PER_WORD) | |
976 src_reg_num = 1 - src_reg_num; | |
977 | |
978 if (GET_CODE (op) == ZERO_EXTEND) | |
979 dest_reg_num = WORDS_BIG_ENDIAN ? 1 : 0; | |
980 else | |
981 dest_reg_num = 1 - src_reg_num; | |
982 | |
983 offset1 = UNITS_PER_WORD * dest_reg_num; | |
984 offset2 = UNITS_PER_WORD * (1 - dest_reg_num); | |
985 src_offset = UNITS_PER_WORD * src_reg_num; | |
986 | |
987 if (WORDS_BIG_ENDIAN != BYTES_BIG_ENDIAN) | |
988 { | |
989 offset1 += UNITS_PER_WORD - 1; | |
990 offset2 += UNITS_PER_WORD - 1; | |
991 src_offset += UNITS_PER_WORD - 1; | |
992 } | |
993 | |
994 start_sequence (); | |
995 | |
996 dest_reg = simplify_gen_subreg_concatn (word_mode, SET_DEST (set), | |
997 GET_MODE (SET_DEST (set)), | |
998 offset1); | |
999 dest_zero = simplify_gen_subreg_concatn (word_mode, SET_DEST (set), | |
1000 GET_MODE (SET_DEST (set)), | |
1001 offset2); | |
1002 src_reg = simplify_gen_subreg_concatn (word_mode, op_operand, | |
1003 GET_MODE (op_operand), | |
1004 src_offset); | |
1005 if (GET_CODE (op) != ZERO_EXTEND) | |
1006 { | |
1007 int shift_count = INTVAL (XEXP (op, 1)); | |
1008 if (shift_count > BITS_PER_WORD) | |
1009 src_reg = expand_shift (GET_CODE (op) == ASHIFT ? | |
1010 LSHIFT_EXPR : RSHIFT_EXPR, | |
1011 word_mode, src_reg, | |
1012 build_int_cst (NULL_TREE, | |
1013 shift_count - BITS_PER_WORD), | |
1014 dest_reg, 1); | |
1015 } | |
1016 | |
1017 if (dest_reg != src_reg) | |
1018 emit_move_insn (dest_reg, src_reg); | |
1019 emit_move_insn (dest_zero, CONST0_RTX (word_mode)); | |
1020 insns = get_insns (); | |
1021 | |
1022 end_sequence (); | |
1023 | |
1024 emit_insn_before (insns, insn); | |
1025 | |
1026 if (dump_file) | |
1027 { | |
1028 rtx in; | |
1029 fprintf (dump_file, "; Replacing insn: %d with insns: ", INSN_UID (insn)); | |
1030 for (in = insns; in != insn; in = NEXT_INSN (in)) | |
1031 fprintf (dump_file, "%d ", INSN_UID (in)); | |
1032 fprintf (dump_file, "\n"); | |
1033 } | |
1034 | |
1035 delete_insn (insn); | |
1036 return insns; | |
1037 } | |
1038 | |
1039 /* Look for registers which are always accessed via word-sized SUBREGs | |
1040 or via copies. Decompose these registers into several word-sized | |
1041 pseudo-registers. */ | |
1042 | |
1043 static void | |
1044 decompose_multiword_subregs (void) | |
1045 { | |
1046 unsigned int max; | |
1047 basic_block bb; | |
1048 | |
1049 if (df) | |
1050 df_set_flags (DF_DEFER_INSN_RESCAN); | |
1051 | |
1052 max = max_reg_num (); | |
1053 | |
1054 /* First see if there are any multi-word pseudo-registers. If there | |
1055 aren't, there is nothing we can do. This should speed up this | |
1056 pass in the normal case, since it should be faster than scanning | |
1057 all the insns. */ | |
1058 { | |
1059 unsigned int i; | |
1060 | |
1061 for (i = FIRST_PSEUDO_REGISTER; i < max; ++i) | |
1062 { | |
1063 if (regno_reg_rtx[i] != NULL | |
1064 && GET_MODE_SIZE (GET_MODE (regno_reg_rtx[i])) > UNITS_PER_WORD) | |
1065 break; | |
1066 } | |
1067 if (i == max) | |
1068 return; | |
1069 } | |
1070 | |
1071 /* FIXME: When the dataflow branch is merged, we can change this | |
1072 code to look for each multi-word pseudo-register and to find each | |
1073 insn which sets or uses that register. That should be faster | |
1074 than scanning all the insns. */ | |
1075 | |
1076 decomposable_context = BITMAP_ALLOC (NULL); | |
1077 non_decomposable_context = BITMAP_ALLOC (NULL); | |
1078 | |
1079 reg_copy_graph = VEC_alloc (bitmap, heap, max); | |
1080 VEC_safe_grow (bitmap, heap, reg_copy_graph, max); | |
1081 memset (VEC_address (bitmap, reg_copy_graph), 0, sizeof (bitmap) * max); | |
1082 | |
1083 FOR_EACH_BB (bb) | |
1084 { | |
1085 rtx insn; | |
1086 | |
1087 FOR_BB_INSNS (bb, insn) | |
1088 { | |
1089 rtx set; | |
1090 enum classify_move_insn cmi; | |
1091 int i, n; | |
1092 | |
1093 if (!INSN_P (insn) | |
1094 || GET_CODE (PATTERN (insn)) == CLOBBER | |
1095 || GET_CODE (PATTERN (insn)) == USE) | |
1096 continue; | |
1097 | |
1098 if (find_decomposable_shift_zext (insn)) | |
1099 continue; | |
1100 | |
1101 recog_memoized (insn); | |
1102 extract_insn (insn); | |
1103 | |
1104 set = simple_move (insn); | |
1105 | |
1106 if (!set) | |
1107 cmi = NOT_SIMPLE_MOVE; | |
1108 else | |
1109 { | |
1110 if (find_pseudo_copy (set)) | |
1111 cmi = SIMPLE_PSEUDO_REG_MOVE; | |
1112 else | |
1113 cmi = SIMPLE_MOVE; | |
1114 } | |
1115 | |
1116 n = recog_data.n_operands; | |
1117 for (i = 0; i < n; ++i) | |
1118 { | |
1119 for_each_rtx (&recog_data.operand[i], | |
1120 find_decomposable_subregs, | |
1121 &cmi); | |
1122 | |
1123 /* We handle ASM_OPERANDS as a special case to support | |
1124 things like x86 rdtsc which returns a DImode value. | |
1125 We can decompose the output, which will certainly be | |
1126 operand 0, but not the inputs. */ | |
1127 | |
1128 if (cmi == SIMPLE_MOVE | |
1129 && GET_CODE (SET_SRC (set)) == ASM_OPERANDS) | |
1130 { | |
1131 gcc_assert (i == 0); | |
1132 cmi = NOT_SIMPLE_MOVE; | |
1133 } | |
1134 } | |
1135 } | |
1136 } | |
1137 | |
1138 bitmap_and_compl_into (decomposable_context, non_decomposable_context); | |
1139 if (!bitmap_empty_p (decomposable_context)) | |
1140 { | |
1141 sbitmap sub_blocks; | |
1142 unsigned int i; | |
1143 sbitmap_iterator sbi; | |
1144 bitmap_iterator iter; | |
1145 unsigned int regno; | |
1146 | |
1147 propagate_pseudo_copies (); | |
1148 | |
1149 sub_blocks = sbitmap_alloc (last_basic_block); | |
1150 sbitmap_zero (sub_blocks); | |
1151 | |
1152 EXECUTE_IF_SET_IN_BITMAP (decomposable_context, 0, regno, iter) | |
1153 decompose_register (regno); | |
1154 | |
1155 FOR_EACH_BB (bb) | |
1156 { | |
1157 rtx insn; | |
1158 | |
1159 FOR_BB_INSNS (bb, insn) | |
1160 { | |
1161 rtx next, pat; | |
1162 | |
1163 if (!INSN_P (insn)) | |
1164 continue; | |
1165 | |
1166 next = NEXT_INSN (insn); | |
1167 | |
1168 pat = PATTERN (insn); | |
1169 if (GET_CODE (pat) == CLOBBER) | |
1170 resolve_clobber (pat, insn); | |
1171 else if (GET_CODE (pat) == USE) | |
1172 resolve_use (pat, insn); | |
1173 else | |
1174 { | |
1175 rtx set; | |
1176 int i; | |
1177 | |
1178 recog_memoized (insn); | |
1179 extract_insn (insn); | |
1180 | |
1181 set = simple_move (insn); | |
1182 if (set) | |
1183 { | |
1184 rtx orig_insn = insn; | |
1185 bool cfi = control_flow_insn_p (insn); | |
1186 | |
1187 /* We can end up splitting loads to multi-word pseudos | |
1188 into separate loads to machine word size pseudos. | |
1189 When this happens, we first had one load that can | |
1190 throw, and after resolve_simple_move we'll have a | |
1191 bunch of loads (at least two). All those loads may | |
1192 trap if we can have non-call exceptions, so they | |
1193 all will end the current basic block. We split the | |
1194 block after the outer loop over all insns, but we | |
1195 make sure here that we will be able to split the | |
1196 basic block and still produce the correct control | |
1197 flow graph for it. */ | |
1198 gcc_assert (!cfi | |
1199 || (flag_non_call_exceptions | |
1200 && can_throw_internal (insn))); | |
1201 | |
1202 insn = resolve_simple_move (set, insn); | |
1203 if (insn != orig_insn) | |
1204 { | |
1205 recog_memoized (insn); | |
1206 extract_insn (insn); | |
1207 | |
1208 if (cfi) | |
1209 SET_BIT (sub_blocks, bb->index); | |
1210 } | |
1211 } | |
1212 else | |
1213 { | |
1214 rtx decomposed_shift; | |
1215 | |
1216 decomposed_shift = resolve_shift_zext (insn); | |
1217 if (decomposed_shift != NULL_RTX) | |
1218 { | |
1219 insn = decomposed_shift; | |
1220 recog_memoized (insn); | |
1221 extract_insn (insn); | |
1222 } | |
1223 } | |
1224 | |
1225 for (i = recog_data.n_operands - 1; i >= 0; --i) | |
1226 for_each_rtx (recog_data.operand_loc[i], | |
1227 resolve_subreg_use, | |
1228 insn); | |
1229 | |
1230 resolve_reg_notes (insn); | |
1231 | |
1232 if (num_validated_changes () > 0) | |
1233 { | |
1234 for (i = recog_data.n_dups - 1; i >= 0; --i) | |
1235 { | |
1236 rtx *pl = recog_data.dup_loc[i]; | |
1237 int dup_num = recog_data.dup_num[i]; | |
1238 rtx *px = recog_data.operand_loc[dup_num]; | |
1239 | |
1240 validate_unshare_change (insn, pl, *px, 1); | |
1241 } | |
1242 | |
1243 i = apply_change_group (); | |
1244 gcc_assert (i); | |
1245 } | |
1246 } | |
1247 } | |
1248 } | |
1249 | |
1250 /* If we had insns to split that caused control flow insns in the middle | |
1251 of a basic block, split those blocks now. Note that we only handle | |
1252 the case where splitting a load has caused multiple possibly trapping | |
1253 loads to appear. */ | |
1254 EXECUTE_IF_SET_IN_SBITMAP (sub_blocks, 0, i, sbi) | |
1255 { | |
1256 rtx insn, end; | |
1257 edge fallthru; | |
1258 | |
1259 bb = BASIC_BLOCK (i); | |
1260 insn = BB_HEAD (bb); | |
1261 end = BB_END (bb); | |
1262 | |
1263 while (insn != end) | |
1264 { | |
1265 if (control_flow_insn_p (insn)) | |
1266 { | |
1267 /* Split the block after insn. There will be a fallthru | |
1268 edge, which is OK so we keep it. We have to create the | |
1269 exception edges ourselves. */ | |
1270 fallthru = split_block (bb, insn); | |
1271 rtl_make_eh_edge (NULL, bb, BB_END (bb)); | |
1272 bb = fallthru->dest; | |
1273 insn = BB_HEAD (bb); | |
1274 } | |
1275 else | |
1276 insn = NEXT_INSN (insn); | |
1277 } | |
1278 } | |
1279 | |
1280 sbitmap_free (sub_blocks); | |
1281 } | |
1282 | |
1283 { | |
1284 unsigned int i; | |
1285 bitmap b; | |
1286 | |
1287 for (i = 0; VEC_iterate (bitmap, reg_copy_graph, i, b); ++i) | |
1288 if (b) | |
1289 BITMAP_FREE (b); | |
1290 } | |
1291 | |
1292 VEC_free (bitmap, heap, reg_copy_graph); | |
1293 | |
1294 BITMAP_FREE (decomposable_context); | |
1295 BITMAP_FREE (non_decomposable_context); | |
1296 } | |
1297 | |
1298 /* Gate function for lower subreg pass. */ | |
1299 | |
1300 static bool | |
1301 gate_handle_lower_subreg (void) | |
1302 { | |
1303 return flag_split_wide_types != 0; | |
1304 } | |
1305 | |
1306 /* Implement first lower subreg pass. */ | |
1307 | |
1308 static unsigned int | |
1309 rest_of_handle_lower_subreg (void) | |
1310 { | |
1311 decompose_multiword_subregs (); | |
1312 return 0; | |
1313 } | |
1314 | |
1315 /* Implement second lower subreg pass. */ | |
1316 | |
1317 static unsigned int | |
1318 rest_of_handle_lower_subreg2 (void) | |
1319 { | |
1320 decompose_multiword_subregs (); | |
1321 return 0; | |
1322 } | |
1323 | |
1324 struct rtl_opt_pass pass_lower_subreg = | |
1325 { | |
1326 { | |
1327 RTL_PASS, | |
1328 "subreg1", /* name */ | |
1329 gate_handle_lower_subreg, /* gate */ | |
1330 rest_of_handle_lower_subreg, /* execute */ | |
1331 NULL, /* sub */ | |
1332 NULL, /* next */ | |
1333 0, /* static_pass_number */ | |
1334 TV_LOWER_SUBREG, /* tv_id */ | |
1335 0, /* properties_required */ | |
1336 0, /* properties_provided */ | |
1337 0, /* properties_destroyed */ | |
1338 0, /* todo_flags_start */ | |
1339 TODO_dump_func | | |
1340 TODO_ggc_collect | | |
1341 TODO_verify_flow /* todo_flags_finish */ | |
1342 } | |
1343 }; | |
1344 | |
1345 struct rtl_opt_pass pass_lower_subreg2 = | |
1346 { | |
1347 { | |
1348 RTL_PASS, | |
1349 "subreg2", /* name */ | |
1350 gate_handle_lower_subreg, /* gate */ | |
1351 rest_of_handle_lower_subreg2, /* execute */ | |
1352 NULL, /* sub */ | |
1353 NULL, /* next */ | |
1354 0, /* static_pass_number */ | |
1355 TV_LOWER_SUBREG, /* tv_id */ | |
1356 0, /* properties_required */ | |
1357 0, /* properties_provided */ | |
1358 0, /* properties_destroyed */ | |
1359 0, /* todo_flags_start */ | |
1360 TODO_df_finish | TODO_verify_rtl_sharing | | |
1361 TODO_dump_func | | |
1362 TODO_ggc_collect | | |
1363 TODO_verify_flow /* todo_flags_finish */ | |
1364 } | |
1365 }; |