Mercurial > hg > CbC > CbC_gcc
comparison gcc/regs.h @ 0:a06113de4d67
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author | kent <kent@cr.ie.u-ryukyu.ac.jp> |
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date | Fri, 17 Jul 2009 14:47:48 +0900 |
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children | 77e2b8dfacca |
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1 /* Define per-register tables for data flow info and register allocation. | |
2 Copyright (C) 1987, 1993, 1994, 1995, 1996, 1997, 1998, | |
3 1999, 2000, 2003, 2004, 2005, 2006, 2007, 2008 Free Software | |
4 Foundation, Inc. | |
5 | |
6 This file is part of GCC. | |
7 | |
8 GCC is free software; you can redistribute it and/or modify it under | |
9 the terms of the GNU General Public License as published by the Free | |
10 Software Foundation; either version 3, or (at your option) any later | |
11 version. | |
12 | |
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 for more details. | |
17 | |
18 You should have received a copy of the GNU General Public License | |
19 along with GCC; see the file COPYING3. If not see | |
20 <http://www.gnu.org/licenses/>. */ | |
21 | |
22 #ifndef GCC_REGS_H | |
23 #define GCC_REGS_H | |
24 | |
25 #include "varray.h" | |
26 #include "obstack.h" | |
27 #include "hard-reg-set.h" | |
28 #include "basic-block.h" | |
29 | |
30 #define REG_BYTES(R) mode_size[(int) GET_MODE (R)] | |
31 | |
32 /* When you only have the mode of a pseudo register before it has a hard | |
33 register chosen for it, this reports the size of each hard register | |
34 a pseudo in such a mode would get allocated to. A target may | |
35 override this. */ | |
36 | |
37 #ifndef REGMODE_NATURAL_SIZE | |
38 #define REGMODE_NATURAL_SIZE(MODE) UNITS_PER_WORD | |
39 #endif | |
40 | |
41 #ifndef SMALL_REGISTER_CLASSES | |
42 #define SMALL_REGISTER_CLASSES 0 | |
43 #endif | |
44 | |
45 /* Maximum register number used in this function, plus one. */ | |
46 | |
47 extern int max_regno; | |
48 | |
49 /* REG_N_REFS and REG_N_SETS are initialized by a call to | |
50 regstat_init_n_sets_and_refs from the current values of | |
51 DF_REG_DEF_COUNT and DF_REG_USE_COUNT. REG_N_REFS and REG_N_SETS | |
52 should only be used if a pass need to change these values in some | |
53 magical way or or the pass needs to have accurate values for these | |
54 and is not using incremental df scanning. | |
55 | |
56 At the end of a pass that uses REG_N_REFS and REG_N_SETS, a call | |
57 should be made to regstat_free_n_sets_and_refs. | |
58 | |
59 Local alloc seems to play pretty loose with these values. | |
60 REG_N_REFS is set to 0 if the register is used in an asm. | |
61 Furthermore, local_alloc calls regclass to hack both REG_N_REFS and | |
62 REG_N_SETS for three address insns. Other passes seem to have | |
63 other special values. */ | |
64 | |
65 | |
66 | |
67 /* Structure to hold values for REG_N_SETS (i) and REG_N_REFS (i). */ | |
68 | |
69 struct regstat_n_sets_and_refs_t | |
70 { | |
71 int sets; /* # of times (REG n) is set */ | |
72 int refs; /* # of times (REG n) is used or set */ | |
73 }; | |
74 | |
75 extern struct regstat_n_sets_and_refs_t *regstat_n_sets_and_refs; | |
76 | |
77 /* Indexed by n, gives number of times (REG n) is used or set. */ | |
78 static inline int | |
79 REG_N_REFS(int regno) | |
80 { | |
81 return regstat_n_sets_and_refs[regno].refs; | |
82 } | |
83 | |
84 /* Indexed by n, gives number of times (REG n) is used or set. */ | |
85 #define SET_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs = V) | |
86 #define INC_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs += V) | |
87 | |
88 /* Indexed by n, gives number of times (REG n) is set. */ | |
89 static inline int | |
90 REG_N_SETS (int regno) | |
91 { | |
92 return regstat_n_sets_and_refs[regno].sets; | |
93 } | |
94 | |
95 /* Indexed by n, gives number of times (REG n) is set. */ | |
96 #define SET_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets = V) | |
97 #define INC_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets += V) | |
98 | |
99 | |
100 /* Functions defined in reg-stat.c. */ | |
101 extern void regstat_init_n_sets_and_refs (void); | |
102 extern void regstat_free_n_sets_and_refs (void); | |
103 extern void regstat_compute_ri (void); | |
104 extern void regstat_free_ri (void); | |
105 extern bitmap regstat_get_setjmp_crosses (void); | |
106 extern void regstat_compute_calls_crossed (void); | |
107 extern void regstat_free_calls_crossed (void); | |
108 | |
109 | |
110 /* Register information indexed by register number. This structure is | |
111 initialized by calling regstat_compute_ri and is destroyed by | |
112 calling regstat_free_ri. */ | |
113 struct reg_info_t | |
114 { | |
115 int freq; /* # estimated frequency (REG n) is used or set */ | |
116 int deaths; /* # of times (REG n) dies */ | |
117 int live_length; /* # of instructions (REG n) is live */ | |
118 int calls_crossed; /* # of calls (REG n) is live across */ | |
119 int freq_calls_crossed; /* # estimated frequency (REG n) crosses call */ | |
120 int throw_calls_crossed; /* # of calls that may throw (REG n) is live across */ | |
121 int basic_block; /* # of basic blocks (REG n) is used in */ | |
122 }; | |
123 | |
124 extern struct reg_info_t *reg_info_p; | |
125 | |
126 /* The number allocated elements of reg_info_p. */ | |
127 extern size_t reg_info_p_size; | |
128 | |
129 /* Estimate frequency of references to register N. */ | |
130 | |
131 #define REG_FREQ(N) (reg_info_p[N].freq) | |
132 | |
133 /* The weights for each insn varies from 0 to REG_FREQ_BASE. | |
134 This constant does not need to be high, as in infrequently executed | |
135 regions we want to count instructions equivalently to optimize for | |
136 size instead of speed. */ | |
137 #define REG_FREQ_MAX 1000 | |
138 | |
139 /* Compute register frequency from the BB frequency. When optimizing for size, | |
140 or profile driven feedback is available and the function is never executed, | |
141 frequency is always equivalent. Otherwise rescale the basic block | |
142 frequency. */ | |
143 #define REG_FREQ_FROM_BB(bb) (optimize_size \ | |
144 || (flag_branch_probabilities \ | |
145 && !ENTRY_BLOCK_PTR->count) \ | |
146 ? REG_FREQ_MAX \ | |
147 : ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\ | |
148 ? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\ | |
149 : 1) | |
150 | |
151 /* Indexed by N, gives number of insns in which register N dies. | |
152 Note that if register N is live around loops, it can die | |
153 in transitions between basic blocks, and that is not counted here. | |
154 So this is only a reliable indicator of how many regions of life there are | |
155 for registers that are contained in one basic block. */ | |
156 | |
157 #define REG_N_DEATHS(N) (reg_info_p[N].deaths) | |
158 | |
159 /* Get the number of consecutive words required to hold pseudo-reg N. */ | |
160 | |
161 #define PSEUDO_REGNO_SIZE(N) \ | |
162 ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1) \ | |
163 / UNITS_PER_WORD) | |
164 | |
165 /* Get the number of bytes required to hold pseudo-reg N. */ | |
166 | |
167 #define PSEUDO_REGNO_BYTES(N) \ | |
168 GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) | |
169 | |
170 /* Get the machine mode of pseudo-reg N. */ | |
171 | |
172 #define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N]) | |
173 | |
174 /* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */ | |
175 | |
176 #define REG_N_CALLS_CROSSED(N) (reg_info_p[N].calls_crossed) | |
177 #define REG_FREQ_CALLS_CROSSED(N) (reg_info_p[N].freq_calls_crossed) | |
178 | |
179 /* Indexed by N, gives number of CALL_INSNS that may throw, across which | |
180 (REG n) is live. */ | |
181 | |
182 #define REG_N_THROWING_CALLS_CROSSED(N) (reg_info_p[N].throw_calls_crossed) | |
183 | |
184 /* Total number of instructions at which (REG n) is live. The larger | |
185 this is, the less priority (REG n) gets for allocation in a hard | |
186 register (in global-alloc). This is set in df-problems.c whenever | |
187 register info is requested and remains valid for the rest of the | |
188 compilation of the function; it is used to control register | |
189 allocation. | |
190 | |
191 local-alloc.c may alter this number to change the priority. | |
192 | |
193 Negative values are special. | |
194 -1 is used to mark a pseudo reg which has a constant or memory equivalent | |
195 and is used infrequently enough that it should not get a hard register. | |
196 -2 is used to mark a pseudo reg for a parameter, when a frame pointer | |
197 is not required. global.c makes an allocno for this but does | |
198 not try to assign a hard register to it. */ | |
199 | |
200 #define REG_LIVE_LENGTH(N) (reg_info_p[N].live_length) | |
201 | |
202 /* Indexed by n, gives number of basic block that (REG n) is used in. | |
203 If the value is REG_BLOCK_GLOBAL (-1), | |
204 it means (REG n) is used in more than one basic block. | |
205 REG_BLOCK_UNKNOWN (0) means it hasn't been seen yet so we don't know. | |
206 This information remains valid for the rest of the compilation | |
207 of the current function; it is used to control register allocation. */ | |
208 | |
209 #define REG_BLOCK_UNKNOWN 0 | |
210 #define REG_BLOCK_GLOBAL -1 | |
211 | |
212 #define REG_BASIC_BLOCK(N) (reg_info_p[N].basic_block) | |
213 | |
214 /* Vector of substitutions of register numbers, | |
215 used to map pseudo regs into hardware regs. | |
216 | |
217 This can't be folded into reg_n_info without changing all of the | |
218 machine dependent directories, since the reload functions | |
219 in the machine dependent files access it. */ | |
220 | |
221 extern short *reg_renumber; | |
222 | |
223 /* Vector indexed by machine mode saying whether there are regs of that mode. */ | |
224 | |
225 extern bool have_regs_of_mode [MAX_MACHINE_MODE]; | |
226 | |
227 /* For each hard register, the widest mode object that it can contain. | |
228 This will be a MODE_INT mode if the register can hold integers. Otherwise | |
229 it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the | |
230 register. */ | |
231 | |
232 extern enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER]; | |
233 | |
234 /* Flag set by local-alloc or global-alloc if they decide to allocate | |
235 something in a call-clobbered register. */ | |
236 | |
237 extern int caller_save_needed; | |
238 | |
239 /* Predicate to decide whether to give a hard reg to a pseudo which | |
240 is referenced REFS times and would need to be saved and restored | |
241 around a call CALLS times. */ | |
242 | |
243 #ifndef CALLER_SAVE_PROFITABLE | |
244 #define CALLER_SAVE_PROFITABLE(REFS, CALLS) (4 * (CALLS) < (REFS)) | |
245 #endif | |
246 | |
247 /* On most machines a register class is likely to be spilled if it | |
248 only has one register. */ | |
249 #ifndef CLASS_LIKELY_SPILLED_P | |
250 #define CLASS_LIKELY_SPILLED_P(CLASS) (reg_class_size[(int) (CLASS)] == 1) | |
251 #endif | |
252 | |
253 /* Select a register mode required for caller save of hard regno REGNO. */ | |
254 #ifndef HARD_REGNO_CALLER_SAVE_MODE | |
255 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \ | |
256 choose_hard_reg_mode (REGNO, NREGS, false) | |
257 #endif | |
258 | |
259 /* Registers that get partially clobbered by a call in a given mode. | |
260 These must not be call used registers. */ | |
261 #ifndef HARD_REGNO_CALL_PART_CLOBBERED | |
262 #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0 | |
263 #endif | |
264 | |
265 /* 1 if the corresponding class does contain register of given | |
266 mode. */ | |
267 extern char contains_reg_of_mode [N_REG_CLASSES] [MAX_MACHINE_MODE]; | |
268 | |
269 typedef unsigned short move_table[N_REG_CLASSES]; | |
270 | |
271 /* Maximum cost of moving from a register in one class to a register | |
272 in another class. */ | |
273 extern move_table *move_cost[MAX_MACHINE_MODE]; | |
274 | |
275 /* Specify number of hard registers given machine mode occupy. */ | |
276 extern unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE]; | |
277 | |
278 /* Similar, but here we don't have to move if the first index is a | |
279 subset of the second so in that case the cost is zero. */ | |
280 extern move_table *may_move_in_cost[MAX_MACHINE_MODE]; | |
281 | |
282 /* Similar, but here we don't have to move if the first index is a | |
283 superset of the second so in that case the cost is zero. */ | |
284 extern move_table *may_move_out_cost[MAX_MACHINE_MODE]; | |
285 | |
286 /* Return an exclusive upper bound on the registers occupied by hard | |
287 register (reg:MODE REGNO). */ | |
288 | |
289 static inline unsigned int | |
290 end_hard_regno (enum machine_mode mode, unsigned int regno) | |
291 { | |
292 return regno + hard_regno_nregs[regno][(int) mode]; | |
293 } | |
294 | |
295 /* Likewise for hard register X. */ | |
296 | |
297 #define END_HARD_REGNO(X) end_hard_regno (GET_MODE (X), REGNO (X)) | |
298 | |
299 /* Likewise for hard or pseudo register X. */ | |
300 | |
301 #define END_REGNO(X) (HARD_REGISTER_P (X) ? END_HARD_REGNO (X) : REGNO (X) + 1) | |
302 | |
303 /* Add to REGS all the registers required to store a value of mode MODE | |
304 in register REGNO. */ | |
305 | |
306 static inline void | |
307 add_to_hard_reg_set (HARD_REG_SET *regs, enum machine_mode mode, | |
308 unsigned int regno) | |
309 { | |
310 unsigned int end_regno; | |
311 | |
312 end_regno = end_hard_regno (mode, regno); | |
313 do | |
314 SET_HARD_REG_BIT (*regs, regno); | |
315 while (++regno < end_regno); | |
316 } | |
317 | |
318 /* Likewise, but remove the registers. */ | |
319 | |
320 static inline void | |
321 remove_from_hard_reg_set (HARD_REG_SET *regs, enum machine_mode mode, | |
322 unsigned int regno) | |
323 { | |
324 unsigned int end_regno; | |
325 | |
326 end_regno = end_hard_regno (mode, regno); | |
327 do | |
328 CLEAR_HARD_REG_BIT (*regs, regno); | |
329 while (++regno < end_regno); | |
330 } | |
331 | |
332 /* Return true if REGS contains the whole of (reg:MODE REGNO). */ | |
333 | |
334 static inline bool | |
335 in_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode, | |
336 unsigned int regno) | |
337 { | |
338 unsigned int end_regno; | |
339 | |
340 if (!TEST_HARD_REG_BIT (regs, regno)) | |
341 return false; | |
342 | |
343 end_regno = end_hard_regno (mode, regno); | |
344 while (++regno < end_regno) | |
345 if (!TEST_HARD_REG_BIT (regs, regno)) | |
346 return false; | |
347 | |
348 return true; | |
349 } | |
350 | |
351 /* Return true if (reg:MODE REGNO) includes an element of REGS. */ | |
352 | |
353 static inline bool | |
354 overlaps_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode, | |
355 unsigned int regno) | |
356 { | |
357 unsigned int end_regno; | |
358 | |
359 if (TEST_HARD_REG_BIT (regs, regno)) | |
360 return true; | |
361 | |
362 end_regno = end_hard_regno (mode, regno); | |
363 while (++regno < end_regno) | |
364 if (TEST_HARD_REG_BIT (regs, regno)) | |
365 return true; | |
366 | |
367 return false; | |
368 } | |
369 | |
370 #endif /* GCC_REGS_H */ |