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comparison gcc/config/arm/arm.h @ 63:b7f97abdc517 gcc-4.6-20100522

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update gcc from gcc-4.5.0 to gcc-4.6
author ryoma <e075725@ie.u-ryukyu.ac.jp>
date Mon, 24 May 2010 12:47:05 +0900
parents 77e2b8dfacca
children f6334be47118
comparison
equal deleted inserted replaced
56:3c8a44c06a95 63:b7f97abdc517
769 for (regno = FIRST_FPA_REGNUM; \ 769 for (regno = FIRST_FPA_REGNUM; \
770 regno <= LAST_FPA_REGNUM; ++regno) \ 770 regno <= LAST_FPA_REGNUM; ++regno) \
771 fixed_regs[regno] = call_used_regs[regno] = 1; \ 771 fixed_regs[regno] = call_used_regs[regno] = 1; \
772 } \ 772 } \
773 \ 773 \
774 if (TARGET_THUMB && optimize_size) \ 774 if (TARGET_THUMB1 && optimize_size) \
775 { \ 775 { \
776 /* When optimizing for size, it's better not to use \ 776 /* When optimizing for size on Thumb-1, it's better not \
777 the HI regs, because of the overhead of stacking \ 777 to use the HI regs, because of the overhead of \
778 them. */ \ 778 stacking them. */ \
779 /* ??? Is this still true for thumb2? */ \
780 for (regno = FIRST_HI_REGNUM; \ 779 for (regno = FIRST_HI_REGNUM; \
781 regno <= LAST_HI_REGNUM; ++regno) \ 780 regno <= LAST_HI_REGNUM; ++regno) \
782 fixed_regs[regno] = call_used_regs[regno] = 1; \ 781 fixed_regs[regno] = call_used_regs[regno] = 1; \
783 } \ 782 } \
784 \ 783 \
1120 87, 88, 89, 90, 91, 92, 93, 94, \ 1119 87, 88, 89, 90, 91, 92, 93, 94, \
1121 127 \ 1120 127 \
1122 } 1121 }
1123 1122
1124 /* Use different register alloc ordering for Thumb. */ 1123 /* Use different register alloc ordering for Thumb. */
1125 #define ORDER_REGS_FOR_LOCAL_ALLOC arm_order_regs_for_local_alloc () 1124 #define ADJUST_REG_ALLOC_ORDER arm_order_regs_for_local_alloc ()
1125
1126 /* Tell IRA to use the order we define rather than messing it up with its
1127 own cost calculations. */
1128 #define HONOR_REG_ALLOC_ORDER
1126 1129
1127 /* Interrupt functions can only use registers that have already been 1130 /* Interrupt functions can only use registers that have already been
1128 saved by the prologue, even if they would normally be 1131 saved by the prologue, even if they would normally be
1129 call-clobbered. */ 1132 call-clobbered. */
1130 #define HARD_REGNO_RENAME_OK(SRC, DST) \ 1133 #define HARD_REGNO_RENAME_OK(SRC, DST) \
1262 1265
1263 /* For Thumb we can not support SP+reg addressing, so we return LO_REGS 1266 /* For Thumb we can not support SP+reg addressing, so we return LO_REGS
1264 instead of BASE_REGS. */ 1267 instead of BASE_REGS. */
1265 #define MODE_BASE_REG_REG_CLASS(MODE) BASE_REG_CLASS 1268 #define MODE_BASE_REG_REG_CLASS(MODE) BASE_REG_CLASS
1266 1269
1267 /* When SMALL_REGISTER_CLASSES is nonzero, the compiler allows 1270 /* When this hook returns true for MODE, the compiler allows
1268 registers explicitly used in the rtl to be used as spill registers 1271 registers explicitly used in the rtl to be used as spill registers
1269 but prevents the compiler from extending the lifetime of these 1272 but prevents the compiler from extending the lifetime of these
1270 registers. */ 1273 registers. */
1271 #define SMALL_REGISTER_CLASSES TARGET_THUMB1 1274 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P \
1275 arm_small_register_classes_for_mode_p
1272 1276
1273 /* Given an rtx X being reloaded into a reg required to be 1277 /* Given an rtx X being reloaded into a reg required to be
1274 in class CLASS, return the class of reg to actually use. 1278 in class CLASS, return the class of reg to actually use.
1275 In general this is just CLASS, but for the Thumb core registers and 1279 In general this is just CLASS, but for the Thumb core registers and
1276 immediate constants we prefer a LO_REGS class or a subset. */ 1280 immediate constants we prefer a LO_REGS class or a subset. */
1808 1812
1809 #define EPILOGUE_USES(REGNO) ((REGNO) == LR_REGNUM) 1813 #define EPILOGUE_USES(REGNO) ((REGNO) == LR_REGNUM)
1810 1814
1811 /* Determine if the epilogue should be output as RTL. 1815 /* Determine if the epilogue should be output as RTL.
1812 You should override this if you define FUNCTION_EXTRA_EPILOGUE. */ 1816 You should override this if you define FUNCTION_EXTRA_EPILOGUE. */
1813 /* This is disabled for Thumb-2 because it will confuse the
1814 conditional insn counter. */
1815 #define USE_RETURN_INSN(ISCOND) \ 1817 #define USE_RETURN_INSN(ISCOND) \
1816 (TARGET_ARM ? use_return_insn (ISCOND, NULL) : 0) 1818 (TARGET_32BIT ? use_return_insn (ISCOND, NULL) : 0)
1817 1819
1818 /* Definitions for register eliminations. 1820 /* Definitions for register eliminations.
1819 1821
1820 This is an array of structures. Each structure initializes one pair 1822 This is an array of structures. Each structure initializes one pair
1821 of eliminable registers. The "from" register number is given first, 1823 of eliminable registers. The "from" register number is given first,
2763 /* Do not emit .note.GNU-stack by default. */ 2765 /* Do not emit .note.GNU-stack by default. */
2764 #ifndef NEED_INDICATE_EXEC_STACK 2766 #ifndef NEED_INDICATE_EXEC_STACK
2765 #define NEED_INDICATE_EXEC_STACK 0 2767 #define NEED_INDICATE_EXEC_STACK 0
2766 #endif 2768 #endif
2767 2769
2770 /* The maximum number of parallel loads or stores we support in an ldm/stm
2771 instruction. */
2772 #define MAX_LDM_STM_OPS 4
2773
2768 #endif /* ! GCC_ARM_H */ 2774 #endif /* ! GCC_ARM_H */