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comparison gcc/config/arm/vfp.md @ 63:b7f97abdc517 gcc-4.6-20100522

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update gcc from gcc-4.5.0 to gcc-4.6
author ryoma <e075725@ie.u-ryukyu.ac.jp>
date Mon, 24 May 2010 12:47:05 +0900
parents 77e2b8dfacca
children f6334be47118
comparison
equal deleted inserted replaced
56:3c8a44c06a95 63:b7f97abdc517
84 (set_attr "type" "*,*,*,*,load1,store1,r_2_f,f_2_r,fcpys,f_loads,f_stores") 84 (set_attr "type" "*,*,*,*,load1,store1,r_2_f,f_2_r,fcpys,f_loads,f_stores")
85 (set_attr "pool_range" "*,*,*,*,4096,*,*,*,*,1020,*") 85 (set_attr "pool_range" "*,*,*,*,4096,*,*,*,*,1020,*")
86 (set_attr "neg_pool_range" "*,*,*,*,4084,*,*,*,*,1008,*")] 86 (set_attr "neg_pool_range" "*,*,*,*,4084,*,*,*,*,1008,*")]
87 ) 87 )
88 88
89 ;; See thumb2.md:thumb2_movsi_insn for an explanation of the split
90 ;; high/low register alternatives for loads and stores here.
89 (define_insn "*thumb2_movsi_vfp" 91 (define_insn "*thumb2_movsi_vfp"
90 [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,r,r,rk,m,*t,r, *t,*t, *Uv") 92 [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,r,r, l,*hk,m, *m,*t, r,*t,*t, *Uv")
91 (match_operand:SI 1 "general_operand" "rk, I,K,j,mi,rk,r,*t,*t,*Uvi,*t"))] 93 (match_operand:SI 1 "general_operand" "rk, I,K,j,mi,*mi,l,*hk, r,*t,*t,*Uvi,*t"))]
92 "TARGET_THUMB2 && TARGET_VFP && TARGET_HARD_FLOAT 94 "TARGET_THUMB2 && TARGET_VFP && TARGET_HARD_FLOAT
93 && ( s_register_operand (operands[0], SImode) 95 && ( s_register_operand (operands[0], SImode)
94 || s_register_operand (operands[1], SImode))" 96 || s_register_operand (operands[1], SImode))"
95 "* 97 "*
96 switch (which_alternative) 98 switch (which_alternative)
100 case 2: 102 case 2:
101 return \"mvn%?\\t%0, #%B1\"; 103 return \"mvn%?\\t%0, #%B1\";
102 case 3: 104 case 3:
103 return \"movw%?\\t%0, %1\"; 105 return \"movw%?\\t%0, %1\";
104 case 4: 106 case 4:
107 case 5:
105 return \"ldr%?\\t%0, %1\"; 108 return \"ldr%?\\t%0, %1\";
106 case 5: 109 case 6:
110 case 7:
107 return \"str%?\\t%1, %0\"; 111 return \"str%?\\t%1, %0\";
108 case 6: 112 case 8:
109 return \"fmsr%?\\t%0, %1\\t%@ int\"; 113 return \"fmsr%?\\t%0, %1\\t%@ int\";
110 case 7: 114 case 9:
111 return \"fmrs%?\\t%0, %1\\t%@ int\"; 115 return \"fmrs%?\\t%0, %1\\t%@ int\";
112 case 8: 116 case 10:
113 return \"fcpys%?\\t%0, %1\\t%@ int\"; 117 return \"fcpys%?\\t%0, %1\\t%@ int\";
114 case 9: case 10: 118 case 11: case 12:
115 return output_move_vfp (operands); 119 return output_move_vfp (operands);
116 default: 120 default:
117 gcc_unreachable (); 121 gcc_unreachable ();
118 } 122 }
119 " 123 "
120 [(set_attr "predicable" "yes") 124 [(set_attr "predicable" "yes")
121 (set_attr "type" "*,*,*,*,load1,store1,r_2_f,f_2_r,fcpys,f_load,f_store") 125 (set_attr "type" "*,*,*,*,load1,load1,store1,store1,r_2_f,f_2_r,fcpys,f_load,f_store")
122 (set_attr "pool_range" "*,*,*,*,4096,*,*,*,*,1020,*") 126 (set_attr "pool_range" "*,*,*,*,1020,4096,*,*,*,*,*,1020,*")
123 (set_attr "neg_pool_range" "*,*,*,*, 0,*,*,*,*,1008,*")] 127 (set_attr "neg_pool_range" "*,*,*,*, 0, 0,*,*,*,*,*,1008,*")]
124 ) 128 )
125 129
126 130
127 ;; DImode moves 131 ;; DImode moves
128 132