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comparison gcc/config/mips/mips-dsp.md @ 63:b7f97abdc517 gcc-4.6-20100522

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update gcc from gcc-4.5.0 to gcc-4.6
author ryoma <e075725@ie.u-ryukyu.ac.jp>
date Mon, 24 May 2010 12:47:05 +0900
parents 77e2b8dfacca
children f6334be47118
comparison
equal deleted inserted replaced
56:3c8a44c06a95 63:b7f97abdc517
1 ;; Copyright (C) 2005, 2006, 2007, 2008 Free Software Foundation, Inc. 1 ;; Copyright (C) 2005, 2006, 2007, 2008, 2010 Free Software Foundation, Inc.
2 ;; 2 ;;
3 ;; This file is part of GCC. 3 ;; This file is part of GCC.
4 ;; 4 ;;
5 ;; GCC is free software; you can redistribute it and/or modify 5 ;; GCC is free software; you can redistribute it and/or modify
6 ;; it under the terms of the GNU General Public License as published by 6 ;; it under the terms of the GNU General Public License as published by
58 [(set (match_operand:DSPV 0 "register_operand" "=d") 58 [(set (match_operand:DSPV 0 "register_operand" "=d")
59 (plus:DSPV (match_operand:DSPV 1 "register_operand" "d") 59 (plus:DSPV (match_operand:DSPV 1 "register_operand" "d")
60 (match_operand:DSPV 2 "register_operand" "d"))) 60 (match_operand:DSPV 2 "register_operand" "d")))
61 (set (reg:CCDSP CCDSP_OU_REGNUM) 61 (set (reg:CCDSP CCDSP_OU_REGNUM)
62 (unspec:CCDSP [(match_dup 1) (match_dup 2)] UNSPEC_ADDQ))])] 62 (unspec:CCDSP [(match_dup 1) (match_dup 2)] UNSPEC_ADDQ))])]
63 "" 63 "ISA_HAS_DSP"
64 "add<DSPV:dspfmt1>.<DSPV:dspfmt2>\t%0,%1,%2" 64 "add<DSPV:dspfmt1>.<DSPV:dspfmt2>\t%0,%1,%2"
65 [(set_attr "type" "arith") 65 [(set_attr "type" "arith")
66 (set_attr "mode" "SI")]) 66 (set_attr "mode" "SI")])
67 67
68 (define_insn "mips_add<DSP:dspfmt1>_s_<DSP:dspfmt2>" 68 (define_insn "mips_add<DSP:dspfmt1>_s_<DSP:dspfmt2>"
71 (unspec:DSP [(match_operand:DSP 1 "register_operand" "d") 71 (unspec:DSP [(match_operand:DSP 1 "register_operand" "d")
72 (match_operand:DSP 2 "register_operand" "d")] 72 (match_operand:DSP 2 "register_operand" "d")]
73 UNSPEC_ADDQ_S)) 73 UNSPEC_ADDQ_S))
74 (set (reg:CCDSP CCDSP_OU_REGNUM) 74 (set (reg:CCDSP CCDSP_OU_REGNUM)
75 (unspec:CCDSP [(match_dup 1) (match_dup 2)] UNSPEC_ADDQ_S))])] 75 (unspec:CCDSP [(match_dup 1) (match_dup 2)] UNSPEC_ADDQ_S))])]
76 "" 76 "ISA_HAS_DSP"
77 "add<DSP:dspfmt1>_s.<DSP:dspfmt2>\t%0,%1,%2" 77 "add<DSP:dspfmt1>_s.<DSP:dspfmt2>\t%0,%1,%2"
78 [(set_attr "type" "arith") 78 [(set_attr "type" "arith")
79 (set_attr "mode" "SI")]) 79 (set_attr "mode" "SI")])
80 80
81 ;; SUBQ* 81 ;; SUBQ*