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comparison gcc/reload.c @ 132:d34655255c78

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update gcc-8.2
author mir3636
date Thu, 25 Oct 2018 10:21:07 +0900
parents 84e7813d76e9
children 1830386684a0
comparison
equal deleted inserted replaced
130:e108057fa461 132:d34655255c78
1 /* Search an insn for pseudo regs that must be in hard regs and are not. 1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987-2017 Free Software Foundation, Inc. 2 Copyright (C) 1987-2018 Free Software Foundation, Inc.
3 3
4 This file is part of GCC. 4 This file is part of GCC.
5 5
6 GCC is free software; you can redistribute it and/or modify it under 6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free 7 the terms of the GNU General Public License as published by the Free
166 struct decomposition 166 struct decomposition
167 { 167 {
168 int reg_flag; /* Nonzero if referencing a register. */ 168 int reg_flag; /* Nonzero if referencing a register. */
169 int safe; /* Nonzero if this can't conflict with anything. */ 169 int safe; /* Nonzero if this can't conflict with anything. */
170 rtx base; /* Base address for MEM. */ 170 rtx base; /* Base address for MEM. */
171 HOST_WIDE_INT start; /* Starting offset or register number. */ 171 poly_int64_pod start; /* Starting offset or register number. */
172 HOST_WIDE_INT end; /* Ending offset or register number. */ 172 poly_int64_pod end; /* Ending offset or register number. */
173 }; 173 };
174 174
175 /* Save MEMs needed to copy from one class of registers to another. One MEM 175 /* Save MEMs needed to copy from one class of registers to another. One MEM
176 is used per mode, but normally only one or two modes are ever used. 176 is used per mode, but normally only one or two modes are ever used.
177 177
276 machine_mode, int, 276 machine_mode, int,
277 enum reload_type, int); 277 enum reload_type, int);
278 static rtx find_reloads_subreg_address (rtx, int, enum reload_type, 278 static rtx find_reloads_subreg_address (rtx, int, enum reload_type,
279 int, rtx_insn *, int *); 279 int, rtx_insn *, int *);
280 static void copy_replacements_1 (rtx *, rtx *, int); 280 static void copy_replacements_1 (rtx *, rtx *, int);
281 static int find_inc_amount (rtx, rtx); 281 static poly_int64 find_inc_amount (rtx, rtx);
282 static int refers_to_mem_for_reload_p (rtx); 282 static int refers_to_mem_for_reload_p (rtx);
283 static int refers_to_regno_for_reload_p (unsigned int, unsigned int, 283 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
284 rtx, rtx *); 284 rtx, rtx *);
285 285
286 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the 286 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
809 return i; 809 return i;
810 } 810 }
811 return n_reloads; 811 return n_reloads;
812 } 812 }
813 813
814 /* Return true if:
815
816 (a) (subreg:OUTER_MODE REG ...) represents a word or subword subreg
817 of a multiword value; and
818
819 (b) the number of *words* in REG does not match the number of *registers*
820 in REG. */
821
822 static bool
823 complex_word_subreg_p (machine_mode outer_mode, rtx reg)
824 {
825 machine_mode inner_mode = GET_MODE (reg);
826 poly_uint64 reg_words = REG_NREGS (reg) * UNITS_PER_WORD;
827 return (known_le (GET_MODE_SIZE (outer_mode), UNITS_PER_WORD)
828 && maybe_gt (GET_MODE_SIZE (inner_mode), UNITS_PER_WORD)
829 && !known_equal_after_align_up (GET_MODE_SIZE (inner_mode),
830 reg_words, UNITS_PER_WORD));
831 }
832
814 /* Return true if X is a SUBREG that will need reloading of its SUBREG_REG 833 /* Return true if X is a SUBREG that will need reloading of its SUBREG_REG
815 expression. MODE is the mode that X will be used in. OUTPUT is true if 834 expression. MODE is the mode that X will be used in. OUTPUT is true if
816 the function is invoked for the output part of an enclosing reload. */ 835 the function is invoked for the output part of an enclosing reload. */
817 836
818 static bool 837 static bool
840 859
841 /* If this is for an output, and the outer part is a word or smaller, 860 /* If this is for an output, and the outer part is a word or smaller,
842 INNER is larger than a word and the number of registers in INNER is 861 INNER is larger than a word and the number of registers in INNER is
843 not the same as the number of words in INNER, then INNER will need 862 not the same as the number of words in INNER, then INNER will need
844 reloading (with an in-out reload). */ 863 reloading (with an in-out reload). */
845 return (output 864 return output && complex_word_subreg_p (mode, inner);
846 && GET_MODE_SIZE (mode) <= UNITS_PER_WORD
847 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
848 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
849 != REG_NREGS (inner)));
850 } 865 }
851 866
852 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without 867 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
853 requiring an extra reload register. The caller has already found that 868 requiring an extra reload register. The caller has already found that
854 IN contains some reference to REGNO, so check that we can produce the 869 IN contains some reference to REGNO, so check that we can produce the
1046 || strict_low 1061 || strict_low
1047 || (((REG_P (SUBREG_REG (in)) 1062 || (((REG_P (SUBREG_REG (in))
1048 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER) 1063 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1049 || MEM_P (SUBREG_REG (in))) 1064 || MEM_P (SUBREG_REG (in)))
1050 && (paradoxical_subreg_p (inmode, GET_MODE (SUBREG_REG (in))) 1065 && (paradoxical_subreg_p (inmode, GET_MODE (SUBREG_REG (in)))
1051 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD 1066 || (known_le (GET_MODE_SIZE (inmode), UNITS_PER_WORD)
1052 && is_a <scalar_int_mode> (GET_MODE (SUBREG_REG (in)), 1067 && is_a <scalar_int_mode> (GET_MODE (SUBREG_REG (in)),
1053 &inner_mode) 1068 &inner_mode)
1054 && GET_MODE_SIZE (inner_mode) <= UNITS_PER_WORD 1069 && GET_MODE_SIZE (inner_mode) <= UNITS_PER_WORD
1055 && paradoxical_subreg_p (inmode, inner_mode) 1070 && paradoxical_subreg_p (inmode, inner_mode)
1056 && LOAD_EXTEND_OP (inner_mode) != UNKNOWN) 1071 && LOAD_EXTEND_OP (inner_mode) != UNKNOWN)
1057 || (WORD_REGISTER_OPERATIONS 1072 || (WORD_REGISTER_OPERATIONS
1058 && partial_subreg_p (inmode, GET_MODE (SUBREG_REG (in))) 1073 && partial_subreg_p (inmode, GET_MODE (SUBREG_REG (in)))
1059 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD == 1074 && (known_equal_after_align_down
1060 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1) 1075 (GET_MODE_SIZE (inmode) - 1,
1061 / UNITS_PER_WORD))))) 1076 GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1,
1077 UNITS_PER_WORD)))))
1062 || (REG_P (SUBREG_REG (in)) 1078 || (REG_P (SUBREG_REG (in))
1063 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1079 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1064 /* The case where out is nonzero 1080 /* The case where out is nonzero
1065 is handled differently in the following statement. */ 1081 is handled differently in the following statement. */
1066 && (out == 0 || subreg_lowpart_p (in)) 1082 && (out == 0 || subreg_lowpart_p (in))
1067 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD 1083 && (complex_word_subreg_p (inmode, SUBREG_REG (in))
1068 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1069 > UNITS_PER_WORD)
1070 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1071 / UNITS_PER_WORD)
1072 != REG_NREGS (SUBREG_REG (in))))
1073 || !targetm.hard_regno_mode_ok (subreg_regno (in), inmode))) 1084 || !targetm.hard_regno_mode_ok (subreg_regno (in), inmode)))
1074 || (secondary_reload_class (1, rclass, inmode, in) != NO_REGS 1085 || (secondary_reload_class (1, rclass, inmode, in) != NO_REGS
1075 && (secondary_reload_class (1, rclass, GET_MODE (SUBREG_REG (in)), 1086 && (secondary_reload_class (1, rclass, GET_MODE (SUBREG_REG (in)),
1076 SUBREG_REG (in)) 1087 SUBREG_REG (in))
1077 == NO_REGS)) 1088 == NO_REGS))
1089 if (!WORD_REGISTER_OPERATIONS 1100 if (!WORD_REGISTER_OPERATIONS
1090 && LOAD_EXTEND_OP (GET_MODE (in)) == UNKNOWN 1101 && LOAD_EXTEND_OP (GET_MODE (in)) == UNKNOWN
1091 && MEM_P (in)) 1102 && MEM_P (in))
1092 /* This is supposed to happen only for paradoxical subregs made by 1103 /* This is supposed to happen only for paradoxical subregs made by
1093 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */ 1104 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1094 gcc_assert (GET_MODE_SIZE (GET_MODE (in)) <= GET_MODE_SIZE (inmode)); 1105 gcc_assert (known_le (GET_MODE_SIZE (GET_MODE (in)),
1106 GET_MODE_SIZE (inmode)));
1095 1107
1096 inmode = GET_MODE (in); 1108 inmode = GET_MODE (in);
1097 } 1109 }
1098 1110
1099 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R 1111 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1148 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER) 1160 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1149 || MEM_P (SUBREG_REG (out))) 1161 || MEM_P (SUBREG_REG (out)))
1150 && (paradoxical_subreg_p (outmode, GET_MODE (SUBREG_REG (out))) 1162 && (paradoxical_subreg_p (outmode, GET_MODE (SUBREG_REG (out)))
1151 || (WORD_REGISTER_OPERATIONS 1163 || (WORD_REGISTER_OPERATIONS
1152 && partial_subreg_p (outmode, GET_MODE (SUBREG_REG (out))) 1164 && partial_subreg_p (outmode, GET_MODE (SUBREG_REG (out)))
1153 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD == 1165 && (known_equal_after_align_down
1154 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1) 1166 (GET_MODE_SIZE (outmode) - 1,
1155 / UNITS_PER_WORD))))) 1167 GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1,
1168 UNITS_PER_WORD)))))
1156 || (REG_P (SUBREG_REG (out)) 1169 || (REG_P (SUBREG_REG (out))
1157 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1170 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1158 /* The case of a word mode subreg 1171 /* The case of a word mode subreg
1159 is handled differently in the following statement. */ 1172 is handled differently in the following statement. */
1160 && ! (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD 1173 && ! (known_le (GET_MODE_SIZE (outmode), UNITS_PER_WORD)
1161 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1174 && maybe_gt (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))),
1162 > UNITS_PER_WORD)) 1175 UNITS_PER_WORD))
1163 && !targetm.hard_regno_mode_ok (subreg_regno (out), outmode)) 1176 && !targetm.hard_regno_mode_ok (subreg_regno (out), outmode))
1164 || (secondary_reload_class (0, rclass, outmode, out) != NO_REGS 1177 || (secondary_reload_class (0, rclass, outmode, out) != NO_REGS
1165 && (secondary_reload_class (0, rclass, GET_MODE (SUBREG_REG (out)), 1178 && (secondary_reload_class (0, rclass, GET_MODE (SUBREG_REG (out)),
1166 SUBREG_REG (out)) 1179 SUBREG_REG (out))
1167 == NO_REGS)) 1180 == NO_REGS))
1175 out_subreg_loc = outloc; 1188 out_subreg_loc = outloc;
1176 #endif 1189 #endif
1177 outloc = &SUBREG_REG (out); 1190 outloc = &SUBREG_REG (out);
1178 out = *outloc; 1191 out = *outloc;
1179 gcc_assert (WORD_REGISTER_OPERATIONS || !MEM_P (out) 1192 gcc_assert (WORD_REGISTER_OPERATIONS || !MEM_P (out)
1180 || GET_MODE_SIZE (GET_MODE (out)) 1193 || known_le (GET_MODE_SIZE (GET_MODE (out)),
1181 <= GET_MODE_SIZE (outmode)); 1194 GET_MODE_SIZE (outmode)));
1182 outmode = GET_MODE (out); 1195 outmode = GET_MODE (out);
1183 } 1196 }
1184 1197
1185 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R 1198 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1186 where either M1 is not valid for R or M2 is wider than a word but we 1199 where either M1 is not valid for R or M2 is wider than a word but we
1530 as the incoming one, we can dispense with loading it. 1543 as the incoming one, we can dispense with loading it.
1531 The easiest way to tell the caller that is to give a phony 1544 The easiest way to tell the caller that is to give a phony
1532 value for the incoming operand (same as outgoing one). */ 1545 value for the incoming operand (same as outgoing one). */
1533 if (rld[i].reg_rtx == out 1546 if (rld[i].reg_rtx == out
1534 && (REG_P (in) || CONSTANT_P (in)) 1547 && (REG_P (in) || CONSTANT_P (in))
1535 && 0 != find_equiv_reg (in, this_insn, NO_REGS, REGNO (out), 1548 && find_equiv_reg (in, this_insn, NO_REGS, REGNO (out),
1536 static_reload_reg_p, i, inmode)) 1549 static_reload_reg_p, i, inmode) != 0)
1537 rld[i].in = out; 1550 rld[i].in = out;
1538 } 1551 }
1539 1552
1540 /* If this is an input reload and the operand contains a register that 1553 /* If this is an input reload and the operand contains a register that
1541 dies in this insn and is used nowhere else, see if it is the right class 1554 dies in this insn and is used nowhere else, see if it is the right class
1583 /* ??? Why is this code so different from the previous? 1596 /* ??? Why is this code so different from the previous?
1584 Is there any simple coherent way to describe the two together? 1597 Is there any simple coherent way to describe the two together?
1585 What's going on here. */ 1598 What's going on here. */
1586 && (in != out 1599 && (in != out
1587 || (GET_CODE (in) == SUBREG 1600 || (GET_CODE (in) == SUBREG
1588 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1)) 1601 && (known_equal_after_align_up
1589 / UNITS_PER_WORD) 1602 (GET_MODE_SIZE (GET_MODE (in)),
1590 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1603 GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))),
1591 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))) 1604 UNITS_PER_WORD))))
1592 /* Make sure the operand fits in the reg that dies. */ 1605 /* Make sure the operand fits in the reg that dies. */
1593 && (GET_MODE_SIZE (rel_mode) 1606 && known_le (GET_MODE_SIZE (rel_mode),
1594 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))) 1607 GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1595 && targetm.hard_regno_mode_ok (regno, inmode) 1608 && targetm.hard_regno_mode_ok (regno, inmode)
1596 && targetm.hard_regno_mode_ok (regno, outmode)) 1609 && targetm.hard_regno_mode_ok (regno, outmode))
1597 { 1610 {
1598 unsigned int offs; 1611 unsigned int offs;
1599 unsigned int nregs = MAX (hard_regno_nregs (regno, inmode), 1612 unsigned int nregs = MAX (hard_regno_nregs (regno, inmode),
1770 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS 1783 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1771 && rld[i].when_needed != RELOAD_OTHER 1784 && rld[i].when_needed != RELOAD_OTHER
1772 && (ira_reg_class_max_nregs [(int)rld[i].rclass][(int) rld[i].inmode] 1785 && (ira_reg_class_max_nregs [(int)rld[i].rclass][(int) rld[i].inmode]
1773 == ira_reg_class_max_nregs [(int) rld[output_reload].rclass] 1786 == ira_reg_class_max_nregs [(int) rld[output_reload].rclass]
1774 [(int) rld[output_reload].outmode]) 1787 [(int) rld[output_reload].outmode])
1775 && rld[i].inc == 0 1788 && known_eq (rld[i].inc, 0)
1776 && rld[i].reg_rtx == 0 1789 && rld[i].reg_rtx == 0
1777 /* Don't combine two reloads with different secondary 1790 /* Don't combine two reloads with different secondary
1778 memory locations. */ 1791 memory locations. */
1779 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0 1792 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1780 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0 1793 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1927 int out_offset = 0; 1940 int out_offset = 0;
1928 rtx value = 0; 1941 rtx value = 0;
1929 1942
1930 /* If operands exceed a word, we can't use either of them 1943 /* If operands exceed a word, we can't use either of them
1931 unless they have the same size. */ 1944 unless they have the same size. */
1932 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode) 1945 if (maybe_ne (GET_MODE_SIZE (outmode), GET_MODE_SIZE (inmode))
1933 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD 1946 && (maybe_gt (GET_MODE_SIZE (outmode), UNITS_PER_WORD)
1934 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD)) 1947 || maybe_gt (GET_MODE_SIZE (inmode), UNITS_PER_WORD)))
1935 return 0; 1948 return 0;
1936 1949
1937 /* Note that {in,out}_offset are needed only when 'in' or 'out' 1950 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1938 respectively refers to a hard register. */ 1951 respectively refers to a hard register. */
1939 1952
2305 case 'i': 2318 case 'i':
2306 if (XINT (x, i) != XINT (y, i)) 2319 if (XINT (x, i) != XINT (y, i))
2307 return 0; 2320 return 0;
2308 break; 2321 break;
2309 2322
2323 case 'p':
2324 if (maybe_ne (SUBREG_BYTE (x), SUBREG_BYTE (y)))
2325 return 0;
2326 break;
2327
2310 case 'e': 2328 case 'e':
2311 val = operands_match_p (XEXP (x, i), XEXP (y, i)); 2329 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2312 if (val == 0) 2330 if (val == 0)
2313 return 0; 2331 return 0;
2314 /* If any subexpression returns 2, 2332 /* If any subexpression returns 2,
2353 2371
2354 static struct decomposition 2372 static struct decomposition
2355 decompose (rtx x) 2373 decompose (rtx x)
2356 { 2374 {
2357 struct decomposition val; 2375 struct decomposition val;
2358 int all_const = 0; 2376 int all_const = 0, regno;
2359 2377
2360 memset (&val, 0, sizeof (val)); 2378 memset (&val, 0, sizeof (val));
2361 2379
2362 switch (GET_CODE (x)) 2380 switch (GET_CODE (x))
2363 { 2381 {
2451 } 2469 }
2452 break; 2470 break;
2453 2471
2454 case REG: 2472 case REG:
2455 val.reg_flag = 1; 2473 val.reg_flag = 1;
2456 val.start = true_regnum (x); 2474 regno = true_regnum (x);
2457 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER) 2475 if (regno < 0 || regno >= FIRST_PSEUDO_REGISTER)
2458 { 2476 {
2459 /* A pseudo with no hard reg. */ 2477 /* A pseudo with no hard reg. */
2460 val.start = REGNO (x); 2478 val.start = REGNO (x);
2461 val.end = val.start + 1; 2479 val.end = val.start + 1;
2462 } 2480 }
2463 else 2481 else
2464 /* A hard reg. */ 2482 {
2465 val.end = end_hard_regno (GET_MODE (x), val.start); 2483 /* A hard reg. */
2484 val.start = regno;
2485 val.end = end_hard_regno (GET_MODE (x), regno);
2486 }
2466 break; 2487 break;
2467 2488
2468 case SUBREG: 2489 case SUBREG:
2469 if (!REG_P (SUBREG_REG (x))) 2490 if (!REG_P (SUBREG_REG (x)))
2470 /* This could be more precise, but it's good enough. */ 2491 /* This could be more precise, but it's good enough. */
2471 return decompose (SUBREG_REG (x)); 2492 return decompose (SUBREG_REG (x));
2493 regno = true_regnum (x);
2494 if (regno < 0 || regno >= FIRST_PSEUDO_REGISTER)
2495 return decompose (SUBREG_REG (x));
2496
2497 /* A hard reg. */
2472 val.reg_flag = 1; 2498 val.reg_flag = 1;
2473 val.start = true_regnum (x); 2499 val.start = regno;
2474 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER) 2500 val.end = regno + subreg_nregs (x);
2475 return decompose (SUBREG_REG (x));
2476 else
2477 /* A hard reg. */
2478 val.end = val.start + subreg_nregs (x);
2479 break; 2501 break;
2480 2502
2481 case SCRATCH: 2503 case SCRATCH:
2482 /* This hasn't been assigned yet, so it can't conflict yet. */ 2504 /* This hasn't been assigned yet, so it can't conflict yet. */
2483 val.safe = 1; 2505 val.safe = 1;
2498 immune_p (rtx x, rtx y, struct decomposition ydata) 2520 immune_p (rtx x, rtx y, struct decomposition ydata)
2499 { 2521 {
2500 struct decomposition xdata; 2522 struct decomposition xdata;
2501 2523
2502 if (ydata.reg_flag) 2524 if (ydata.reg_flag)
2503 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0); 2525 /* In this case the decomposition structure contains register
2526 numbers rather than byte offsets. */
2527 return !refers_to_regno_for_reload_p (ydata.start.to_constant (),
2528 ydata.end.to_constant (),
2529 x, (rtx *) 0);
2504 if (ydata.safe) 2530 if (ydata.safe)
2505 return 1; 2531 return 1;
2506 2532
2507 gcc_assert (MEM_P (y)); 2533 gcc_assert (MEM_P (y));
2508 /* If Y is memory and X is not, Y can't affect X. */ 2534 /* If Y is memory and X is not, Y can't affect X. */
2529 return 1; 2555 return 1;
2530 /* If either base is variable, we don't know anything. */ 2556 /* If either base is variable, we don't know anything. */
2531 return 0; 2557 return 0;
2532 } 2558 }
2533 2559
2534 return (xdata.start >= ydata.end || ydata.start >= xdata.end); 2560 return known_ge (xdata.start, ydata.end) || known_ge (ydata.start, xdata.end);
2535 } 2561 }
2536 2562
2537 /* Similar, but calls decompose. */ 2563 /* Similar, but calls decompose. */
2538 2564
2539 int 2565 int
2862 wider reload. */ 2888 wider reload. */
2863 2889
2864 if (replace 2890 if (replace
2865 && MEM_P (op) 2891 && MEM_P (op)
2866 && REG_P (reg) 2892 && REG_P (reg)
2867 && (GET_MODE_SIZE (GET_MODE (reg)) 2893 && known_ge (GET_MODE_SIZE (GET_MODE (reg)),
2868 >= GET_MODE_SIZE (GET_MODE (op))) 2894 GET_MODE_SIZE (GET_MODE (op)))
2869 && reg_equiv_constant (REGNO (reg)) == 0) 2895 && reg_equiv_constant (REGNO (reg)) == 0)
2870 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg), 2896 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2871 insn), 2897 insn),
2872 REG_EQUAL, reg_equiv_memory_loc (REGNO (reg))); 2898 REG_EQUAL, reg_equiv_memory_loc (REGNO (reg)));
2873 2899
3098 those should have been reduced to just a mem. */ 3124 those should have been reduced to just a mem. */
3099 || ((MEM_P (operand) 3125 || ((MEM_P (operand)
3100 || (REG_P (operand) 3126 || (REG_P (operand)
3101 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 3127 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3102 && (WORD_REGISTER_OPERATIONS 3128 && (WORD_REGISTER_OPERATIONS
3103 || ((GET_MODE_BITSIZE (GET_MODE (operand)) 3129 || (((maybe_lt
3104 < BIGGEST_ALIGNMENT) 3130 (GET_MODE_BITSIZE (GET_MODE (operand)),
3105 && paradoxical_subreg_p (operand_mode[i], 3131 BIGGEST_ALIGNMENT))
3106 GET_MODE (operand))) 3132 && (paradoxical_subreg_p
3133 (operand_mode[i], GET_MODE (operand)))))
3107 || BYTES_BIG_ENDIAN 3134 || BYTES_BIG_ENDIAN
3108 || ((GET_MODE_SIZE (operand_mode[i]) 3135 || (known_le (GET_MODE_SIZE (operand_mode[i]),
3109 <= UNITS_PER_WORD) 3136 UNITS_PER_WORD)
3110 && (is_a <scalar_int_mode> 3137 && (is_a <scalar_int_mode>
3111 (GET_MODE (operand), &inner_mode)) 3138 (GET_MODE (operand), &inner_mode))
3112 && (GET_MODE_SIZE (inner_mode) 3139 && (GET_MODE_SIZE (inner_mode)
3113 <= UNITS_PER_WORD) 3140 <= UNITS_PER_WORD)
3114 && paradoxical_subreg_p (operand_mode[i], 3141 && paradoxical_subreg_p (operand_mode[i],
3601 register because we might otherwise exhaust the 3628 register because we might otherwise exhaust the
3602 class. */ 3629 class. */
3603 3630
3604 if (! win && ! did_match 3631 if (! win && ! did_match
3605 && this_alternative[i] != NO_REGS 3632 && this_alternative[i] != NO_REGS
3606 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 3633 && known_le (GET_MODE_SIZE (operand_mode[i]), UNITS_PER_WORD)
3607 && reg_class_size [(int) preferred_class[i]] > 0 3634 && reg_class_size [(int) preferred_class[i]] > 0
3608 && ! small_register_class_p (preferred_class[i])) 3635 && ! small_register_class_p (preferred_class[i]))
3609 { 3636 {
3610 if (! reg_class_subset_p (this_alternative[i], 3637 if (! reg_class_subset_p (this_alternative[i],
3611 preferred_class[i])) 3638 preferred_class[i]))
6093 machine_mode outer_mode = GET_MODE (x); 6120 machine_mode outer_mode = GET_MODE (x);
6094 machine_mode inner_mode = GET_MODE (SUBREG_REG (x)); 6121 machine_mode inner_mode = GET_MODE (SUBREG_REG (x));
6095 int regno = REGNO (SUBREG_REG (x)); 6122 int regno = REGNO (SUBREG_REG (x));
6096 int reloaded = 0; 6123 int reloaded = 0;
6097 rtx tem, orig; 6124 rtx tem, orig;
6098 int offset; 6125 poly_int64 offset;
6099 6126
6100 gcc_assert (reg_equiv_memory_loc (regno) != 0); 6127 gcc_assert (reg_equiv_memory_loc (regno) != 0);
6101 6128
6102 /* We cannot replace the subreg with a modified memory reference if: 6129 /* We cannot replace the subreg with a modified memory reference if:
6103 6130
6122 if (paradoxical_subreg_p (x)) 6149 if (paradoxical_subreg_p (x))
6123 return NULL; 6150 return NULL;
6124 6151
6125 if (WORD_REGISTER_OPERATIONS 6152 if (WORD_REGISTER_OPERATIONS
6126 && partial_subreg_p (outer_mode, inner_mode) 6153 && partial_subreg_p (outer_mode, inner_mode)
6127 && ((GET_MODE_SIZE (outer_mode) - 1) / UNITS_PER_WORD 6154 && known_equal_after_align_down (GET_MODE_SIZE (outer_mode) - 1,
6128 == (GET_MODE_SIZE (inner_mode) - 1) / UNITS_PER_WORD)) 6155 GET_MODE_SIZE (inner_mode) - 1,
6156 UNITS_PER_WORD))
6129 return NULL; 6157 return NULL;
6130 6158
6131 /* Since we don't attempt to handle paradoxical subregs, we can just 6159 /* Since we don't attempt to handle paradoxical subregs, we can just
6132 call into simplify_subreg, which will handle all remaining checks 6160 call into simplify_subreg, which will handle all remaining checks
6133 for us. */ 6161 for us. */
6140 /* Now push all required address reloads, if any. */ 6168 /* Now push all required address reloads, if any. */
6141 reloaded = find_reloads_address (GET_MODE (tem), &tem, 6169 reloaded = find_reloads_address (GET_MODE (tem), &tem,
6142 XEXP (tem, 0), &XEXP (tem, 0), 6170 XEXP (tem, 0), &XEXP (tem, 0),
6143 opnum, type, ind_levels, insn); 6171 opnum, type, ind_levels, insn);
6144 /* ??? Do we need to handle nonzero offsets somehow? */ 6172 /* ??? Do we need to handle nonzero offsets somehow? */
6145 if (!offset && !rtx_equal_p (tem, orig)) 6173 if (known_eq (offset, 0) && !rtx_equal_p (tem, orig))
6146 push_reg_equiv_alt_mem (regno, tem); 6174 push_reg_equiv_alt_mem (regno, tem);
6147 6175
6148 /* For some processors an address may be valid in the original mode but 6176 /* For some processors an address may be valid in the original mode but
6149 not in a smaller mode. For example, ARM accepts a scaled index register 6177 not in a smaller mode. For example, ARM accepts a scaled index register
6150 in SImode but not in HImode. Note that this is only a problem if the 6178 in SImode but not in HImode. Note that this is only a problem if the
6748 = true_regnum (valtry = SET_DEST (pat))) >= 0) 6776 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6749 || (REG_P (SET_DEST (pat)) 6777 || (REG_P (SET_DEST (pat))
6750 && CONST_DOUBLE_AS_FLOAT_P (XEXP (tem, 0)) 6778 && CONST_DOUBLE_AS_FLOAT_P (XEXP (tem, 0))
6751 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0))) 6779 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6752 && CONST_INT_P (goal) 6780 && CONST_INT_P (goal)
6753 && 0 != (goaltry 6781 && (goaltry = operand_subword (XEXP (tem, 0), 0,
6754 = operand_subword (XEXP (tem, 0), 0, 0, 6782 0, VOIDmode)) != 0
6755 VOIDmode))
6756 && rtx_equal_p (goal, goaltry) 6783 && rtx_equal_p (goal, goaltry)
6757 && (valtry 6784 && (valtry
6758 = operand_subword (SET_DEST (pat), 0, 0, 6785 = operand_subword (SET_DEST (pat), 0, 0,
6759 VOIDmode)) 6786 VOIDmode))
6760 && (valueno = true_regnum (valtry)) >= 0))) 6787 && (valueno = true_regnum (valtry)) >= 0)))
6762 NULL_RTX)) 6789 NULL_RTX))
6763 && REG_P (SET_DEST (pat)) 6790 && REG_P (SET_DEST (pat))
6764 && CONST_DOUBLE_AS_FLOAT_P (XEXP (tem, 0)) 6791 && CONST_DOUBLE_AS_FLOAT_P (XEXP (tem, 0))
6765 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0))) 6792 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6766 && CONST_INT_P (goal) 6793 && CONST_INT_P (goal)
6767 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0, 6794 && (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6768 VOIDmode)) 6795 VOIDmode)) != 0
6769 && rtx_equal_p (goal, goaltry) 6796 && rtx_equal_p (goal, goaltry)
6770 && (valtry 6797 && (valtry
6771 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode)) 6798 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6772 && (valueno = true_regnum (valtry)) >= 0))) 6799 && (valueno = true_regnum (valtry)) >= 0)))
6773 { 6800 {
7056 7083
7057 /* Find a place where INCED appears in an increment or decrement operator 7084 /* Find a place where INCED appears in an increment or decrement operator
7058 within X, and return the amount INCED is incremented or decremented by. 7085 within X, and return the amount INCED is incremented or decremented by.
7059 The value is always positive. */ 7086 The value is always positive. */
7060 7087
7061 static int 7088 static poly_int64
7062 find_inc_amount (rtx x, rtx inced) 7089 find_inc_amount (rtx x, rtx inced)
7063 { 7090 {
7064 enum rtx_code code = GET_CODE (x); 7091 enum rtx_code code = GET_CODE (x);
7065 const char *fmt; 7092 const char *fmt;
7066 int i; 7093 int i;
7089 fmt = GET_RTX_FORMAT (code); 7116 fmt = GET_RTX_FORMAT (code);
7090 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 7117 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7091 { 7118 {
7092 if (fmt[i] == 'e') 7119 if (fmt[i] == 'e')
7093 { 7120 {
7094 int tem = find_inc_amount (XEXP (x, i), inced); 7121 poly_int64 tem = find_inc_amount (XEXP (x, i), inced);
7095 if (tem != 0) 7122 if (maybe_ne (tem, 0))
7096 return tem; 7123 return tem;
7097 } 7124 }
7098 if (fmt[i] == 'E') 7125 if (fmt[i] == 'E')
7099 { 7126 {
7100 int j; 7127 int j;
7101 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 7128 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7102 { 7129 {
7103 int tem = find_inc_amount (XVECEXP (x, i, j), inced); 7130 poly_int64 tem = find_inc_amount (XVECEXP (x, i, j), inced);
7104 if (tem != 0) 7131 if (maybe_ne (tem, 0))
7105 return tem; 7132 return tem;
7106 } 7133 }
7107 } 7134 }
7108 } 7135 }
7109 7136
7260 fprintf (f, ", optional"); 7287 fprintf (f, ", optional");
7261 7288
7262 if (rld[r].nongroup) 7289 if (rld[r].nongroup)
7263 fprintf (f, ", nongroup"); 7290 fprintf (f, ", nongroup");
7264 7291
7265 if (rld[r].inc != 0) 7292 if (maybe_ne (rld[r].inc, 0))
7266 fprintf (f, ", inc by %d", rld[r].inc); 7293 {
7294 fprintf (f, ", inc by ");
7295 print_dec (rld[r].inc, f, SIGNED);
7296 }
7267 7297
7268 if (rld[r].nocombine) 7298 if (rld[r].nocombine)
7269 fprintf (f, ", can't combine"); 7299 fprintf (f, ", can't combine");
7270 7300
7271 if (rld[r].secondary_p) 7301 if (rld[r].secondary_p)