Mercurial > hg > CbC > CbC_gcc
comparison gcc/config/avr/avr.md @ 67:f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
author | nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp> |
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date | Tue, 22 Mar 2011 17:18:12 +0900 |
parents | b7f97abdc517 |
children | 04ced10e8804 |
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65:65488c3d617d | 67:f6334be47118 |
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1 ;; -*- Mode: Scheme -*- | |
2 ;; Machine description for GNU compiler, | 1 ;; Machine description for GNU compiler, |
3 ;; for ATMEL AVR micro controllers. | 2 ;; for ATMEL AVR micro controllers. |
4 ;; Copyright (C) 1998, 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, | 3 ;; Copyright (C) 1998, 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, |
5 ;; 2009, 2010 Free Software Foundation, Inc. | 4 ;; 2009, 2010 Free Software Foundation, Inc. |
6 ;; Contributed by Denis Chertykov (chertykov@gmail.com) | 5 ;; Contributed by Denis Chertykov (chertykov@gmail.com) |
168 emit_clobber (gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode))); | 167 emit_clobber (gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode))); |
169 | 168 |
170 emit_clobber (gen_rtx_MEM (BLKmode, hard_frame_pointer_rtx)); | 169 emit_clobber (gen_rtx_MEM (BLKmode, hard_frame_pointer_rtx)); |
171 | 170 |
172 emit_move_insn (hard_frame_pointer_rtx, r_fp); | 171 emit_move_insn (hard_frame_pointer_rtx, r_fp); |
173 emit_stack_restore (SAVE_NONLOCAL, r_sp, NULL_RTX); | 172 emit_stack_restore (SAVE_NONLOCAL, r_sp); |
174 | 173 |
175 emit_use (hard_frame_pointer_rtx); | 174 emit_use (hard_frame_pointer_rtx); |
176 emit_use (stack_pointer_rtx); | 175 emit_use (stack_pointer_rtx); |
177 | 176 |
178 emit_indirect_jump (r_label); | 177 emit_indirect_jump (r_label); |
2075 "" | 2074 "" |
2076 "#" | 2075 "#" |
2077 "reload_completed" | 2076 "reload_completed" |
2078 [(set (match_dup 2) (match_dup 1)) | 2077 [(set (match_dup 2) (match_dup 1)) |
2079 (set (match_dup 3) (const_int 0))] | 2078 (set (match_dup 3) (const_int 0))] |
2080 "unsigned int low_off = subreg_lowpart_offset (QImode, HImode); | 2079 { |
2081 unsigned int high_off = subreg_highpart_offset (QImode, HImode); | 2080 unsigned int low_off = subreg_lowpart_offset (QImode, HImode); |
2082 | 2081 unsigned int high_off = subreg_highpart_offset (QImode, HImode); |
2083 operands[2] = simplify_gen_subreg (QImode, operands[0], HImode, low_off); | 2082 |
2084 operands[3] = simplify_gen_subreg (QImode, operands[0], HImode, high_off); | 2083 operands[2] = simplify_gen_subreg (QImode, operands[0], HImode, low_off); |
2085 ") | 2084 operands[3] = simplify_gen_subreg (QImode, operands[0], HImode, high_off); |
2085 }) | |
2086 | 2086 |
2087 (define_insn_and_split "zero_extendqisi2" | 2087 (define_insn_and_split "zero_extendqisi2" |
2088 [(set (match_operand:SI 0 "register_operand" "=r") | 2088 [(set (match_operand:SI 0 "register_operand" "=r") |
2089 (zero_extend:SI (match_operand:QI 1 "register_operand" "r")))] | 2089 (zero_extend:SI (match_operand:QI 1 "register_operand" "r")))] |
2090 "" | 2090 "" |
2091 "#" | 2091 "#" |
2092 "reload_completed" | 2092 "reload_completed" |
2093 [(set (match_dup 2) (zero_extend:HI (match_dup 1))) | 2093 [(set (match_dup 2) (zero_extend:HI (match_dup 1))) |
2094 (set (match_dup 3) (const_int 0))] | 2094 (set (match_dup 3) (const_int 0))] |
2095 "unsigned int low_off = subreg_lowpart_offset (HImode, SImode); | 2095 { |
2096 unsigned int high_off = subreg_highpart_offset (HImode, SImode); | 2096 unsigned int low_off = subreg_lowpart_offset (HImode, SImode); |
2097 | 2097 unsigned int high_off = subreg_highpart_offset (HImode, SImode); |
2098 operands[2] = simplify_gen_subreg (HImode, operands[0], SImode, low_off); | 2098 |
2099 operands[3] = simplify_gen_subreg (HImode, operands[0], SImode, high_off); | 2099 operands[2] = simplify_gen_subreg (HImode, operands[0], SImode, low_off); |
2100 ") | 2100 operands[3] = simplify_gen_subreg (HImode, operands[0], SImode, high_off); |
2101 }) | |
2101 | 2102 |
2102 (define_insn_and_split "zero_extendhisi2" | 2103 (define_insn_and_split "zero_extendhisi2" |
2103 [(set (match_operand:SI 0 "register_operand" "=r") | 2104 [(set (match_operand:SI 0 "register_operand" "=r") |
2104 (zero_extend:SI (match_operand:HI 1 "register_operand" "r")))] | 2105 (zero_extend:SI (match_operand:HI 1 "register_operand" "r")))] |
2105 "" | 2106 "" |
2106 "#" | 2107 "#" |
2107 "reload_completed" | 2108 "reload_completed" |
2108 [(set (match_dup 2) (match_dup 1)) | 2109 [(set (match_dup 2) (match_dup 1)) |
2109 (set (match_dup 3) (const_int 0))] | 2110 (set (match_dup 3) (const_int 0))] |
2110 "unsigned int low_off = subreg_lowpart_offset (HImode, SImode); | 2111 { |
2111 unsigned int high_off = subreg_highpart_offset (HImode, SImode); | 2112 unsigned int low_off = subreg_lowpart_offset (HImode, SImode); |
2112 | 2113 unsigned int high_off = subreg_highpart_offset (HImode, SImode); |
2113 operands[2] = simplify_gen_subreg (HImode, operands[0], SImode, low_off); | 2114 |
2114 operands[3] = simplify_gen_subreg (HImode, operands[0], SImode, high_off); | 2115 operands[2] = simplify_gen_subreg (HImode, operands[0], SImode, low_off); |
2115 ") | 2116 operands[3] = simplify_gen_subreg (HImode, operands[0], SImode, high_off); |
2117 }) | |
2116 | 2118 |
2117 (define_insn_and_split "zero_extendqidi2" | 2119 (define_insn_and_split "zero_extendqidi2" |
2118 [(set (match_operand:DI 0 "register_operand" "=r") | 2120 [(set (match_operand:DI 0 "register_operand" "=r") |
2119 (zero_extend:DI (match_operand:QI 1 "register_operand" "r")))] | 2121 (zero_extend:DI (match_operand:QI 1 "register_operand" "r")))] |
2120 "" | 2122 "" |
2121 "#" | 2123 "#" |
2122 "reload_completed" | 2124 "reload_completed" |
2123 [(set (match_dup 2) (zero_extend:SI (match_dup 1))) | 2125 [(set (match_dup 2) (zero_extend:SI (match_dup 1))) |
2124 (set (match_dup 3) (const_int 0))] | 2126 (set (match_dup 3) (const_int 0))] |
2125 "unsigned int low_off = subreg_lowpart_offset (SImode, DImode); | 2127 { |
2126 unsigned int high_off = subreg_highpart_offset (SImode, DImode); | 2128 unsigned int low_off = subreg_lowpart_offset (SImode, DImode); |
2127 | 2129 unsigned int high_off = subreg_highpart_offset (SImode, DImode); |
2128 operands[2] = simplify_gen_subreg (SImode, operands[0], DImode, low_off); | 2130 |
2129 operands[3] = simplify_gen_subreg (SImode, operands[0], DImode, high_off); | 2131 operands[2] = simplify_gen_subreg (SImode, operands[0], DImode, low_off); |
2130 ") | 2132 operands[3] = simplify_gen_subreg (SImode, operands[0], DImode, high_off); |
2133 }) | |
2131 | 2134 |
2132 (define_insn_and_split "zero_extendhidi2" | 2135 (define_insn_and_split "zero_extendhidi2" |
2133 [(set (match_operand:DI 0 "register_operand" "=r") | 2136 [(set (match_operand:DI 0 "register_operand" "=r") |
2134 (zero_extend:DI (match_operand:HI 1 "register_operand" "r")))] | 2137 (zero_extend:DI (match_operand:HI 1 "register_operand" "r")))] |
2135 "" | 2138 "" |
2136 "#" | 2139 "#" |
2137 "reload_completed" | 2140 "reload_completed" |
2138 [(set (match_dup 2) (zero_extend:SI (match_dup 1))) | 2141 [(set (match_dup 2) (zero_extend:SI (match_dup 1))) |
2139 (set (match_dup 3) (const_int 0))] | 2142 (set (match_dup 3) (const_int 0))] |
2140 "unsigned int low_off = subreg_lowpart_offset (SImode, DImode); | 2143 { |
2141 unsigned int high_off = subreg_highpart_offset (SImode, DImode); | 2144 unsigned int low_off = subreg_lowpart_offset (SImode, DImode); |
2142 | 2145 unsigned int high_off = subreg_highpart_offset (SImode, DImode); |
2143 operands[2] = simplify_gen_subreg (SImode, operands[0], DImode, low_off); | 2146 |
2144 operands[3] = simplify_gen_subreg (SImode, operands[0], DImode, high_off); | 2147 operands[2] = simplify_gen_subreg (SImode, operands[0], DImode, low_off); |
2145 ") | 2148 operands[3] = simplify_gen_subreg (SImode, operands[0], DImode, high_off); |
2149 }) | |
2146 | 2150 |
2147 (define_insn_and_split "zero_extendsidi2" | 2151 (define_insn_and_split "zero_extendsidi2" |
2148 [(set (match_operand:DI 0 "register_operand" "=r") | 2152 [(set (match_operand:DI 0 "register_operand" "=r") |
2149 (zero_extend:DI (match_operand:SI 1 "register_operand" "r")))] | 2153 (zero_extend:DI (match_operand:SI 1 "register_operand" "r")))] |
2150 "" | 2154 "" |
2151 "#" | 2155 "#" |
2152 "reload_completed" | 2156 "reload_completed" |
2153 [(set (match_dup 2) (match_dup 1)) | 2157 [(set (match_dup 2) (match_dup 1)) |
2154 (set (match_dup 3) (const_int 0))] | 2158 (set (match_dup 3) (const_int 0))] |
2155 "unsigned int low_off = subreg_lowpart_offset (SImode, DImode); | 2159 { |
2156 unsigned int high_off = subreg_highpart_offset (SImode, DImode); | 2160 unsigned int low_off = subreg_lowpart_offset (SImode, DImode); |
2157 | 2161 unsigned int high_off = subreg_highpart_offset (SImode, DImode); |
2158 operands[2] = simplify_gen_subreg (SImode, operands[0], DImode, low_off); | 2162 |
2159 operands[3] = simplify_gen_subreg (SImode, operands[0], DImode, high_off); | 2163 operands[2] = simplify_gen_subreg (SImode, operands[0], DImode, low_off); |
2160 ") | 2164 operands[3] = simplify_gen_subreg (SImode, operands[0], DImode, high_off); |
2165 }) | |
2161 | 2166 |
2162 ;;<=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=> | 2167 ;;<=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=> |
2163 ;; compare | 2168 ;; compare |
2164 | 2169 |
2165 ; Optimize negated tests into reverse compare if overflow is undefined. | 2170 ; Optimize negated tests into reverse compare if overflow is undefined. |