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comparison gcc/config/h8300/h8300.md @ 67:f6334be47118

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update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
author nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
date Tue, 22 Mar 2011 17:18:12 +0900
parents b7f97abdc517
children 04ced10e8804
comparison
equal deleted inserted replaced
65:65488c3d617d 67:f6334be47118
1777 "TARGET_H8300SX" 1777 "TARGET_H8300SX"
1778 [(set (match_dup 0) 1778 [(set (match_dup 0)
1779 (and:QI (match_dup 1) 1779 (and:QI (match_dup 1)
1780 (match_dup 2)))] 1780 (match_dup 2)))]
1781 { 1781 {
1782 operands[0] = adjust_address (operands[0], QImode, 1); 1782 if (abs (INTVAL (operands[2])) > 0xFF)
1783 operands[1] = adjust_address (operands[1], QImode, 1); 1783 {
1784 operands[0] = adjust_address (operands[0], QImode, 0);
1785 operands[1] = adjust_address (operands[1], QImode, 0);
1786 operands[2] = GEN_INT ((INTVAL (operands[2])) >> 8);
1787 }
1788 else
1789 {
1790 operands[0] = adjust_address (operands[0], QImode, 1);
1791 operands[1] = adjust_address (operands[1], QImode, 1);
1792 }
1784 }) 1793 })
1785 1794
1786 (define_insn "bclrhi_msx" 1795 (define_insn "bclrhi_msx"
1787 [(set (match_operand:HI 0 "bit_register_indirect_operand" "=m") 1796 [(set (match_operand:HI 0 "bit_register_indirect_operand" "=m")
1788 (and:HI (match_operand:HI 1 "bit_register_indirect_operand" "%0") 1797 (and:HI (match_operand:HI 1 "bit_register_indirect_operand" "%0")
1908 "TARGET_H8300SX" 1917 "TARGET_H8300SX"
1909 [(set (match_dup 0) 1918 [(set (match_dup 0)
1910 (ior:QI (match_dup 1) 1919 (ior:QI (match_dup 1)
1911 (match_dup 2)))] 1920 (match_dup 2)))]
1912 { 1921 {
1913 operands[0] = adjust_address (operands[0], QImode, 1); 1922 if (abs (INTVAL (operands[2])) > 0xFF)
1914 operands[1] = adjust_address (operands[1], QImode, 1); 1923 {
1924 operands[0] = adjust_address (operands[0], QImode, 0);
1925 operands[1] = adjust_address (operands[1], QImode, 0);
1926 operands[2] = GEN_INT ((INTVAL (operands[2])) >> 8);
1927 }
1928 else
1929 {
1930 operands[0] = adjust_address (operands[0], QImode, 1);
1931 operands[1] = adjust_address (operands[1], QImode, 1);
1932 }
1915 }) 1933 })
1916 1934
1917 (define_insn "bsethi_msx" 1935 (define_insn "bsethi_msx"
1918 [(set (match_operand:HI 0 "bit_register_indirect_operand" "=m") 1936 [(set (match_operand:HI 0 "bit_register_indirect_operand" "=m")
1919 (ior:HI (match_operand:HI 1 "bit_register_indirect_operand" "%0") 1937 (ior:HI (match_operand:HI 1 "bit_register_indirect_operand" "%0")
1974 "TARGET_H8300SX" 1992 "TARGET_H8300SX"
1975 [(set (match_dup 0) 1993 [(set (match_dup 0)
1976 (xor:QI (match_dup 1) 1994 (xor:QI (match_dup 1)
1977 (match_dup 2)))] 1995 (match_dup 2)))]
1978 { 1996 {
1979 operands[0] = adjust_address (operands[0], QImode, 1); 1997 if (abs (INTVAL (operands[2])) > 0xFF)
1980 operands[1] = adjust_address (operands[1], QImode, 1); 1998 {
1999 operands[0] = adjust_address (operands[0], QImode, 0);
2000 operands[1] = adjust_address (operands[1], QImode, 0);
2001 operands[2] = GEN_INT ((INTVAL (operands[2])) >> 8);
2002 }
2003 else
2004 {
2005 operands[0] = adjust_address (operands[0], QImode, 1);
2006 operands[1] = adjust_address (operands[1], QImode, 1);
2007 }
1981 }) 2008 })
1982 2009
1983 (define_insn "bnothi_msx" 2010 (define_insn "bnothi_msx"
1984 [(set (match_operand:HI 0 "bit_register_indirect_operand" "=m") 2011 [(set (match_operand:HI 0 "bit_register_indirect_operand" "=m")
1985 (xor:HI (match_operand:HI 1 "bit_register_indirect_operand" "%0") 2012 (xor:HI (match_operand:HI 1 "bit_register_indirect_operand" "%0")