Mercurial > hg > CbC > CbC_gcc
comparison gcc/config/m32r/constraints.md @ 67:f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
author | nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp> |
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date | Tue, 22 Mar 2011 17:18:12 +0900 |
parents | a06113de4d67 |
children | 04ced10e8804 |
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65:65488c3d617d | 67:f6334be47118 |
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1 ;; Constraint definitions for Renesas M32R cpu for GNU C compiler | 1 ;; Constraint definitions for Renesas M32R cpu for GNU C compiler |
2 ;; Copyright (C) 2007 Free Software Foundation, Inc. | 2 ;; Copyright (C) 2007, 2011 Free Software Foundation, Inc. |
3 ;; | 3 ;; |
4 ;; This file is part of GCC. | 4 ;; This file is part of GCC. |
5 ;; | 5 ;; |
6 ;; GCC is free software; you can redistribute it and/or modify it | 6 ;; GCC is free software; you can redistribute it and/or modify it |
7 ;; under the terms of the GNU General Public License as published | 7 ;; under the terms of the GNU General Public License as published |
116 (match_test "addr32_operand (op, VOIDmode)"))) | 116 (match_test "addr32_operand (op, VOIDmode)"))) |
117 | 117 |
118 (define_constraint "S" | 118 (define_constraint "S" |
119 "A store with pre {inc,dec}rement." | 119 "A store with pre {inc,dec}rement." |
120 (and (match_code "mem") | 120 (and (match_code "mem") |
121 (match_test "STORE_PREINC_PREDEC_P (GET_MODE (op), XEXP (op, 0))"))) | 121 (match_test "mode == SImode || mode == SFmode") |
122 (match_code "pre_inc,pre_dec" "0") | |
123 (match_code "reg" "00") | |
124 (match_test "GPR_P (REGNO (XEXP (XEXP (op, 0), 0))) | |
125 || REGNO (XEXP (XEXP (op, 0), 0)) == ARG_POINTER_REGNUM | |
126 || ! HARD_REGISTER_P (XEXP (XEXP (op, 0), 0))"))) | |
122 | 127 |
123 (define_constraint "T" | 128 (define_constraint "T" |
124 "An indirect of a pointer." | 129 "An indirect of a pointer." |
125 (and (match_code "mem") | 130 (and (match_code "mem") |
126 (match_test "memreg_operand (op, GET_MODE (op))"))) | 131 (match_test "memreg_operand (op, GET_MODE (op))"))) |
127 | 132 |
128 (define_constraint "U" | 133 (define_constraint "U" |
129 "A load with post increment." | 134 "A load with post increment." |
130 (and (match_code "mem") | 135 (and (match_code "mem") |
131 (match_test "LOAD_POSTINC_P (GET_MODE (op), XEXP (op, 0))"))) | 136 (match_test "mode == SImode || mode == SFmode") |
137 (match_code "post_inc" "0") | |
138 (match_code "reg" "00") | |
139 (match_test "GPR_P (REGNO (XEXP (XEXP (op, 0), 0))) | |
140 || REGNO (XEXP (XEXP (op, 0), 0)) == ARG_POINTER_REGNUM | |
141 || ! HARD_REGISTER_P (XEXP (XEXP (op, 0), 0))"))) | |
132 | 142 |
133 (define_constraint "W" | 143 (define_constraint "W" |
134 "zero immediate." | 144 "zero immediate." |
135 (and (match_code "const_int") | 145 (and (match_code "const_int") |
136 (match_test "ival == 0"))) | 146 (match_test "ival == 0"))) |