Mercurial > hg > CbC > CbC_gcc
comparison gcc/config/rx/rx.h @ 67:f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
author | nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp> |
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date | Tue, 22 Mar 2011 17:18:12 +0900 |
parents | b7f97abdc517 |
children | 04ced10e8804 |
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65:65488c3d617d | 67:f6334be47118 |
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1 /* GCC backend definitions for the Renesas RX processor. | 1 /* GCC backend definitions for the Renesas RX processor. |
2 Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc. | 2 Copyright (C) 2008, 2009, 2010, 2011 Free Software Foundation, Inc. |
3 Contributed by Red Hat. | 3 Contributed by Red Hat. |
4 | 4 |
5 This file is part of GCC. | 5 This file is part of GCC. |
6 | 6 |
7 GCC is free software; you can redistribute it and/or modify it | 7 GCC is free software; you can redistribute it and/or modify it |
23 do \ | 23 do \ |
24 { \ | 24 { \ |
25 builtin_define ("__RX__"); \ | 25 builtin_define ("__RX__"); \ |
26 builtin_assert ("cpu=RX"); \ | 26 builtin_assert ("cpu=RX"); \ |
27 if (rx_cpu_type == RX610) \ | 27 if (rx_cpu_type == RX610) \ |
28 builtin_assert ("machine=RX610"); \ | 28 { \ |
29 builtin_define ("__RX610__"); \ | |
30 builtin_assert ("machine=RX610"); \ | |
31 } \ | |
29 else \ | 32 else \ |
30 builtin_assert ("machine=RX600"); \ | 33 builtin_assert ("machine=RX600"); \ |
31 \ | 34 \ |
32 if (TARGET_BIG_ENDIAN_DATA) \ | 35 if (TARGET_BIG_ENDIAN_DATA) \ |
33 builtin_define ("__RX_BIG_ENDIAN__"); \ | 36 builtin_define ("__RX_BIG_ENDIAN__"); \ |
80 | 83 |
81 #undef LIB_SPEC | 84 #undef LIB_SPEC |
82 #define LIB_SPEC " \ | 85 #define LIB_SPEC " \ |
83 --start-group \ | 86 --start-group \ |
84 -lc \ | 87 -lc \ |
85 %{msim*:-lsim}%{!msim*:-lnosys} \ | 88 %{msim:-lsim}%{!msim:-lnosys} \ |
86 %{fprofile-arcs|fprofile-generate|coverage:-lgcov} \ | 89 %{fprofile-arcs|fprofile-generate|coverage:-lgcov} \ |
87 --end-group \ | 90 --end-group \ |
88 %{!T*: %{msim*:%Trx-sim.ld}%{!msim*:%Trx.ld}} \ | 91 %{!T*: %{msim:%Trx-sim.ld}%{!msim:%Trx.ld}} \ |
89 " | 92 " |
90 | 93 |
91 #undef LINK_SPEC | 94 #undef LINK_SPEC |
92 #define LINK_SPEC "%{mbig-endian-data:--oformat elf32-rx-be} %{mrelax:-relax}" | 95 #define LINK_SPEC "%{mbig-endian-data:--oformat elf32-rx-be} %{mrelax:-relax}" |
93 | 96 |
94 | 97 |
95 #define BITS_BIG_ENDIAN 0 | 98 #define BITS_BIG_ENDIAN 0 |
96 #define BYTES_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA | 99 #define BYTES_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA |
97 #define WORDS_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA | 100 #define WORDS_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA |
98 | 101 |
99 #ifdef __RX_BIG_ENDIAN__ | |
100 #define LIBGCC2_WORDS_BIG_ENDIAN 1 | |
101 #else | |
102 #define LIBGCC2_WORDS_BIG_ENDIAN 0 | |
103 #endif | |
104 | |
105 #define UNITS_PER_WORD 4 | 102 #define UNITS_PER_WORD 4 |
106 | 103 |
107 #define INT_TYPE_SIZE 32 | 104 #define INT_TYPE_SIZE 32 |
108 #define LONG_TYPE_SIZE 32 | 105 #define LONG_TYPE_SIZE 32 |
109 #define LONG_LONG_TYPE_SIZE 64 | 106 #define LONG_LONG_TYPE_SIZE 64 |
113 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE | 110 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE |
114 | 111 |
115 #ifdef __RX_32BIT_DOUBLES__ | 112 #ifdef __RX_32BIT_DOUBLES__ |
116 #define LIBGCC2_HAS_DF_MODE 0 | 113 #define LIBGCC2_HAS_DF_MODE 0 |
117 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 32 | 114 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 32 |
118 #define LIBGCC2_DOUBLE_TYPE_SIZE 32 | |
119 #else | 115 #else |
120 #define LIBGCC2_HAS_DF_MODE 1 | 116 #define LIBGCC2_HAS_DF_MODE 1 |
121 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64 | 117 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64 |
122 #define LIBGCC2_DOUBLE_TYPE_SIZE 64 | |
123 #endif | 118 #endif |
124 | 119 |
125 #define DEFAULT_SIGNED_CHAR 0 | 120 #define DEFAULT_SIGNED_CHAR 0 |
126 | 121 |
127 #define STRICT_ALIGNMENT 1 | 122 #define STRICT_ALIGNMENT 1 |
128 #define FUNCTION_BOUNDARY 8 | 123 #define FUNCTION_BOUNDARY 8 |
129 #define BIGGEST_ALIGNMENT 32 | 124 #define BIGGEST_ALIGNMENT 32 |
130 #define STACK_BOUNDARY 32 | 125 #define STACK_BOUNDARY 32 |
131 #define PARM_BOUNDARY 8 | 126 #define PARM_BOUNDARY 8 |
132 | 127 |
133 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) 32 | |
134 | |
135 #define STACK_GROWS_DOWNWARD 1 | 128 #define STACK_GROWS_DOWNWARD 1 |
136 #define FRAME_GROWS_DOWNWARD 0 | 129 #define FRAME_GROWS_DOWNWARD 0 |
137 #define FIRST_PARM_OFFSET(FNDECL) 0 | 130 #define FIRST_PARM_OFFSET(FNDECL) 0 |
138 | 131 |
139 #define MAX_REGS_PER_ADDRESS 2 | 132 #define MAX_REGS_PER_ADDRESS 2 |
140 | 133 |
141 #define Pmode SImode | 134 #define Pmode SImode |
142 #define POINTER_SIZE 32 | 135 #define POINTER_SIZE 32 |
143 #undef SIZE_TYPE | 136 #undef SIZE_TYPE |
144 #define SIZE_TYPE "long unsigned int" | 137 #define SIZE_TYPE "long unsigned int" |
138 #undef PTRDIFF_TYPE | |
139 #define PTRDIFF_TYPE "long int" | |
140 #undef WCHAR_TYPE | |
141 #define WCHAR_TYPE "long int" | |
142 #undef WCHAR_TYPE_SIZE | |
143 #define WCHAR_TYPE_SIZE BITS_PER_WORD | |
145 #define POINTERS_EXTEND_UNSIGNED 1 | 144 #define POINTERS_EXTEND_UNSIGNED 1 |
146 #define FUNCTION_MODE QImode | 145 #define FUNCTION_MODE QImode |
147 #define CASE_VECTOR_MODE Pmode | 146 #define CASE_VECTOR_MODE Pmode |
148 #define WORD_REGISTER_OPERATIONS 1 | 147 #define WORD_REGISTER_OPERATIONS 1 |
149 #define HAS_LONG_COND_BRANCH 0 | 148 #define HAS_LONG_COND_BRANCH 0 |
150 #define HAS_LONG_UNCOND_BRANCH 0 | 149 #define HAS_LONG_UNCOND_BRANCH 0 |
151 | 150 |
152 #define MOVE_MAX 4 | 151 #define MOVE_MAX 4 |
153 #define STARTING_FRAME_OFFSET 0 | 152 #define STARTING_FRAME_OFFSET 0 |
154 | 153 |
155 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0 | |
156 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | 154 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 |
157 | 155 |
158 #define LEGITIMATE_CONSTANT_P(X) rx_is_legitimate_constant (X) | 156 #define LEGITIMATE_CONSTANT_P(X) rx_is_legitimate_constant (X) |
159 | |
160 #define HANDLE_PRAGMA_PACK_PUSH_POP 1 | |
161 | 157 |
162 #define HAVE_PRE_DECCREMENT 1 | 158 #define HAVE_PRE_DECCREMENT 1 |
163 #define HAVE_POST_INCREMENT 1 | 159 #define HAVE_POST_INCREMENT 1 |
164 | 160 |
165 #define MOVE_RATIO(SPEED) ((SPEED) ? 4 : 2) | 161 #define MOVE_RATIO(SPEED) ((SPEED) ? 4 : 2) |
194 #define IRA_COVER_CLASSES \ | 190 #define IRA_COVER_CLASSES \ |
195 { \ | 191 { \ |
196 GR_REGS, LIM_REG_CLASSES \ | 192 GR_REGS, LIM_REG_CLASSES \ |
197 } | 193 } |
198 | 194 |
195 #define SMALL_REGISTER_CLASSES 0 | |
199 #define N_REG_CLASSES (int) LIM_REG_CLASSES | 196 #define N_REG_CLASSES (int) LIM_REG_CLASSES |
200 #define CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) \ | 197 #define CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) \ |
201 + UNITS_PER_WORD - 1) \ | 198 + UNITS_PER_WORD - 1) \ |
202 / UNITS_PER_WORD) | 199 / UNITS_PER_WORD) |
203 | 200 |
204 #define GENERAL_REGS GR_REGS | 201 #define GENERAL_REGS GR_REGS |
205 #define BASE_REG_CLASS GR_REGS | 202 #define BASE_REG_CLASS GR_REGS |
206 #define INDEX_REG_CLASS GR_REGS | 203 #define INDEX_REG_CLASS GR_REGS |
207 | 204 |
208 #define FIRST_PSEUDO_REGISTER 16 | 205 #define FIRST_PSEUDO_REGISTER 17 |
209 | 206 |
210 #define REGNO_REG_CLASS(REGNO) ((REGNO) < FIRST_PSEUDO_REGISTER \ | 207 #define REGNO_REG_CLASS(REGNO) ((REGNO) < FIRST_PSEUDO_REGISTER \ |
211 ? GR_REGS : NO_REGS) | 208 ? GR_REGS : NO_REGS) |
212 | 209 |
213 #define STACK_POINTER_REGNUM 0 | 210 #define STACK_POINTER_REGNUM 0 |
215 #define FRAME_POINTER_REGNUM 6 | 212 #define FRAME_POINTER_REGNUM 6 |
216 #define ARG_POINTER_REGNUM 7 | 213 #define ARG_POINTER_REGNUM 7 |
217 #define STATIC_CHAIN_REGNUM 8 | 214 #define STATIC_CHAIN_REGNUM 8 |
218 #define TRAMPOLINE_TEMP_REGNUM 9 | 215 #define TRAMPOLINE_TEMP_REGNUM 9 |
219 #define STRUCT_VAL_REGNUM 15 | 216 #define STRUCT_VAL_REGNUM 15 |
217 #define CC_REGNUM 16 | |
220 | 218 |
221 /* This is the register which is used to hold the address of the start | 219 /* This is the register which is used to hold the address of the start |
222 of the small data area, if that feature is being used. Note - this | 220 of the small data area, if that feature is being used. Note - this |
223 register must not be call_used because otherwise library functions | 221 register must not be call_used because otherwise library functions |
224 that are compiled without small data support might clobber it. | 222 that are compiled without small data support might clobber it. |
241 #define FUNCTION_VALUE_REGNO_P(N) ((N) == FUNC_RETURN_REGNUM) | 239 #define FUNCTION_VALUE_REGNO_P(N) ((N) == FUNC_RETURN_REGNUM) |
242 #define DEFAULT_PCC_STRUCT_RETURN 0 | 240 #define DEFAULT_PCC_STRUCT_RETURN 0 |
243 | 241 |
244 #define FIXED_REGISTERS \ | 242 #define FIXED_REGISTERS \ |
245 { \ | 243 { \ |
246 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \ | 244 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 \ |
247 } | 245 } |
248 | 246 |
249 #define CALL_USED_REGISTERS \ | 247 #define CALL_USED_REGISTERS \ |
250 { \ | 248 { \ |
251 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1 \ | 249 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1 \ |
252 } | 250 } |
253 | |
254 #define CONDITIONAL_REGISTER_USAGE \ | |
255 rx_conditional_register_usage () | |
256 | 251 |
257 #define LIBCALL_VALUE(MODE) \ | 252 #define LIBCALL_VALUE(MODE) \ |
258 gen_rtx_REG (((GET_MODE_CLASS (MODE) != MODE_INT \ | 253 gen_rtx_REG (((GET_MODE_CLASS (MODE) != MODE_INT \ |
254 || COMPLEX_MODE_P (MODE) \ | |
259 || GET_MODE_SIZE (MODE) >= 4) \ | 255 || GET_MODE_SIZE (MODE) >= 4) \ |
260 ? (MODE) \ | 256 ? (MODE) \ |
261 : SImode), \ | 257 : SImode), \ |
262 FUNC_RETURN_REGNUM) | 258 FUNC_RETURN_REGNUM) |
263 | 259 |
264 /* Order of allocation of registers. */ | 260 /* Order of allocation of registers. */ |
265 | 261 |
266 #define REG_ALLOC_ORDER \ | 262 #define REG_ALLOC_ORDER \ |
267 { 7, 10, 11, 12, 13, 14, 4, 3, 2, 1, 9, 8, 6, 5, 15 \ | 263 { 7, 10, 11, 12, 13, 14, 4, 3, 2, 1, 9, 8, 6, 5, 15 \ |
268 } | 264 } |
269 | |
270 #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS | |
271 | 265 |
272 #define REGNO_IN_RANGE(REGNO, MIN, MAX) \ | 266 #define REGNO_IN_RANGE(REGNO, MIN, MAX) \ |
273 (IN_RANGE ((REGNO), (MIN), (MAX)) \ | 267 (IN_RANGE ((REGNO), (MIN), (MAX)) \ |
274 || (reg_renumber != NULL \ | 268 || (reg_renumber != NULL \ |
275 && reg_renumber[(REGNO)] >= (MIN) \ | 269 && reg_renumber[(REGNO)] >= (MIN) \ |
292 && REGNO_IN_RANGE (REGNO (SUBREG_REG (X)), 0, 15))) \ | 286 && REGNO_IN_RANGE (REGNO (SUBREG_REG (X)), 0, 15))) \ |
293 : \ | 287 : \ |
294 ( (REG_P (X) \ | 288 ( (REG_P (X) \ |
295 || (GET_CODE (X) == SUBREG \ | 289 || (GET_CODE (X) == SUBREG \ |
296 && REG_P (SUBREG_REG (X)))))) | 290 && REG_P (SUBREG_REG (X)))))) |
297 | |
298 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \ | |
299 do \ | |
300 { \ | |
301 if (rx_is_mode_dependent_addr (ADDR)) \ | |
302 goto LABEL; \ | |
303 } \ | |
304 while (0) | |
305 | 291 |
306 | 292 |
307 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \ | 293 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \ |
308 ((COUNT) == 0 \ | 294 ((COUNT) == 0 \ |
309 ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT (-4))) \ | 295 ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT (-4))) \ |
316 typedef unsigned int CUMULATIVE_ARGS; | 302 typedef unsigned int CUMULATIVE_ARGS; |
317 | 303 |
318 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ | 304 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ |
319 (CUM) = 0 | 305 (CUM) = 0 |
320 | 306 |
321 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
322 rx_function_arg (& CUM, MODE, TYPE, NAMED) | |
323 | |
324 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
325 (CUM) += rx_function_arg_size (MODE, TYPE) | |
326 | 307 |
327 #define TRAMPOLINE_SIZE (! TARGET_BIG_ENDIAN_DATA ? 14 : 20) | 308 #define TRAMPOLINE_SIZE (! TARGET_BIG_ENDIAN_DATA ? 14 : 20) |
328 #define TRAMPOLINE_ALIGNMENT 32 | 309 #define TRAMPOLINE_ALIGNMENT 32 |
329 | 310 |
330 #define NO_PROFILE_COUNTERS 1 | 311 #define NO_PROFILE_COUNTERS 1 |
347 | 328 |
348 | 329 |
349 #define REGISTER_NAMES \ | 330 #define REGISTER_NAMES \ |
350 { \ | 331 { \ |
351 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ | 332 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ |
352 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" \ | 333 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", "cc" \ |
353 }; | 334 } |
354 | 335 |
355 #define ADDITIONAL_REGISTER_NAMES \ | 336 #define ADDITIONAL_REGISTER_NAMES \ |
356 { \ | 337 { \ |
357 { "sp", STACK_POINTER_REGNUM } \ | 338 { "sp", STACK_POINTER_REGNUM } \ |
358 , { "fp", FRAME_POINTER_REGNUM } \ | 339 , { "fp", FRAME_POINTER_REGNUM } \ |
605 | 586 |
606 /* For PIC put jump tables into the text section so that the offsets that | 587 /* For PIC put jump tables into the text section so that the offsets that |
607 they contain are always computed between two same-section symbols. */ | 588 they contain are always computed between two same-section symbols. */ |
608 #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic) | 589 #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic) |
609 | 590 |
610 #define PRINT_OPERAND(FILE, X, CODE) \ | |
611 rx_print_operand (FILE, X, CODE) | |
612 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
613 rx_print_operand_address (FILE, ADDR) | |
614 | |
615 #define CC_NO_CARRY 0400 | |
616 #define NOTICE_UPDATE_CC(EXP, INSN) rx_notice_update_cc (EXP, INSN) | |
617 | |
618 extern int rx_float_compare_mode; | |
619 | |
620 /* This is a version of REG_P that also returns TRUE for SUBREGs. */ | 591 /* This is a version of REG_P that also returns TRUE for SUBREGs. */ |
621 #define RX_REG_P(rtl) (REG_P (rtl) || GET_CODE (rtl) == SUBREG) | 592 #define RX_REG_P(rtl) (REG_P (rtl) || GET_CODE (rtl) == SUBREG) |
622 | 593 |
623 /* Like REG_P except that this macro is true for SET expressions. */ | 594 /* Like REG_P except that this macro is true for SET expressions. */ |
624 #define SET_P(rtl) (GET_CODE (rtl) == SET) | 595 #define SET_P(rtl) (GET_CODE (rtl) == SET) |
625 | 596 |
626 #define CAN_DEBUG_WITHOUT_FP 1 | |
627 | |
628 /* The AS100 assembler does not support .leb128 and .uleb128, but | 597 /* The AS100 assembler does not support .leb128 and .uleb128, but |
629 the compiler-build-time configure tests will have enabled their | 598 the compiler-build-time configure tests will have enabled their |
630 use because GAS supports them. So default to generating STABS | 599 use because GAS supports them. So default to generating STABS |
631 debug information instead of DWARF2 when generating AS100 | 600 debug information instead of DWARF2 when generating AS100 |
632 compatible output. */ | 601 compatible output. */ |
636 | 605 |
637 #define INCOMING_FRAME_SP_OFFSET 4 | 606 #define INCOMING_FRAME_SP_OFFSET 4 |
638 #define ARG_POINTER_CFA_OFFSET(FNDECL) 4 | 607 #define ARG_POINTER_CFA_OFFSET(FNDECL) 4 |
639 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 4 | 608 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 4 |
640 | 609 |
641 /* Translate -nofpu into -mnofpu so that it gets passed from gcc to cc1. */ | |
642 #define TARGET_OPTION_TRANSLATE_TABLE \ | |
643 {"-nofpu", "-mnofpu" } | |
644 | |
645 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \ | |
646 rx_set_optimization_options () | |
647 | |
648 #define TARGET_USE_FPU (! TARGET_NO_USE_FPU) | 610 #define TARGET_USE_FPU (! TARGET_NO_USE_FPU) |
649 | 611 |
650 /* This macro is used to decide when RX FPU instructions can be used. */ | 612 /* This macro is used to decide when RX FPU instructions can be used. */ |
651 #define ALLOW_RX_FPU_INSNS (TARGET_USE_FPU) | 613 #define ALLOW_RX_FPU_INSNS (TARGET_USE_FPU) |
614 | |
615 #define BRANCH_COST(SPEED,PREDICT) 1 | |
616 #define REGISTER_MOVE_COST(MODE,FROM,TO) 2 | |
617 | |
618 #define SELECT_CC_MODE(OP,X,Y) rx_select_cc_mode(OP, X, Y) |