CbC/CbC_gcc: gcc/haifa-sched.c comparison

comparison gcc/haifa-sched.c @ 67:f6334be47118

update gcc from gcc-4.6-20100522 to gcc-4.6-20110318

author	nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
date	Tue, 22 Mar 2011 17:18:12 +0900
parents	b7f97abdc517
children	04ced10e8804

comparison

equal deleted inserted replaced

-:65488c3d617d
+:f6334be47118
 #include "config.h"
 #include "system.h"
 #include "coretypes.h"
 #include "tm.h"
-#include "toplev.h"
+#include "diagnostic-core.h"
 #include "rtl.h"
 #include "tm_p.h"
 #include "hard-reg-set.h"
 #include "regs.h"
 #include "function.h"
 #include "flags.h"
 #include "insn-config.h"
 #include "insn-attr.h"
 #include "except.h"
-#include "toplev.h"
 #include "recog.h"
 #include "sched-int.h"
 #include "target.h"
 #include "output.h"
 #include "params.h"
 #include "vecprim.h"
 #include "dbgcnt.h"
 #include "cfgloop.h"
 #include "ira.h"
+#include "emit-rtl.h"  /* FIXME: Can go away once crtl is moved to rtl.h.  */
 #ifdef INSN_SCHEDULING
 /* issue_rate is the number of insns that can be scheduled in the same
 machine cycle.  It can be defined in the config/mach/mach.h file,
 N=1: same as -dSR.
 N=2: bb's probabilities, detailed ready list info, unit/insn info.
 N=3: rtl at abort point, control-flow, regions info.
 N=5: dependences info.  */
-static int sched_verbose_param = 0;
 int sched_verbose = 0;
 /* Debugging file.  All printouts are sent to dump, which is always set,
 either to stderr, or to the dump listing file (-dRS).  */
 FILE *sched_dump = 0;
-/* fix_sched_param() is called from toplev.c upon detection
-of the -fsched-verbose=N option.  */
-void
-fix_sched_param (const char *param, const char *val)
-{
-if (!strcmp (param, "verbose"))
-sched_verbose_param = atoi (val);
-else
-warning (0, "fix_sched_param: unknown param: %s", param);
-}
 /* This is a placeholder for the scheduler parameters common
 to all schedulers.  */
 struct common_sched_info_def *common_sched_info;
 /* If INSN_TICK of an instruction is equal to INVALID_TICK,
 then it should be recalculated from scratch.  */
 #define INVALID_TICK (-(max_insn_queue_index + 1))
 /* The minimal value of the INSN_TICK of an instruction.  */
 #define MIN_TICK (-max_insn_queue_index)
-/* Issue points are used to distinguish between instructions in max_issue ().
-For now, all instructions are equally good.  */
-#define ISSUE_POINTS(INSN) 1
 /* List of important notes we must keep around.  This is a pointer to the
 last element in the list.  */
 rtx note_list;
 unlink_other_notes ()).  After scheduling the block, these notes are
 inserted at the beginning of the block (in schedule_block()).  */
 static void ready_add (struct ready_list *, rtx, bool);
 static rtx ready_remove_first (struct ready_list *);
+static rtx ready_remove_first_dispatch (struct ready_list *ready);
 static void queue_to_ready (struct ready_list *);
 static int early_queue_to_ready (state_t, struct ready_list *);
 static void debug_ready_list (struct ready_list *);
 /* The following functions are used to implement multi-pass scheduling
 on the first cycle.  */
 static rtx ready_remove (struct ready_list *, int);
 static void ready_remove_insn (rtx);
-static int choose_ready (struct ready_list *, rtx *);
 static void fix_inter_tick (rtx, rtx);
 static int fix_tick_ready (rtx);
 static void change_queue_index (rtx, int);
 /* Initiate current register pressure related info at the start of
 basic block BB.  */
 static void
 initiate_bb_reg_pressure_info (basic_block bb)
 {
-unsigned int i;
+unsigned int i ATTRIBUTE_UNUSED;
 rtx insn;
 if (current_nr_blocks > 1)
 FOR_BB_INSNS (bb, insn)
 if (NONDEBUG_INSN_P (insn))
 enum reg_class cl;
 struct reg_pressure_data *pressure_info;
 int *max_reg_pressure;
 struct reg_use_data *use;
 static int death[N_REG_CLASSES];
+gcc_checking_assert (!DEBUG_INSN_P (insn));
 excess_cost_change = 0;
 for (i = 0; i < ira_reg_class_cover_size; i++)
 death[ira_reg_class_cover[i]] = 0;
 for (use = INSN_REG_USE_LIST (insn); use != NULL; use = use->next_insn_use)
 rtx *first = ready_lastpos (ready);
 if (sched_pressure_p)
 {
 for (i = 0; i < ready->n_ready; i++)
-	setup_insn_reg_pressure_info (first[i]);
+	if (!DEBUG_INSN_P (first[i]))
+	  setup_insn_reg_pressure_info (first[i]);
 }
 SCHED_SORT (first, ready->n_ready);
 }
 /* PREV is an insn that is ready to execute.  Adjust its priority if that
 static void
 update_register_pressure (rtx insn)
 {
 struct reg_use_data *use;
 struct reg_set_data *set;
+gcc_checking_assert (!DEBUG_INSN_P (insn));
 for (use = INSN_REG_USE_LIST (insn); use != NULL; use = use->next_insn_use)
 if (dying_use_p (use) && bitmap_bit_p (curr_reg_live, use->regno))
 mark_regno_birth_or_death (use->regno, false);
 for (set = INSN_REG_SET_LIST (insn); set != NULL; set = set->next_insn_set)
 		     pressure_info[i].set_increase, pressure_info[i].change);
 	}
 fputc ('\n', sched_dump);
 }
-if (sched_pressure_p)
+if (sched_pressure_p && !DEBUG_INSN_P (insn))
 update_reg_and_insn_max_reg_pressure (insn);
 /* Scheduling instruction should have all its dependencies resolved and
 should have been removed from the ready list.  */
 gcc_assert (sd_lists_empty_p (insn, SD_LIST_BACK));
 /* This is the place where scheduler doesn't *basically* need backward and
 forward dependencies for INSN anymore.  Nevertheless they are used in
 heuristics in rank_for_schedule (), early_queue_to_ready () and in
 some targets (e.g. rs6000).  Thus the earliest place where we *can*
-remove dependencies is after targetm.sched.md_finish () call in
+remove dependencies is after targetm.sched.finish () call in
 schedule_block ().  But, on the other side, the safest place to remove
 dependencies is when we are finishing scheduling entire region.  As we
 don't generate [many] dependencies during scheduling itself, we won't
 need memory until beginning of next region.
 Bottom line: Dependencies are removed for all insns in the end of
 if (LABEL_P (beg_head))
 beg_head = NEXT_INSN (beg_head);
 while (beg_head != beg_tail)
-if (NOTE_P (beg_head) || BOUNDARY_DEBUG_INSN_P (beg_head))
+if (NOTE_P (beg_head))
 beg_head = NEXT_INSN (beg_head);
+else if (DEBUG_INSN_P (beg_head))
+{
+	rtx note, next;
+	for (note = NEXT_INSN (beg_head);
+	     note != beg_tail;
+	     note = next)
+	  {
+	    next = NEXT_INSN (note);
+	    if (NOTE_P (note))
+	      {
+		if (sched_verbose >= 9)
+		  fprintf (sched_dump, "reorder %i\n", INSN_UID (note));
+		reorder_insns_nobb (note, note, PREV_INSN (beg_head));
+		if (BLOCK_FOR_INSN (note) != beg)
+		  df_insn_change_bb (note, beg);
+	      }
+	    else if (!DEBUG_INSN_P (note))
+	      break;
+	  }
+	break;
+}
 else
 break;
 *headp = beg_head;
 end_head = beg_head;
 else if (LABEL_P (end_head))
 end_head = NEXT_INSN (end_head);
 while (end_head != end_tail)
-if (NOTE_P (end_tail) || BOUNDARY_DEBUG_INSN_P (end_tail))
+if (NOTE_P (end_tail))
 end_tail = PREV_INSN (end_tail);
+else if (DEBUG_INSN_P (end_tail))
+{
+	rtx note, prev;
+	for (note = PREV_INSN (end_tail);
+	     note != end_head;
+	     note = prev)
+	  {
+	    prev = PREV_INSN (note);
+	    if (NOTE_P (note))
+	      {
+		if (sched_verbose >= 9)
+		  fprintf (sched_dump, "reorder %i\n", INSN_UID (note));
+		reorder_insns_nobb (note, note, end_tail);
+		if (end_tail == BB_END (end))
+		  BB_END (end) = note;
+		if (BLOCK_FOR_INSN (note) != end)
+		  df_insn_change_bb (note, end);
+	      }
+	    else if (!DEBUG_INSN_P (note))
+	      break;
+	  }
+	break;
+}
 else
 break;
 *tailp = end_tail;
 }
 int
 no_real_insns_p (const_rtx head, const_rtx tail)
 {
 while (head != NEXT_INSN (tail))
 {
-if (!NOTE_P (head) && !LABEL_P (head)
+if (!NOTE_P (head) && !LABEL_P (head))
-	  && !BOUNDARY_DEBUG_INSN_P (head))
 	return 0;
 head = NEXT_INSN (head);
 }
 return 1;
 }
 rtx skip_insn;
 q_ptr = NEXT_Q (q_ptr);
 if (dbg_cnt (sched_insn) == false)
-{
+/* If debug counter is activated do not requeue insn next after
-/* If debug counter is activated do not requeue insn next after
+last_scheduled_insn.  */
-	 last_scheduled_insn.  */
+skip_insn = next_nonnote_nondebug_insn (last_scheduled_insn);
-skip_insn = next_nonnote_insn (last_scheduled_insn);
-while (skip_insn && DEBUG_INSN_P (skip_insn))
-	skip_insn = next_nonnote_insn (skip_insn);
-}
 else
 skip_insn = NULL_RTX;
 /* Add all pending insns that can be scheduled without stalls to the
 ready list.  */
 return true;
 return false;
 }
+/* Define type for target data used in multipass scheduling.  */
+#ifndef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DATA_T
+# define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DATA_T int
+#endif
+typedef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DATA_T first_cycle_multipass_data_t;
 /* The following structure describe an entry of the stack of choices.  */
 struct choice_entry
 {
 /* Ordinal number of the issued insn in the ready queue.  */
 int index;
 int rest;
 /* The number of issued essential insns.  */
 int n;
 /* State after issuing the insn.  */
 state_t state;
+/* Target-specific data.  */
+first_cycle_multipass_data_t target_data;
 };
 /* The following array is used to implement a stack of choices used in
 function max_issue.  */
 static struct choice_entry *choice_stack;
 /* The following function returns maximal (or close to maximal) number
 of insns which can be issued on the same cycle and one of which
 insns is insns with the best rank (the first insn in READY).  To
 make this function tries different samples of ready insns.  READY
 is current queue `ready'.  Global array READY_TRY reflects what
-insns are already issued in this try.  MAX_POINTS is the sum of points
+insns are already issued in this try.  The function stops immediately,
-of all instructions in READY.  The function stops immediately,
 if it reached the such a solution, that all instruction can be issued.
 INDEX will contain index of the best insn in READY.  The following
 function is used only for first cycle multipass scheduling.
 PRIVILEGED_N >= 0
 This function expects recognized insns only.  All USEs,
 CLOBBERs, etc must be filtered elsewhere.  */
 int
 max_issue (struct ready_list *ready, int privileged_n, state_t state,
-	   int *index)
+	   bool first_cycle_insn_p, int *index)
 {
-int n, i, all, n_ready, best, delay, tries_num, max_points;
+int n, i, all, n_ready, best, delay, tries_num;
 int more_issue;
 struct choice_entry *top;
 rtx insn;
 n_ready = ready->n_ready;
 for (i = 0; i < issue_rate; i++)
 	max_lookahead_tries *= dfa_lookahead;
 }
 /* Init max_points.  */
-max_points = 0;
 more_issue = issue_rate - cycle_issued_insns;
+gcc_assert (more_issue >= 0);
-/* ??? We used to assert here that we never issue more insns than issue_rate.
-However, some targets (e.g. MIPS/SB1) claim lower issue rate than can be
-achieved to get better performance.  Until these targets are fixed to use
-scheduler hooks to manipulate insns priority instead, the assert should
-be disabled.
-gcc_assert (more_issue >= 0);  */
-for (i = 0; i < n_ready; i++)
-if (!ready_try [i])
-{
-	if (more_issue-- > 0)
-	  max_points += ISSUE_POINTS (ready_element (ready, i));
-	else
-	  break;
-}
 /* The number of the issued insns in the best solution.  */
 best = 0;
 top = choice_stack;
 /* Set initial state of the search.  */
 memcpy (top->state, state, dfa_state_size);
 top->rest = dfa_lookahead;
 top->n = 0;
+if (targetm.sched.first_cycle_multipass_begin)
+targetm.sched.first_cycle_multipass_begin (&top->target_data,
+					       ready_try, n_ready,
+					       first_cycle_insn_p);
 /* Count the number of the insns to search among.  */
 for (all = i = 0; i < n_ready; i++)
 if (!ready_try [i])
 all++;
 for (;;)
 {
 if (/* If we've reached a dead end or searched enough of what we have
 	     been asked...  */
 	  top->rest == 0
-	  /* Or have nothing else to try.  */
+	  /* or have nothing else to try...  */
-	  || i >= n_ready)
+	  || i >= n_ready
+	  /* or should not issue more.  */
+	  || top->n >= more_issue)
 	{
 	  /* ??? (... || i == n_ready).  */
 	  gcc_assert (i <= n_ready);
+	  /* We should not issue more than issue_rate instructions.  */
+	  gcc_assert (top->n <= more_issue);
 	  if (top == choice_stack)
 	    break;
 	  if (best < top - choice_stack)
 		{
 		  best = top - choice_stack;
 		  /* This is the index of the insn issued first in this
 		     solution.  */
 		  *index = choice_stack [1].index;
-		  if (top->n == max_points || best == all)
+		  if (top->n == more_issue || best == all)
 		    break;
 		}
 	    }
 	  /* Set ready-list index to point to the last insn
 	     ('i++' below will advance it to the next insn).  */
 	  i = top->index;
 	  /* Backtrack.  */
 	  ready_try [i] = 0;
+	  if (targetm.sched.first_cycle_multipass_backtrack)
+	    targetm.sched.first_cycle_multipass_backtrack (&top->target_data,
+							   ready_try, n_ready);
 	  top--;
 	  memcpy (state, top->state, dfa_state_size);
 	}
 else if (!ready_try [i])
 	{
 	      else
 		top->rest--;
 	      n = top->n;
 	      if (memcmp (top->state, state, dfa_state_size) != 0)
-		n += ISSUE_POINTS (insn);
+		n++;
 	      /* Advance to the next choice_entry.  */
 	      top++;
 	      /* Initialize it.  */
 	      top->rest = dfa_lookahead;
 	      top->index = i;
 	      top->n = n;
 	      memcpy (top->state, state, dfa_state_size);
 	      ready_try [i] = 1;
+	      if (targetm.sched.first_cycle_multipass_issue)
+		targetm.sched.first_cycle_multipass_issue (&top->target_data,
+							   ready_try, n_ready,
+							   insn,
+							   &((top - 1)
+							     ->target_data));
 	      i = -1;
 	    }
 	}
 /* Increase ready-list index.  */
 i++;
 }
+if (targetm.sched.first_cycle_multipass_end)
+targetm.sched.first_cycle_multipass_end (best != 0
+					     ? &choice_stack[1].target_data
+					     : NULL);
 /* Restore the original state of the DFA.  */
 memcpy (state, choice_stack->state, dfa_state_size);
 return best;
 Return:
 -1 if cycle should be advanced,
 0 if INSN_PTR is set to point to the desirable insn,
 1 if choose_ready () should be restarted without advancing the cycle.  */
 static int
-choose_ready (struct ready_list *ready, rtx *insn_ptr)
+choose_ready (struct ready_list *ready, bool first_cycle_insn_p,
+	      rtx *insn_ptr)
 {
 int lookahead;
 if (dbg_cnt (sched_insn) == false)
 {
 if (targetm.sched.first_cycle_multipass_dfa_lookahead)
 lookahead = targetm.sched.first_cycle_multipass_dfa_lookahead ();
 if (lookahead <= 0 || SCHED_GROUP_P (ready_element (ready, 0))
 || DEBUG_INSN_P (ready_element (ready, 0)))
 {
-*insn_ptr = ready_remove_first (ready);
+if (targetm.sched.dispatch (NULL_RTX, IS_DISPATCH_ON))
+	*insn_ptr = ready_remove_first_dispatch (ready);
+else
+	*insn_ptr = ready_remove_first (ready);
 return 0;
 }
 else
 {
 /* Try to choose the better insn.  */
 for (i = 1; i < ready->n_ready; i++)
 	if (!ready_try[i])
 	  {
 	    insn = ready_element (ready, i);
-#ifdef ENABLE_CHECKING
 	    /* If this insn is recognizable we should have already
 	       recognized it earlier.
 	       ??? Not very clear where this is supposed to be done.
 	       See dep_cost_1.  */
-	    gcc_assert (INSN_CODE (insn) >= 0
+	    gcc_checking_assert (INSN_CODE (insn) >= 0
-			|| recog_memoized (insn) < 0);
+				 || recog_memoized (insn) < 0);
-#endif
 	    ready_try [i]
 	      = (/* INSN_CODE check can be omitted here as it is also done later
 		    in max_issue ().  */
 		 INSN_CODE (insn) < 0
 		 || (targetm.sched.first_cycle_multipass_dfa_lookahead_guard
 		     && !targetm.sched.first_cycle_multipass_dfa_lookahead_guard
 		     (insn)));
 	  }
-if (max_issue (ready, 1, curr_state, &index) == 0)
+if (max_issue (ready, 1, curr_state, first_cycle_insn_p, &index) == 0)
 	{
 	  *insn_ptr = ready_remove_first (ready);
 	  if (sched_verbose >= 4)
 	    fprintf (sched_dump, ";;\t\tChosen insn (but can't issue) : %s \n",
 (*current_sched_info->print_insn) (*insn_ptr, 0));
 region.  */
 void
 schedule_block (basic_block *target_bb)
 {
-int i, first_cycle_insn_p;
+int i;
+bool first_cycle_insn_p;
 int can_issue_more;
 state_t temp_state = NULL;  /* It is used for multipass scheduling.  */
 int sort_p, advance, start_clock_var;
 /* Head/tail info for this block.  */
 ready.n_debug = 0;
 /* It is used for first cycle multipass scheduling.  */
 temp_state = alloca (dfa_state_size);
-if (targetm.sched.md_init)
+if (targetm.sched.init)
-targetm.sched.md_init (sched_dump, sched_verbose, ready.veclen);
+targetm.sched.init (sched_dump, sched_verbose, ready.veclen);
 /* We start inserting insns after PREV_HEAD.  */
 last_scheduled_insn = prev_head;
 gcc_assert ((NOTE_P (last_scheduled_insn)
-	       || BOUNDARY_DEBUG_INSN_P (last_scheduled_insn))
+	       || DEBUG_INSN_P (last_scheduled_insn))
 	      && BLOCK_FOR_INSN (last_scheduled_insn) == *target_bb);
 /* Initialize INSN_QUEUE.  Q_SIZE is the total number of insns in the
 queue.  */
 q_ptr = 0;
 				 ready_lastpos (&ready),
 				 &ready.n_ready, clock_var);
 else
 	can_issue_more = issue_rate;
-first_cycle_insn_p = 1;
+first_cycle_insn_p = true;
 cycle_issued_insns = 0;
 for (;;)
 	{
 	  rtx insn;
 	  int cost;
 	  if (sort_p)
 	    {
 	      int res;
 	      insn = NULL_RTX;
-	      res = choose_ready (&ready, &insn);
+	      res = choose_ready (&ready, first_cycle_insn_p, &insn);
 	      if (res < 0)
 		/* Finish cycle.  */
 		break;
 	      if (res > 0)
 	  /* Update counters, etc in the scheduler's front end.  */
 	  (*current_sched_info->begin_schedule_ready) (insn,
 						       last_scheduled_insn);
 	  move_insn (insn, last_scheduled_insn, current_sched_info->next_tail);
+	  if (targetm.sched.dispatch (NULL_RTX, IS_DISPATCH_ON))
+	    targetm.sched.dispatch_do (insn, ADD_TO_DISPATCH_WINDOW);
 	  reemit_notes (insn);
 	  last_scheduled_insn = insn;
 	  if (memcmp (curr_state, temp_state, dfa_state_size) != 0)
 {
 	  if (advance == 0 && asm_p)
 	    advance = 1;
 	  if (advance != 0)
 	    break;
-	  first_cycle_insn_p = 0;
+	  first_cycle_insn_p = false;
 	  /* Sort the ready list based on priority.  This must be
 	     redone here, as schedule_insn may have readied additional
 	     insns that will not be sorted correctly.  */
 	  if (ready.n_ready > 0)
 clock_var value equal to 0 at the start of a basic block.
 Therefore we modify INSN_TICK here.  */
 fix_inter_tick (NEXT_INSN (prev_head), last_scheduled_insn);
 }
-if (targetm.sched.md_finish)
+if (targetm.sched.finish)
 {
-targetm.sched.md_finish (sched_dump, sched_verbose);
+targetm.sched.finish (sched_dump, sched_verbose);
 /* Target might have added some instructions to the scheduled block
 	 in its md_finish () hook.  These new insns don't have any data
 	 initialized and to identify them we extend h_i_d so that they'll
 	 get zero luids.  */
 sched_init_luids (NULL, NULL, NULL, NULL);
 int n_insn;
 int sched_max_insns_priority =
 	current_sched_info->sched_max_insns_priority;
 rtx prev_head;
-if (head == tail && (! INSN_P (head) || BOUNDARY_DEBUG_INSN_P (head)))
+if (head == tail && ! INSN_P (head))
 gcc_unreachable ();
 n_insn = 0;
 prev_head = PREV_INSN (head);
 /* Disable speculative loads in their presence if cc0 defined.  */
 #ifdef HAVE_cc0
 flag_schedule_speculative_load = 0;
 #endif
+if (targetm.sched.dispatch (NULL_RTX, IS_DISPATCH_ON))
+targetm.sched.dispatch_do (NULL_RTX, DISPATCH_INIT);
 sched_pressure_p = (flag_sched_pressure && ! reload_completed
 		      && common_sched_info->sched_pass_id == SCHED_RGN_PASS);
 if (sched_pressure_p)
 ira_setup_eliminable_regset ();
 /* Initialize SPEC_INFO.  */
 if (targetm.sched.set_sched_flags)
 if (reload_completed)
 df_clear_flags (DF_LR_RUN_DCE);
 regstat_compute_calls_crossed ();
-if (targetm.sched.md_init_global)
+if (targetm.sched.init_global)
-targetm.sched.md_init_global (sched_dump, sched_verbose,
+targetm.sched.init_global (sched_dump, sched_verbose, get_max_uid () + 1);
-				  get_max_uid () + 1);
 if (sched_pressure_p)
 {
 int i, max_regno = max_reg_num ();
 BITMAP_FREE (saved_reg_live);
 BITMAP_FREE (curr_reg_live);
 }
 free (curr_state);
-if (targetm.sched.md_finish_global)
+if (targetm.sched.finish_global)
-targetm.sched.md_finish_global (sched_dump, sched_verbose);
+targetm.sched.finish_global (sched_dump, sched_verbose);
 end_alias_analysis ();
 regstat_free_calls_crossed ();
 	  tick = INSN_TICK (head);
 	  gcc_assert (tick >= MIN_TICK);
 	  /* Fix INSN_TICK of instruction from just scheduled block.  */
-	  if (!bitmap_bit_p (&processed, INSN_LUID (head)))
+	  if (bitmap_set_bit (&processed, INSN_LUID (head)))
 	    {
-	      bitmap_set_bit (&processed, INSN_LUID (head));
 	      tick -= next_clock;
 	      if (tick < MIN_TICK)
 		tick = MIN_TICK;
 	      if (tick != INVALID_TICK
 		  /* If NEXT has its INSN_TICK calculated, fix it.
 		     If not - it will be properly calculated from
 		     scratch later in fix_tick_ready.  */
-		  && !bitmap_bit_p (&processed, INSN_LUID (next)))
+		  && bitmap_set_bit (&processed, INSN_LUID (next)))
 		{
-		  bitmap_set_bit (&processed, INSN_LUID (next));
 		  tick -= next_clock;
 		  if (tick < MIN_TICK)
 		    tick = MIN_TICK;
 static int
 fix_tick_ready (rtx next)
 {
 int tick, delay;
-if (!sd_lists_empty_p (next, SD_LIST_RES_BACK))
+if (!DEBUG_INSN_P (next) && !sd_lists_empty_p (next, SD_LIST_RES_BACK))
 {
 int full_p;
 sd_iterator_def sd_it;
 dep_t dep;
 entry.  */
 choice_stack = XRESIZEVEC (struct choice_entry, choice_stack,
 			     new_sched_ready_n_insns + 1);
 for (; i <= new_sched_ready_n_insns; i++)
-choice_stack[i].state = xmalloc (dfa_state_size);
+{
+choice_stack[i].state = xmalloc (dfa_state_size);
+if (targetm.sched.first_cycle_multipass_init)
+	targetm.sched.first_cycle_multipass_init (&(choice_stack[i]
+						    .target_data));
+}
 sched_ready_n_insns = new_sched_ready_n_insns;
 }
 /* Free per region data structures.  */
 free (ready_try);
 ready_try = NULL;
 for (i = 0; i <= sched_ready_n_insns; i++)
-free (choice_stack [i].state);
+{
+if (targetm.sched.first_cycle_multipass_fini)
+	targetm.sched.first_cycle_multipass_fini (&(choice_stack[i]
+						    .target_data));
+free (choice_stack [i].state);
+}
 free (choice_stack);
 choice_stack = NULL;
 sched_ready_n_insns = -1;
 }
 }
 /* Helper function.
 Find fallthru edge from PRED.  */
 edge
-find_fallthru_edge (basic_block pred)
+find_fallthru_edge_from (basic_block pred)
 {
 edge e;
-edge_iterator ei;
 basic_block succ;
 succ = pred->next_bb;
 gcc_assert (succ->prev_bb == pred);
 if (EDGE_COUNT (pred->succs) <= EDGE_COUNT (succ->preds))
 {
-FOR_EACH_EDGE (e, ei, pred->succs)
+e = find_fallthru_edge (pred->succs);
-	if (e->flags & EDGE_FALLTHRU)
-	  {
+if (e)
-	    gcc_assert (e->dest == succ);
+	{
-	    return e;
+	  gcc_assert (e->dest == succ);
-	  }
+	  return e;
+	}
 }
 else
 {
-FOR_EACH_EDGE (e, ei, succ->preds)
+e = find_fallthru_edge (succ->preds);
-	if (e->flags & EDGE_FALLTHRU)
-	  {
+if (e)
-	    gcc_assert (e->src == pred);
+	{
-	    return e;
+	  gcc_assert (e->src == pred);
-	  }
+	  return e;
+	}
 }
 return NULL;
 }
 {
 basic_block last;
 edge e;
 last = EXIT_BLOCK_PTR->prev_bb;
-e = find_fallthru_edge (last);
+e = find_fallthru_edge_from (last);
 if (e)
 {
 /* We create two basic blocks:
 1. Single instruction block is inserted right after E->SRC
 }
 else
 edge_flags = 0;
 make_single_succ_edge (rec, second_bb, edge_flags);
+if (dom_info_available_p (CDI_DOMINATORS))
+set_immediate_dominator (CDI_DOMINATORS, rec, first_bb);
 }
 /* This function creates recovery code for INSN.  If MUTATE_P is nonzero,
 INSN is a simple check, that should be converted to branchy one.  */
 static void
 	  if (BLOCK_FOR_INSN (consumer) != rec)
 	    {
 	      sd_delete_dep (sd_it);
-	      if (!bitmap_bit_p (&in_ready, INSN_LUID (consumer)))
+	      if (bitmap_set_bit (&in_ready, INSN_LUID (consumer)))
-		{
+		ready_list = alloc_INSN_LIST (consumer, ready_list);
-		  ready_list = alloc_INSN_LIST (consumer, ready_list);
-		  bitmap_set_bit (&in_ready, INSN_LUID (consumer));
-		}
 	    }
 	  else
 	    {
 	      gcc_assert ((DEP_STATUS (dep) & DEP_TYPES) == DEP_TRUE);
 calc_priorities (rtx_vec_t roots)
 {
 int i;
 rtx insn;
-for (i = 0; VEC_iterate (rtx, roots, i, insn); i++)
+FOR_EACH_VEC_ELT (rtx, roots, i, insn)
 priority (insn);
 }
 /* Add dependences between JUMP and other instructions in the recovery
 if (bbs != NULL)
 	{
 	  unsigned i;
 	  basic_block x;
-	  for (i = 0; VEC_iterate (basic_block, bbs, i, x); i++)
+	  FOR_EACH_VEC_ELT (basic_block, bbs, i, x)
 	    init_bb (x);
 	}
 if (bb != NULL)
 	init_bb (bb);
 if (bbs != NULL)
 {
 unsigned i;
 basic_block x;
-for (i = 0; VEC_iterate (basic_block, bbs, i, x); i++)
+FOR_EACH_VEC_ELT (basic_block, bbs, i, x)
 	init_insns_in_bb (x);
 }
 if (bb != NULL)
 init_insns_in_bb (bb);
 if (insns != NULL)
 {
 unsigned i;
 rtx x;
-for (i = 0; VEC_iterate (rtx, insns, i, x); i++)
+FOR_EACH_VEC_ELT (rtx, insns, i, x)
 	init_insn (x);
 }
 if (insn != NULL)
 init_insn (insn);
 {
 int i;
 haifa_insn_data_t data;
 struct reg_use_data *use, *next;
-for (i = 0; VEC_iterate (haifa_insn_data_def, h_i_d, i, data); i++)
+FOR_EACH_VEC_ELT (haifa_insn_data_def, h_i_d, i, data)
 {
 if (data->reg_pressure != NULL)
 	free (data->reg_pressure);
 for (use = data->reg_use_list; use != NULL; use = next)
 	{
 last_scheduled_insn = insn;
 haifa_init_insn (insn);
 return insn;
 }
+/* This function returns a candidate satisfying dispatch constraints from
+the ready list.  */
+static rtx
+ready_remove_first_dispatch (struct ready_list *ready)
+{
+int i;
+rtx insn = ready_element (ready, 0);
+if (ready->n_ready == 1
+|| INSN_CODE (insn) < 0
+|| !INSN_P (insn)
+|| !active_insn_p (insn)
+|| targetm.sched.dispatch (insn, FITS_DISPATCH_WINDOW))
+return ready_remove_first (ready);
+for (i = 1; i < ready->n_ready; i++)
+{
+insn = ready_element (ready, i);
+if (INSN_CODE (insn) < 0
+	  || !INSN_P (insn)
+	  || !active_insn_p (insn))
+	continue;
+if (targetm.sched.dispatch (insn, FITS_DISPATCH_WINDOW))
+	{
+	  /* Return ith element of ready.  */
+	  insn = ready_remove (ready, i);
+	  return insn;
+	}
+}
+if (targetm.sched.dispatch (NULL_RTX, DISPATCH_VIOLATION))
+return ready_remove_first (ready);
+for (i = 1; i < ready->n_ready; i++)
+{
+insn = ready_element (ready, i);
+if (INSN_CODE (insn) < 0
+	  || !INSN_P (insn)
+	  || !active_insn_p (insn))
+	continue;
+/* Return i-th element of ready.  */
+if (targetm.sched.dispatch (insn, IS_CMP))
+	return ready_remove (ready, i);
+}
+return ready_remove_first (ready);
+}
+/* Get number of ready insn in the ready list.  */
+int
+number_in_ready (void)
+{
+return ready.n_ready;
+}
+/* Get number of ready's in the ready list.  */
+rtx
+get_ready_element (int i)
+{
+return ready_element (&ready, i);
+}
 #endif /* INSN_SCHEDULING */

Mercurial > hg > CbC > CbC_gcc

comparison gcc/haifa-sched.c @ 67:f6334be47118