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comparison gcc/mode-switching.c @ 67:f6334be47118

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update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
author nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
date Tue, 22 Mar 2011 17:18:12 +0900
parents b7f97abdc517
children 04ced10e8804
comparison
equal deleted inserted replaced
65:65488c3d617d 67:f6334be47118
1 /* CPU mode switching 1 /* CPU mode switching
2 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008,
3 2009 Free Software Foundation, Inc. 3 2009, 2010 Free Software Foundation, Inc.
4 4
5 This file is part of GCC. 5 This file is part of GCC.
6 6
7 GCC is free software; you can redistribute it and/or modify it under 7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free 8 the terms of the GNU General Public License as published by the Free
34 #include "tm_p.h" 34 #include "tm_p.h"
35 #include "function.h" 35 #include "function.h"
36 #include "tree-pass.h" 36 #include "tree-pass.h"
37 #include "timevar.h" 37 #include "timevar.h"
38 #include "df.h" 38 #include "df.h"
39 #include "emit-rtl.h"
39 40
40 /* We want target macros for the mode switching code to be able to refer 41 /* We want target macros for the mode switching code to be able to refer
41 to instruction attribute values. */ 42 to instruction attribute values. */
42 #include "insn-attr.h" 43 #include "insn-attr.h"
43 44
384 return register is likely spilled, we can expect that there 385 return register is likely spilled, we can expect that there
385 is a copy for the likely spilled part. */ 386 is a copy for the likely spilled part. */
386 gcc_assert (!nregs 387 gcc_assert (!nregs
387 || forced_late_switch 388 || forced_late_switch
388 || short_block 389 || short_block
389 || !(CLASS_LIKELY_SPILLED_P 390 || !(targetm.class_likely_spilled_p
390 (REGNO_REG_CLASS (ret_start))) 391 (REGNO_REG_CLASS (ret_start)))
391 || (nregs 392 || (nregs
392 != hard_regno_nregs[ret_start][GET_MODE (ret_reg)]) 393 != hard_regno_nregs[ret_start][GET_MODE (ret_reg)])
393 /* For multi-hard-register floating point 394 /* For multi-hard-register floating point
394 values, sometimes the likely-spilled part 395 values, sometimes the likely-spilled part
442 int entity_map[N_ENTITIES]; 443 int entity_map[N_ENTITIES];
443 struct bb_info *bb_info[N_ENTITIES]; 444 struct bb_info *bb_info[N_ENTITIES];
444 int i, j; 445 int i, j;
445 int n_entities; 446 int n_entities;
446 int max_num_modes = 0; 447 int max_num_modes = 0;
447 bool emited = false; 448 bool emited ATTRIBUTE_UNUSED = false;
448 basic_block post_entry ATTRIBUTE_UNUSED, pre_exit ATTRIBUTE_UNUSED; 449 basic_block post_entry ATTRIBUTE_UNUSED, pre_exit ATTRIBUTE_UNUSED;
449 450
450 for (e = N_ENTITIES - 1, n_entities = 0; e >= 0; e--) 451 for (e = N_ENTITIES - 1, n_entities = 0; e >= 0; e--)
451 if (OPTIMIZE_MODE_SWITCHING (e)) 452 if (OPTIMIZE_MODE_SWITCHING (e))
452 { 453 {
515 add_seginfo (info + bb->index, ptr); 516 add_seginfo (info + bb->index, ptr);
516 RESET_BIT (transp[bb->index], j); 517 RESET_BIT (transp[bb->index], j);
517 } 518 }
518 } 519 }
519 520
520 for (insn = BB_HEAD (bb); 521 FOR_BB_INSNS (bb, insn)
521 insn != NULL && insn != NEXT_INSN (BB_END (bb));
522 insn = NEXT_INSN (insn))
523 { 522 {
524 if (INSN_P (insn)) 523 if (INSN_P (insn))
525 { 524 {
526 int mode = MODE_NEEDED (e, insn); 525 int mode = MODE_NEEDED (e, insn);
527 rtx link; 526 rtx link;