Mercurial > hg > CbC > CbC_gcc
diff gcc/config/i386/smmintrin.h @ 111:04ced10e8804
gcc 7
author | kono |
---|---|
date | Fri, 27 Oct 2017 22:46:09 +0900 |
parents | f6334be47118 |
children | 84e7813d76e9 |
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--- a/gcc/config/i386/smmintrin.h Sun Aug 21 07:07:55 2011 +0900 +++ b/gcc/config/i386/smmintrin.h Fri Oct 27 22:46:09 2017 +0900 @@ -1,4 +1,4 @@ -/* Copyright (C) 2007, 2008, 2009, 2010 Free Software Foundation, Inc. +/* Copyright (C) 2007-2017 Free Software Foundation, Inc. This file is part of GCC. @@ -19,8 +19,7 @@ You should have received a copy of the GNU General Public License and a copy of the GCC Runtime Library Exception along with this program; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see - <http://www.gnu.org/licenses/>. - + <http://www.gnu.org/licenses/>. */ /* Implemented from the specification included in the Intel C++ Compiler User Guide and Reference, version 10.0. */ @@ -28,14 +27,16 @@ #ifndef _SMMINTRIN_H_INCLUDED #define _SMMINTRIN_H_INCLUDED -#ifndef __SSE4_1__ -# error "SSE4.1 instruction set not enabled" -#else - /* We need definitions from the SSSE3, SSE3, SSE2 and SSE header files. */ #include <tmmintrin.h> +#ifndef __SSE4_1__ +#pragma GCC push_options +#pragma GCC target("sse4.1") +#define __DISABLE_SSE4_1__ +#endif /* __SSE4_1__ */ + /* Rounding mode macros. */ #define _MM_FROUND_TO_NEAREST_INT 0x00 #define _MM_FROUND_TO_NEG_INF 0x01 @@ -266,7 +267,7 @@ extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmpeq_epi64 (__m128i __X, __m128i __Y) { - return (__m128i) __builtin_ia32_pcmpeqq ((__v2di)__X, (__v2di)__Y); + return (__m128i) ((__v2di)__X == (__v2di)__Y); } /* Min/max packed integer instructions. */ @@ -324,7 +325,7 @@ extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_mullo_epi32 (__m128i __X, __m128i __Y) { - return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X, (__v4si)__Y); + return (__m128i) ((__v4su)__X * (__v4su)__Y); } /* Packed integer 32-bit multiplication of 2 pairs of operands @@ -583,7 +584,11 @@ return (__m128i) __builtin_ia32_movntdqa ((__v2di *) __X); } -#ifdef __SSE4_2__ +#ifndef __SSE4_2__ +#pragma GCC push_options +#pragma GCC target("sse4.2") +#define __DISABLE_SSE4_2__ +#endif /* __SSE4_2__ */ /* These macros specify the source data format. */ #define _SIDD_UBYTE_OPS 0x00 @@ -597,7 +602,7 @@ #define _SIDD_CMP_EQUAL_EACH 0x08 #define _SIDD_CMP_EQUAL_ORDERED 0x0c -/* These macros specify the the polarity. */ +/* These macros specify the polarity. */ #define _SIDD_POSITIVE_POLARITY 0x00 #define _SIDD_NEGATIVE_POLARITY 0x10 #define _SIDD_MASKED_POSITIVE_POLARITY 0x20 @@ -790,12 +795,32 @@ extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmpgt_epi64 (__m128i __X, __m128i __Y) { - return (__m128i) __builtin_ia32_pcmpgtq ((__v2di)__X, (__v2di)__Y); + return (__m128i) ((__v2di)__X > (__v2di)__Y); } -#ifdef __POPCNT__ +#ifdef __DISABLE_SSE4_2__ +#undef __DISABLE_SSE4_2__ +#pragma GCC pop_options +#endif /* __DISABLE_SSE4_2__ */ + +#ifdef __DISABLE_SSE4_1__ +#undef __DISABLE_SSE4_1__ +#pragma GCC pop_options +#endif /* __DISABLE_SSE4_1__ */ + #include <popcntintrin.h> -#endif + +#ifndef __SSE4_1__ +#pragma GCC push_options +#pragma GCC target("sse4.1") +#define __DISABLE_SSE4_1__ +#endif /* __SSE4_1__ */ + +#ifndef __SSE4_2__ +#pragma GCC push_options +#pragma GCC target("sse4.2") +#define __DISABLE_SSE4_2__ +#endif /* __SSE4_1__ */ /* Accumulate CRC32 (polynomial 0x11EDC6F41) value. */ extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__)) @@ -824,8 +849,14 @@ } #endif -#endif /* __SSE4_2__ */ +#ifdef __DISABLE_SSE4_2__ +#undef __DISABLE_SSE4_2__ +#pragma GCC pop_options +#endif /* __DISABLE_SSE4_2__ */ -#endif /* __SSE4_1__ */ +#ifdef __DISABLE_SSE4_1__ +#undef __DISABLE_SSE4_1__ +#pragma GCC pop_options +#endif /* __DISABLE_SSE4_1__ */ #endif /* _SMMINTRIN_H_INCLUDED */