--- a/gcc/config/moxie/moxie.md	Sun Aug 21 07:07:55 2011 +0900
+++ b/gcc/config/moxie/moxie.md	Fri Oct 27 22:46:09 2017 +0900
@@ -1,5 +1,5 @@
 ;; Machine description for Moxie
-;; Copyright (C) 2009 Free Software Foundation, Inc.
+;; Copyright (C) 2009-2017 Free Software Foundation, Inc.
 ;; Contributed by Anthony Green <green@moxielogic.com>
 
 ;; This file is part of GCC.
@@ -48,9 +48,9 @@
 	   (match_operand:SI 2 "moxie_add_operand" "I,N,r")))]
   ""
   "@
-  inc    %0, %2
-  dec	 %0, -%2
-  add.l  %0, %2")
+  inc\\t%0, %2
+  dec\\t%0, -%2
+  add\\t%0, %2")
 
 (define_insn "subsi3"
   [(set (match_operand:SI 0 "register_operand" "=r,r")
@@ -59,8 +59,8 @@
 	   (match_operand:SI 2 "moxie_sub_operand" "I,r")))]
   ""
   "@
-  dec    %0, %2
-  sub.l  %0, %2")
+  dec\\t%0, %2
+  sub\\t%0, %2")
 
 (define_insn "mulsi3"
   [(set (match_operand:SI 0 "register_operand" "=r")
@@ -68,7 +68,36 @@
 	   (match_operand:SI 1 "register_operand" "0")
 	   (match_operand:SI 2 "register_operand" "r")))]
   ""
-  "mul.l  %0, %2")
+  "mul\\t%0, %2")
+
+(define_code_iterator EXTEND [sign_extend zero_extend])
+(define_code_attr mul [(sign_extend "mul") (zero_extend "umul")])
+
+(define_insn "<mul>si3_highpart"
+  [(set (match_operand:SI 0 "register_operand"                       "=r")
+        (truncate:SI
+         (lshiftrt:DI
+          (mult:DI (EXTEND:DI (match_operand:SI 1 "register_operand"  "0"))
+                   (EXTEND:DI (match_operand:SI 2 "register_operand"  "r")))
+          (const_int 32))))]
+  "TARGET_HAS_MULX"
+  "<mul>.x\\t%0, %2")
+
+(define_expand "<mul>sidi3"
+  [(set (match_operand:DI 0 "register_operand" "")
+	(mult:DI (EXTEND:DI (match_operand:SI 1 "register_operand" "0"))
+		 (EXTEND:DI (match_operand:SI 2 "register_operand" "r"))))]
+  "TARGET_HAS_MULX"
+{
+  rtx hi = gen_reg_rtx (SImode);
+  rtx lo = gen_reg_rtx (SImode);
+
+  emit_insn (gen_<mul>si3_highpart (hi, operands[1], operands[2]));
+  emit_insn (gen_mulsi3 (lo, operands[1], operands[2]));
+  emit_move_insn (gen_lowpart (SImode, operands[0]), lo);
+  emit_move_insn (gen_highpart (SImode, operands[0]), hi);
+  DONE;
+})
 
 (define_insn "divsi3"
   [(set (match_operand:SI 0 "register_operand" "=r")
@@ -76,7 +105,7 @@
 	   (match_operand:SI 1 "register_operand" "0")
 	   (match_operand:SI 2 "register_operand" "r")))]
   ""
-  "div.l  %0, %2")
+  "div\\t%0, %2")
 
 (define_insn "udivsi3"
   [(set (match_operand:SI 0 "register_operand" "=r")
@@ -84,7 +113,7 @@
 	   (match_operand:SI 1 "register_operand" "0")
 	   (match_operand:SI 2 "register_operand" "r")))]
   ""
-  "udiv.l %0, %2")
+  "udiv\\t%0, %2")
 
 (define_insn "modsi3"
   [(set (match_operand:SI 0 "register_operand" "=r")
@@ -92,7 +121,7 @@
 	   (match_operand:SI 1 "register_operand" "0")
 	   (match_operand:SI 2 "register_operand" "r")))]
   ""
-  "mod.l  %0, %2")
+  "mod\\t%0, %2")
 
 (define_insn "umodsi3"
   [(set (match_operand:SI 0 "register_operand" "=r")
@@ -100,7 +129,7 @@
 	   (match_operand:SI 1 "register_operand" "0")
 	   (match_operand:SI 2 "register_operand" "r")))]
   ""
-  "umod.l %0, %2")
+  "umod\\t%0, %2")
 
 ;; -------------------------------------------------------------------------
 ;; Unary arithmetic instructions
@@ -110,13 +139,13 @@
   [(set (match_operand:SI 0 "register_operand" "=r")
 	  (neg:SI (match_operand:SI 1 "register_operand" "r")))]
   ""
-  "neg    %0, %1")
+  "neg\\t%0, %1")
 
 (define_insn "one_cmplsi2"
   [(set (match_operand:SI 0 "register_operand" "=r")
 	(not:SI (match_operand:SI 1 "register_operand" "r")))]
   ""
-  "not    %0, %1")
+  "not\\t%0, %1")
 
 ;; -------------------------------------------------------------------------
 ;; Logical operators
@@ -128,7 +157,7 @@
 		(match_operand:SI 2 "register_operand" "r")))]
   ""
 {
-  return "and    %0, %2";
+  return "and\\t%0, %2";
 })
 
 (define_insn "xorsi3"
@@ -137,7 +166,7 @@
 		(match_operand:SI 2 "register_operand" "r")))]
   ""
 {
-  return "xor    %0, %2";
+  return "xor\\t%0, %2";
 })
 
 (define_insn "iorsi3"
@@ -146,7 +175,7 @@
 		(match_operand:SI 2 "register_operand" "r")))]
   ""
 {
-  return "or     %0, %2";
+  return "or\\t%0, %2";
 })
 
 ;; -------------------------------------------------------------------------
@@ -159,7 +188,7 @@
 		   (match_operand:SI 2 "register_operand" "r")))]
   ""
 {
-  return "ashl   %0, %2";
+  return "ashl\\t%0, %2";
 })
 
 (define_insn "ashrsi3"
@@ -168,7 +197,7 @@
 		     (match_operand:SI 2 "register_operand" "r")))]
   ""
 {
-  return "ashr   %0, %2";
+  return "ashr\\t%0, %2";
 })
 
 (define_insn "lshrsi3"
@@ -177,7 +206,7 @@
 		     (match_operand:SI 2 "register_operand" "r")))]
   ""
 {
-  return "lshr   %0, %2";
+  return "lshr\\t%0, %2";
 })
 
 ;; -------------------------------------------------------------------------
@@ -191,14 +220,14 @@
   [(set (mem:SI (pre_dec:SI (reg:SI 1)))
   	(match_operand:SI 0 "register_operand" "r"))]
   ""
-  "push   $sp, %0")
+  "push\\t$sp, %0")
 
 ;; Pop a register from the stack
 (define_insn "movsi_pop"
   [(set (match_operand:SI 1 "register_operand" "=r")
   	(mem:SI (post_inc:SI (match_operand:SI 0 "register_operand" "r"))))]
   ""
-  "pop    %0, %1")
+  "pop\\t%0, %1")
 
 (define_expand "movsi"
    [(set (match_operand:SI 0 "general_operand" "")
@@ -223,21 +252,59 @@
 }")
 
 (define_insn "*movsi"
-  [(set (match_operand:SI 0 "general_operand" "=r,r,r,W,A,r,r,B,r")
+  [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,W,A,r,r,B,r")
 	(match_operand:SI 1 "moxie_general_movsrc_operand" "O,r,i,r,r,W,A,r,B"))]
   "register_operand (operands[0], SImode)
    || register_operand (operands[1], SImode)"
   "@
-   xor    %0, %0
-   mov    %0, %1
-   ldi.l  %0, %1
-   st.l   %0, %1
-   sta.l  %0, %1
-   ld.l   %0, %1
-   lda.l  %0, %1
-   sto.l  %0, %1
-   ldo.l  %0, %1"
-  [(set_attr "length"	"2,2,6,2,6,2,6,6,6")])
+   xor\\t%0, %0
+   mov\\t%0, %1
+   ldi.l\\t%0, %1
+   st.l\\t%0, %1
+   sta.l\\t%0, %1
+   ld.l\\t%0, %1
+   lda.l\\t%0, %1
+   sto.l\\t%0, %1
+   ldo.l\\t%0, %1"
+  [(set_attr "length"	"2,2,6,2,6,2,6,4,4")])
+
+(define_insn "zero_extendqisi2"
+  [(set (match_operand:SI 0 "register_operand" "=r,r,r,r")
+	(zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "r,W,A,B")))]
+  ""
+  "@
+   zex.b\\t%0, %1
+   ld.b\\t%0, %1
+   lda.b\\t%0, %1
+   ldo.b\\t%0, %1"
+  [(set_attr "length" "2,2,6,4")])
+
+(define_insn "zero_extendhisi2"
+  [(set (match_operand:SI 0 "register_operand" "=r,r,r,r")
+	(zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "r,W,A,B")))]
+  ""
+  "@
+   zex.s\\t%0, %1
+   ld.s\\t%0, %1
+   lda.s\\t%0, %1
+   ldo.s\\t%0, %1"
+  [(set_attr "length" "2,2,6,4")])
+
+(define_insn "extendqisi2"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+	(sign_extend:SI (match_operand:QI 1 "nonimmediate_operand" "r")))]
+  ""
+  "@
+   sex.b\\t%0, %1"
+  [(set_attr "length" "2")])
+
+(define_insn "extendhisi2"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+	(sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "r")))]
+  ""
+  "@
+   sex.s\\t%0, %1"
+  [(set_attr "length" "2")])
 
 (define_expand "movqi"
   [(set (match_operand:QI 0 "general_operand" "")
@@ -251,21 +318,21 @@
 }")
 
 (define_insn "*movqi"
-  [(set (match_operand:QI 0 "general_operand" "=r,r,r,W,A,r,r,B,r")
+  [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r,W,A,r,r,B,r")
 	(match_operand:QI 1 "moxie_general_movsrc_operand" "O,r,i,r,r,W,A,r,B"))]
   "register_operand (operands[0], QImode)
    || register_operand (operands[1], QImode)"
   "@
-   xor    %0, %0
-   mov    %0, %1
-   ldi.b  %0, %1
-   st.b   %0, %1
-   sta.b  %0, %1
-   ld.b   %0, %1
-   lda.b  %0, %1
-   sto.b  %0, %1
-   ldo.b  %0, %1"
-  [(set_attr "length"	"2,2,6,2,6,2,6,6,6")])
+   xor\\t%0, %0
+   mov\\t%0, %1
+   ldi.b\\t%0, %1
+   st.b\\t%0, %1
+   sta.b\\t%0, %1
+   ld.b\\t%0, %1
+   lda.b\\t%0, %1
+   sto.b\\t%0, %1
+   ldo.b\\t%0, %1"
+  [(set_attr "length"	"2,2,6,2,6,2,6,4,4")])
 
 (define_expand "movhi"
   [(set (match_operand:HI 0 "general_operand" "")
@@ -279,28 +346,28 @@
 }")
 
 (define_insn "*movhi"
-  [(set (match_operand:HI 0 "general_operand" "=r,r,r,W,A,r,r,B,r")
+  [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,r,W,A,r,r,B,r")
 	(match_operand:HI 1 "moxie_general_movsrc_operand" "O,r,i,r,r,W,A,r,B"))]
   "(register_operand (operands[0], HImode)
     || register_operand (operands[1], HImode))"
   "@
-   xor    %0, %0
-   mov    %0, %1
-   ldi.s  %0, %1
-   st.s   %0, %1
-   sta.s  %0, %1
-   ld.s   %0, %1
-   lda.s  %0, %1
-   sto.s  %0, %1
-   ldo.s  %0, %1"
-  [(set_attr "length"	"2,2,6,2,6,2,6,6,6")])
+   xor\\t%0, %0
+   mov\\t%0, %1
+   ldi.s\\t%0, %1
+   st.s\\t%0, %1
+   sta.s\\t%0, %1
+   ld.s\\t%0, %1
+   lda.s\\t%0, %1
+   sto.s\\t%0, %1
+   ldo.s\\t%0, %1"
+  [(set_attr "length"	"2,2,6,2,6,2,6,4,4")])
 
 ;; -------------------------------------------------------------------------
 ;; Compare instructions
 ;; -------------------------------------------------------------------------
 
 (define_constants
-  [(CC_REG 11)])
+  [(CC_REG 19)])
 
 (define_expand "cbranchsi4"
   [(set (reg:CC CC_REG)
@@ -308,7 +375,7 @@
          (match_operand:SI 1 "general_operand" "")
          (match_operand:SI 2 "general_operand" "")))
    (set (pc)
-        (if_then_else (match_operator:CC 0 "comparison_operator"
+        (if_then_else (match_operator 0 "comparison_operator"
                        [(reg:CC CC_REG) (const_int 0)])
                       (label_ref (match_operand 3 "" ""))
                       (pc)))]
@@ -327,7 +394,7 @@
 	 (match_operand:SI 0 "register_operand" "r")
 	 (match_operand:SI 1 "register_operand"	"r")))]
   ""
-  "cmp    %0, %1")
+  "cmp\\t%0, %1")
 
 
 ;; -------------------------------------------------------------------------
@@ -351,9 +418,9 @@
   ""
 {
   if (get_attr_length (insn) == 2)
-    return "b<CC>   %l0";
+    return "b<CC>\\t%l0";
   else
-    return "b<rCC>   .+6\n\tjmpa   %l0";
+    return "b<rCC>\\t.+6\n\tjmpa   %l0";
 }
   [(set (attr "length")
         (if_then_else (lt (abs (minus (pc) (match_dup 0))) (const_int 1022))
@@ -377,8 +444,8 @@
 	 (match_operand 1 "" ""))]
   ""
   "@
-   jsra   %0
-   jsr    %0"
+   jsra\\t%0
+   jsr\\t%0"
   [(set_attr "length"	"6,2")])
 
 (define_expand "call_value"
@@ -396,7 +463,7 @@
 		       1 "immediate_operand" "i"))
 	      (match_operand 2 "" "")))]
   ""
-  "jsra   %1"
+  "jsra\\t%1"
   [(set_attr "length"	"6")])
 
 (define_insn "*call_value_indirect"
@@ -405,18 +472,18 @@
 		       1 "register_operand" "r"))
 	      (match_operand 2 "" "")))]
   ""
-  "jsr    %1")
+  "jsr\\t%1")
 
 (define_insn "indirect_jump"
   [(set (pc) (match_operand:SI 0 "nonimmediate_operand" "r"))]
   ""
-  "jmp    %0")
+  "jmp\\t%0")
 
 (define_insn "jump"
   [(set (pc)
 	(label_ref (match_operand 0 "" "")))]
   ""
-  "jmpa   %l0"
+  "jmpa\\t%l0"
   [(set_attr "length"	"6")])