Mercurial > hg > CbC > CbC_gcc
diff gcc/config/arm/neon.ml @ 55:77e2b8dfacca gcc-4.4.5
update it from 4.4.3 to 4.5.0
| author | ryoma <e075725@ie.u-ryukyu.ac.jp> |
|---|---|
| date | Fri, 12 Feb 2010 23:39:51 +0900 |
| parents | a06113de4d67 |
| children | b7f97abdc517 |
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--- a/gcc/config/arm/neon.ml Sun Feb 07 18:28:00 2010 +0900 +++ b/gcc/config/arm/neon.ml Fri Feb 12 23:39:51 2010 +0900 @@ -50,7 +50,7 @@ | T_ptrto of vectype | T_const of vectype | T_void | T_intQI | T_intHI | T_intSI - | T_intDI + | T_intDI | T_floatSF (* The meanings of the following are: TImode : "Tetra", two registers (four words). @@ -68,6 +68,7 @@ | Element_of_dreg (* Used for "lane" variants. *) | Element_of_qreg (* Likewise. *) | All_elements_of_dreg (* Used for "dup" variants. *) + | Alternatives of shape_elt list (* Used for multiple valid operands *) type shape_form = All of int * shape_elt | Long @@ -1008,7 +1009,10 @@ pf_su_8_64; (* Set all lanes to the same value. *) - Vdup_n, [], + Vdup_n, + [Disassembles_as [Use_operands [| Dreg; + Alternatives [ Corereg; + Element_of_dreg ] |]]], Use_operands [| Dreg; Corereg |], "vdup_n", bits_1, pf_su_8_32; Vdup_n, @@ -1016,7 +1020,10 @@ Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |]]], Use_operands [| Dreg; Corereg |], "vdup_n", notype_1, [S64; U64]; - Vdup_n, [], + Vdup_n, + [Disassembles_as [Use_operands [| Qreg; + Alternatives [ Corereg; + Element_of_dreg ] |]]], Use_operands [| Qreg; Corereg |], "vdupQ_n", bits_1, pf_su_8_32; Vdup_n, @@ -1028,7 +1035,10 @@ (* These are just aliases for the above. *) Vmov_n, - [Builtin_name "vdup_n"], + [Builtin_name "vdup_n"; + Disassembles_as [Use_operands [| Dreg; + Alternatives [ Corereg; + Element_of_dreg ] |]]], Use_operands [| Dreg; Corereg |], "vmov_n", bits_1, pf_su_8_32; Vmov_n, @@ -1038,7 +1048,10 @@ Use_operands [| Dreg; Corereg |], "vmov_n", notype_1, [S64; U64]; Vmov_n, - [Builtin_name "vdupQ_n"], + [Builtin_name "vdupQ_n"; + Disassembles_as [Use_operands [| Qreg; + Alternatives [ Corereg; + Element_of_dreg ] |]]], Use_operands [| Qreg; Corereg |], "vmovQ_n", bits_1, pf_su_8_32; Vmov_n, @@ -1693,6 +1706,7 @@ | T_intHI -> "__builtin_neon_hi" | T_intSI -> "__builtin_neon_si" | T_intDI -> "__builtin_neon_di" + | T_floatSF -> "__builtin_neon_sf" | T_arrayof (num, base) -> let basename = name (fun x -> x) base in affix (Printf.sprintf "%sx%d" basename num)