Mercurial > hg > CbC > CbC_gcc
diff gcc/config/mips/mips-ps-3d.md @ 55:77e2b8dfacca gcc-4.4.5
update it from 4.4.3 to 4.5.0
| author | ryoma <e075725@ie.u-ryukyu.ac.jp> |
|---|---|
| date | Fri, 12 Feb 2010 23:39:51 +0900 |
| parents | a06113de4d67 |
| children | f6334be47118 |
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--- a/gcc/config/mips/mips-ps-3d.md Sun Feb 07 18:28:00 2010 +0900 +++ b/gcc/config/mips/mips-ps-3d.md Fri Feb 12 23:39:51 2010 +0900 @@ -58,7 +58,7 @@ MOVZ.PS. MOVT.PS and MOVF.PS depend on two CC values and move each item independently. */ - if (GET_MODE_CLASS (GET_MODE (cmp_operands[0])) != MODE_INT) + if (GET_MODE_CLASS (GET_MODE (XEXP (operands[1], 0))) != MODE_INT) FAIL; mips_expand_conditional_move (operands); @@ -439,50 +439,46 @@ ; Branch on Any of Four Floating Point Condition Codes True (define_insn "bc1any4t" [(set (pc) - (if_then_else (ne (match_operand:CCV4 0 "register_operand" "z") + (if_then_else (ne (match_operand:CCV4 1 "register_operand" "z") (const_int 0)) - (label_ref (match_operand 1 "" "")) + (label_ref (match_operand 0 "" "")) (pc)))] "TARGET_HARD_FLOAT && TARGET_PAIRED_SINGLE_FLOAT" - "%*bc1any4t\t%0,%1%/" - [(set_attr "type" "branch") - (set_attr "mode" "none")]) + "%*bc1any4t\t%1,%0%/" + [(set_attr "type" "branch")]) ; Branch on Any of Four Floating Point Condition Codes False (define_insn "bc1any4f" [(set (pc) - (if_then_else (ne (match_operand:CCV4 0 "register_operand" "z") + (if_then_else (ne (match_operand:CCV4 1 "register_operand" "z") (const_int -1)) - (label_ref (match_operand 1 "" "")) + (label_ref (match_operand 0 "" "")) (pc)))] "TARGET_HARD_FLOAT && TARGET_PAIRED_SINGLE_FLOAT" - "%*bc1any4f\t%0,%1%/" - [(set_attr "type" "branch") - (set_attr "mode" "none")]) + "%*bc1any4f\t%1,%0%/" + [(set_attr "type" "branch")]) ; Branch on Any of Two Floating Point Condition Codes True (define_insn "bc1any2t" [(set (pc) - (if_then_else (ne (match_operand:CCV2 0 "register_operand" "z") + (if_then_else (ne (match_operand:CCV2 1 "register_operand" "z") (const_int 0)) - (label_ref (match_operand 1 "" "")) + (label_ref (match_operand 0 "" "")) (pc)))] "TARGET_HARD_FLOAT && TARGET_PAIRED_SINGLE_FLOAT" - "%*bc1any2t\t%0,%1%/" - [(set_attr "type" "branch") - (set_attr "mode" "none")]) + "%*bc1any2t\t%1,%0%/" + [(set_attr "type" "branch")]) ; Branch on Any of Two Floating Point Condition Codes False (define_insn "bc1any2f" [(set (pc) - (if_then_else (ne (match_operand:CCV2 0 "register_operand" "z") + (if_then_else (ne (match_operand:CCV2 1 "register_operand" "z") (const_int -1)) - (label_ref (match_operand 1 "" "")) + (label_ref (match_operand 0 "" "")) (pc)))] "TARGET_HARD_FLOAT && TARGET_PAIRED_SINGLE_FLOAT" - "%*bc1any2f\t%0,%1%/" - [(set_attr "type" "branch") - (set_attr "mode" "none")]) + "%*bc1any2f\t%1,%0%/" + [(set_attr "type" "branch")]) ; Used to access one register in a CCV2 pair. Operand 0 is the register ; pair and operand 1 is the index of the register we want (a CONST_INT). @@ -497,45 +493,43 @@ (define_insn "*branch_upper_lower" [(set (pc) (if_then_else - (match_operator 0 "equality_operator" + (match_operator 1 "equality_operator" [(unspec:CC [(match_operand:CCV2 2 "register_operand" "z") (match_operand 3 "const_int_operand")] UNSPEC_SINGLE_CC) (const_int 0)]) - (label_ref (match_operand 1 "" "")) + (label_ref (match_operand 0 "" "")) (pc)))] "TARGET_HARD_FLOAT" { operands[2] = gen_rtx_REG (CCmode, REGNO (operands[2]) + INTVAL (operands[3])); return mips_output_conditional_branch (insn, operands, - MIPS_BRANCH ("b%F0", "%2,%1"), - MIPS_BRANCH ("b%W0", "%2,%1")); + MIPS_BRANCH ("b%F1", "%2,%0"), + MIPS_BRANCH ("b%W1", "%2,%0")); } - [(set_attr "type" "branch") - (set_attr "mode" "none")]) + [(set_attr "type" "branch")]) ; As above, but with the sense of the condition reversed. (define_insn "*branch_upper_lower_inverted" [(set (pc) (if_then_else - (match_operator 0 "equality_operator" + (match_operator 1 "equality_operator" [(unspec:CC [(match_operand:CCV2 2 "register_operand" "z") (match_operand 3 "const_int_operand")] UNSPEC_SINGLE_CC) (const_int 0)]) (pc) - (label_ref (match_operand 1 "" ""))))] + (label_ref (match_operand 0 "" ""))))] "TARGET_HARD_FLOAT" { operands[2] = gen_rtx_REG (CCmode, REGNO (operands[2]) + INTVAL (operands[3])); return mips_output_conditional_branch (insn, operands, - MIPS_BRANCH ("b%W0", "%2,%1"), - MIPS_BRANCH ("b%F0", "%2,%1")); + MIPS_BRANCH ("b%W1", "%2,%0"), + MIPS_BRANCH ("b%F1", "%2,%0")); } - [(set_attr "type" "branch") - (set_attr "mode" "none")]) + [(set_attr "type" "branch")]) ;---------------------------------------------------------------------------- ; Floating Point Reduced Precision Reciprocal Square Root Instructions.