diff gcc/config/pdp11/pdp11-modes.def @ 131:84e7813d76e9

gcc-8.2
author mir3636
date Thu, 25 Oct 2018 07:37:49 +0900
parents 04ced10e8804
children 1830386684a0
line wrap: on
line diff
--- a/gcc/config/pdp11/pdp11-modes.def	Fri Oct 27 22:46:09 2017 +0900
+++ b/gcc/config/pdp11/pdp11-modes.def	Thu Oct 25 07:37:49 2018 +0900
@@ -1,5 +1,5 @@
 /* Definitions of target machine for GNU compiler, for the pdp-11
-   Copyright (C) 2002-2017 Free Software Foundation, Inc.
+   Copyright (C) 2002-2018 Free Software Foundation, Inc.
    Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at).
 
 This file is part of GCC.
@@ -19,8 +19,26 @@
 <http://www.gnu.org/licenses/>.  */
 
 /* Add any extra modes needed to represent the condition code.
-   CCFPmode is used for FPU, but should we use a separate reg? */
+
+   The default CCmode is the CPU condition codes, as set by compare;
+   all conditional branches are valid with this.
 
-CC_MODE (CCFP);
+   CCNZmode is the CPU condition code as a side effect of arithmetic
+   or logic operations where N and Z reflect sign and zero status of
+   the result, but the V bit is not meaningful.  Unsigned conditional
+   branches don't apply then (no such thing when comparing with zero)
+   and signed branches that use V need to clear V first if they are to
+   be used.  CCNZ mode appears in side effects (implicit compare with
+   zero) if V is not forced to 0 by the instruction.  In such cases, V
+   often reflects signed overflow of the operation, which means a
+   signed branch will get the sign backwards.  This applies both to
+   some float and integer operations.
+
+   These modes are used both in the FPU and the CPU, since they have
+   the same meaning, and also because the FPU condition codes are
+   copied to the CPU before being used in conditional branches.  */
+
+CC_MODE (CCNZ);
+
 RESET_FLOAT_FORMAT (SF, pdp11_f_format);
 RESET_FLOAT_FORMAT (DF, pdp11_d_format);