diff gcc/config/riscv/riscv.opt @ 131:84e7813d76e9

gcc-8.2
author mir3636
date Thu, 25 Oct 2018 07:37:49 +0900
parents 04ced10e8804
children 1830386684a0
line wrap: on
line diff
--- a/gcc/config/riscv/riscv.opt	Fri Oct 27 22:46:09 2017 +0900
+++ b/gcc/config/riscv/riscv.opt	Thu Oct 25 07:37:49 2018 +0900
@@ -1,6 +1,6 @@
 ; Options for the RISC-V port of the compiler
 ;
-; Copyright (C) 2011-2017 Free Software Foundation, Inc.
+; Copyright (C) 2011-2018 Free Software Foundation, Inc.
 ;
 ; This file is part of GCC.
 ;
@@ -33,6 +33,10 @@
 Target Report RejectNegative Joined Enum(abi_type) Var(riscv_abi) Init(ABI_ILP32)
 Specify integer and floating-point calling convention.
 
+mpreferred-stack-boundary=
+Target RejectNegative Joined UInteger Var(riscv_preferred_stack_boundary_arg)
+Attempt to keep stack aligned to this power of 2.
+
 Enum
 Name(abi_type) Type(enum riscv_abi_type)
 Supported ABIs (for use with the -mabi= option):
@@ -41,6 +45,9 @@
 Enum(abi_type) String(ilp32) Value(ABI_ILP32)
 
 EnumValue
+Enum(abi_type) String(ilp32e) Value(ABI_ILP32E)
+
+EnumValue
 Enum(abi_type) String(ilp32f) Value(ABI_ILP32F)
 
 EnumValue
@@ -102,6 +109,11 @@
 Target Report Mask(EXPLICIT_RELOCS)
 Use %reloc() operators, rather than assembly macros, to load addresses.
 
+mrelax
+Target Bool Var(riscv_mrelax) Init(1)
+Take advantage of linker relaxations to reduce the number of instructions
+required to materialize symbol addresses.
+
 Mask(64BIT)
 
 Mask(MUL)
@@ -113,3 +125,5 @@
 Mask(DOUBLE_FLOAT)
 
 Mask(RVC)
+
+Mask(RVE)