Mercurial > hg > CbC > CbC_gcc
diff gcc/config/rs6000/rs6000-modes.def @ 131:84e7813d76e9
gcc-8.2
author | mir3636 |
---|---|
date | Thu, 25 Oct 2018 07:37:49 +0900 |
parents | 04ced10e8804 |
children | 1830386684a0 |
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--- a/gcc/config/rs6000/rs6000-modes.def Fri Oct 27 22:46:09 2017 +0900 +++ b/gcc/config/rs6000/rs6000-modes.def Thu Oct 25 07:37:49 2018 +0900 @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler, for IBM RS/6000. - Copyright (C) 2002-2017 Free Software Foundation, Inc. + Copyright (C) 2002-2018 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) This file is part of GCC. @@ -18,16 +18,39 @@ along with GCC; see the file COPYING3. If not see <http://www.gnu.org/licenses/>. */ -/* IBM 128-bit floating point. IFmode and KFmode use the fractional float - support in order to declare 3 128-bit floating point types. */ -FRACTIONAL_FLOAT_MODE (IF, 106, 16, ibm_extended_format); +/* We order the 3 128-bit floating point types so that IFmode (IBM 128-bit + floating point) is the 128-bit floating point type with the highest + precision (128 bits). This so that machine independent parts of the + compiler do not try to widen IFmode to TFmode on ISA 3.0 (power9) that has + hardware support for IEEE 128-bit. We set TFmode (long double mode) in + between, and KFmode (explicit __float128) below it. + + Previously, IFmode and KFmode were defined to be fractional modes and TFmode + was the standard mode. Since IFmode does not define the normal arithmetic + insns (other than neg/abs), on a ISA 3.0 system, the machine independent + parts of the compiler would see that TFmode has the necessary hardware + support, and widen the operation from IFmode to TFmode. However, IEEE + 128-bit is not strictly a super-set of IBM extended double and the + conversion to/from IEEE 128-bit was a function call. + + We now make IFmode the highest fractional mode, which means its values are + not considered for widening. Since we don't define insns for IFmode, the + IEEE 128-bit modes would not widen to IFmode. */ + +#ifndef RS6000_MODES_H +#include "config/rs6000/rs6000-modes.h" +#endif + +/* IBM 128-bit floating point. */ +FRACTIONAL_FLOAT_MODE (IF, FLOAT_PRECISION_IFmode, 16, ibm_extended_format); /* Explicit IEEE 128-bit floating point. */ -FRACTIONAL_FLOAT_MODE (KF, 113, 16, ieee_quad_format); +FRACTIONAL_FLOAT_MODE (KF, FLOAT_PRECISION_KFmode, 16, ieee_quad_format); -/* 128-bit floating point. ABI_V4 uses IEEE quad, AIX/Darwin - adjust this in rs6000_option_override_internal. */ -FLOAT_MODE (TF, 16, ieee_quad_format); +/* 128-bit floating point, either IBM 128-bit or IEEE 128-bit. This is + adjusted in rs6000_option_override_internal to be the appropriate floating + point type. */ +FRACTIONAL_FLOAT_MODE (TF, FLOAT_PRECISION_TFmode, 16, ieee_quad_format); /* Add any extra modes needed to represent the condition code. @@ -51,10 +74,6 @@ VECTOR_MODES (INT, 32); /* V32QI V16HI V8SI V4DI */ VECTOR_MODES (FLOAT, 32); /* V16HF V8SF V4DF */ -/* Paired single. */ -VECTOR_MODE (FLOAT, SF, 2); /* The only valid paired-single mode. */ -VECTOR_MODE (INT, SI, 2); /* For paired-single permutes. */ - /* Replacement for TImode that only is allowed in GPRs. We also use PTImode for quad memory atomic operations to force getting an even/odd register combination. */