Mercurial > hg > CbC > CbC_gcc
diff gcc/doc/invoke.texi @ 131:84e7813d76e9
gcc-8.2
author | mir3636 |
---|---|
date | Thu, 25 Oct 2018 07:37:49 +0900 |
parents | 04ced10e8804 |
children | 1830386684a0 |
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--- a/gcc/doc/invoke.texi Fri Oct 27 22:46:09 2017 +0900 +++ b/gcc/doc/invoke.texi Thu Oct 25 07:37:49 2018 +0900 @@ -1,4 +1,4 @@ -@c Copyright (C) 1988-2017 Free Software Foundation, Inc. +@c Copyright (C) 1988-2018 Free Software Foundation, Inc. @c This is part of the GCC manual. @c For copying conditions, see the file gcc.texi. @@ -8,7 +8,7 @@ @c man end @c man begin COPYRIGHT -Copyright @copyright{} 1988-2017 Free Software Foundation, Inc. +Copyright @copyright{} 1988-2018 Free Software Foundation, Inc. Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.3 or @@ -45,7 +45,7 @@ @c man end @c man begin SEEALSO gpl(7), gfdl(7), fsf-funding(7), -cpp(1), gcov(1), as(1), ld(1), gdb(1), adb(1), dbx(1), sdb(1) +cpp(1), gcov(1), as(1), ld(1), gdb(1), dbx(1) and the Info entries for @file{gcc}, @file{cpp}, @file{as}, @file{ld}, @file{binutils} and @file{gdb}. @c man end @@ -121,6 +121,21 @@ @option{-ffoo} is @option{-fno-foo}. This manual documents only one of these two forms, whichever one is not the default. +Some options take one or more arguments typically separated either +by a space or by the equals sign (@samp{=}) from the option name. +Unless documented otherwise, an argument can be either numeric or +a string. Numeric arguments must typically be small unsigned decimal +or hexadecimal integers. Hexadecimal arguments must begin with +the @samp{0x} prefix. Arguments to options that specify a size +threshold of some sort may be arbitrarily large decimal or hexadecimal +integers followed by a byte size suffix designating a multiple of bytes +such as @code{kB} and @code{KiB} for kilobyte and kibibyte, respectively, +@code{MB} and @code{MiB} for megabyte and mebibyte, @code{GB} and +@code{GiB} for gigabyte and gigibyte, and so on. Such arguments are +designated by @var{byte-size} in the following text. Refer to the NIST, +IEC, and other relevant national and international standards for the full +listing and explanation of the binary and decimal byte size prefixes. + @c man end @xref{Option Index}, for an index to GCC's options. @@ -172,7 +187,8 @@ @gccoptlist{-c -S -E -o @var{file} -x @var{language} @gol -v -### --help@r{[}=@var{class}@r{[},@dots{}@r{]]} --target-help --version @gol -pass-exit-codes -pipe -specs=@var{file} -wrapper @gol -@@@var{file} -fplugin=@var{file} -fplugin-arg-@var{name}=@var{arg} @gol +@@@var{file} -ffile-prefix-map=@var{old}=@var{new} @gol +-fplugin=@var{file} -fplugin-arg-@var{name}=@var{arg} @gol -fdump-ada-spec@r{[}-slim@r{]} -fada-spec-parent=@var{unit} -fdump-go-spec=@var{file}} @item C Language Options @@ -192,10 +208,9 @@ @gccoptlist{-fabi-version=@var{n} -fno-access-control @gol -faligned-new=@var{n} -fargs-in-order=@var{n} -fcheck-new @gol -fconstexpr-depth=@var{n} -fconstexpr-loop-limit=@var{n} @gol --ffriend-injection @gol -fno-elide-constructors @gol -fno-enforce-eh-specs @gol --ffor-scope -fno-for-scope -fno-gnu-keywords @gol +-fno-gnu-keywords @gol -fno-implicit-templates @gol -fno-implicit-inline-templates @gol -fno-implement-inlines -fms-extensions @gol @@ -213,13 +228,16 @@ -fvisibility-ms-compat @gol -fext-numeric-literals @gol -Wabi=@var{n} -Wabi-tag -Wconversion-null -Wctor-dtor-privacy @gol --Wdelete-non-virtual-dtor -Wliteral-suffix -Wmultiple-inheritance @gol +-Wdelete-non-virtual-dtor -Wdeprecated-copy -Wliteral-suffix @gol +-Wmultiple-inheritance -Wno-init-list-lifetime @gol -Wnamespaces -Wnarrowing @gol +-Wpessimizing-move -Wredundant-move @gol -Wnoexcept -Wnoexcept-type -Wclass-memaccess @gol -Wnon-virtual-dtor -Wreorder -Wregister @gol -Weffc++ -Wstrict-null-sentinel -Wtemplates @gol -Wno-non-template-friend -Wold-style-cast @gol -Woverloaded-virtual -Wno-pmf-conversions @gol +-Wno-class-conversion -Wno-terminate @gol -Wsign-promo -Wvirtual-inheritance} @item Objective-C and Objective-C++ Language Options @@ -251,6 +269,8 @@ -fdiagnostics-show-location=@r{[}once@r{|}every-line@r{]} @gol -fdiagnostics-color=@r{[}auto@r{|}never@r{|}always@r{]} @gol -fno-diagnostics-show-option -fno-diagnostics-show-caret @gol +-fno-diagnostics-show-labels -fno-diagnostics-show-line-numbers @gol +-fdiagnostics-minimum-margin-width=@var{width} @gol -fdiagnostics-parseable-fixits -fdiagnostics-generate-patch @gol -fdiagnostics-show-template-tree -fno-elide-type @gol -fno-show-column} @@ -259,16 +279,16 @@ @xref{Warning Options,,Options to Request or Suppress Warnings}. @gccoptlist{-fsyntax-only -fmax-errors=@var{n} -Wpedantic @gol -pedantic-errors @gol --w -Wextra -Wall -Waddress -Waggregate-return @gol --Walloc-zero -Walloc-size-larger-than=@var{n} --Walloca -Walloca-larger-than=@var{n} @gol +-w -Wextra -Wall -Waddress -Waggregate-return -Waligned-new @gol +-Walloc-zero -Walloc-size-larger-than=@var{byte-size} +-Walloca -Walloca-larger-than=@var{byte-size} @gol -Wno-aggressive-loop-optimizations -Warray-bounds -Warray-bounds=@var{n} @gol -Wno-attributes -Wbool-compare -Wbool-operation @gol -Wno-builtin-declaration-mismatch @gol -Wno-builtin-macro-redefined -Wc90-c99-compat -Wc99-c11-compat @gol --Wc++-compat -Wc++11-compat -Wc++14-compat @gol --Wcast-align -Wcast-align=strict -Wcast-qual @gol --Wchar-subscripts -Wchkp -Wcatch-value -Wcatch-value=@var{n} @gol +-Wc++-compat -Wc++11-compat -Wc++14-compat -Wc++17-compat @gol +-Wcast-align -Wcast-align=strict -Wcast-function-type -Wcast-qual @gol +-Wchar-subscripts -Wcatch-value -Wcatch-value=@var{n} @gol -Wclobbered -Wcomment -Wconditionally-supported @gol -Wconversion -Wcoverage-mismatch -Wno-cpp -Wdangling-else -Wdate-time @gol -Wdelete-incomplete @gol @@ -284,18 +304,19 @@ -Wformat-nonliteral -Wformat-overflow=@var{n} @gol -Wformat-security -Wformat-signedness -Wformat-truncation=@var{n} @gol -Wformat-y2k -Wframe-address @gol --Wframe-larger-than=@var{len} -Wno-free-nonheap-object -Wjump-misses-init @gol +-Wframe-larger-than=@var{byte-size} -Wno-free-nonheap-object @gol +-Wjump-misses-init @gol -Wif-not-aligned @gol -Wignored-qualifiers -Wignored-attributes -Wincompatible-pointer-types @gol -Wimplicit -Wimplicit-fallthrough -Wimplicit-fallthrough=@var{n} @gol -Wimplicit-function-declaration -Wimplicit-int @gol -Winit-self -Winline -Wno-int-conversion -Wint-in-bool-context @gol -Wno-int-to-pointer-cast -Winvalid-memory-model -Wno-invalid-offsetof @gol --Winvalid-pch -Wlarger-than=@var{len} @gol +-Winvalid-pch -Wlarger-than=@var{byte-size} @gol -Wlogical-op -Wlogical-not-parentheses -Wlong-long @gol -Wmain -Wmaybe-uninitialized -Wmemset-elt-size -Wmemset-transposed-args @gol --Wmisleading-indentation -Wmissing-braces @gol --Wmissing-field-initializers -Wmissing-include-dirs @gol +-Wmisleading-indentation -Wmissing-attributes -Wmissing-braces @gol +-Wmissing-field-initializers -Wmissing-include-dirs -Wmissing-profile @gol -Wno-multichar -Wmultistatement-macros -Wnonnull -Wnonnull-compare @gol -Wnormalized=@r{[}none@r{|}id@r{|}nfc@r{|}nfkc@r{]} @gol -Wnull-dereference -Wodr -Wno-overflow -Wopenmp-simd @gol @@ -304,7 +325,8 @@ -Wparentheses -Wno-pedantic-ms-format @gol -Wplacement-new -Wplacement-new=@var{n} @gol -Wpointer-arith -Wpointer-compare -Wno-pointer-to-int-cast @gol --Wno-pragmas -Wredundant-decls -Wrestrict -Wno-return-local-addr @gol +-Wno-pragmas -Wno-prio-ctor-dtor -Wredundant-decls @gol +-Wrestrict -Wno-return-local-addr @gol -Wreturn-type -Wsequence-point -Wshadow -Wno-shadow-ivar @gol -Wshadow=global, -Wshadow=local, -Wshadow=compatible-local @gol -Wshift-overflow -Wshift-overflow=@var{n} @gol @@ -312,17 +334,17 @@ -Wsign-compare -Wsign-conversion -Wfloat-conversion @gol -Wno-scalar-storage-order -Wsizeof-pointer-div @gol -Wsizeof-pointer-memaccess -Wsizeof-array-argument @gol --Wstack-protector -Wstack-usage=@var{len} -Wstrict-aliasing @gol +-Wstack-protector -Wstack-usage=@var{byte-size} -Wstrict-aliasing @gol -Wstrict-aliasing=n -Wstrict-overflow -Wstrict-overflow=@var{n} @gol --Wstringop-overflow=@var{n} @gol --Wsuggest-attribute=@r{[}pure@r{|}const@r{|}noreturn@r{|}format@r{]} @gol +-Wstringop-overflow=@var{n} -Wstringop-truncation @gol +-Wsuggest-attribute=@r{[}pure@r{|}const@r{|}noreturn@r{|}format@r{|}malloc@r{]} @gol -Wsuggest-final-types @gol -Wsuggest-final-methods -Wsuggest-override @gol -Wmissing-format-attribute -Wsubobject-linkage @gol -Wswitch -Wswitch-bool -Wswitch-default -Wswitch-enum @gol -Wswitch-unreachable -Wsync-nand @gol -Wsystem-headers -Wtautological-compare -Wtrampolines -Wtrigraphs @gol -Wtype-limits -Wundef @gol --Wuninitialized -Wunknown-pragmas -Wunsafe-loop-optimizations @gol +-Wuninitialized -Wunknown-pragmas @gol -Wunsuffixed-float-constants -Wunused -Wunused-function @gol -Wunused-label -Wunused-local-typedefs -Wunused-macros @gol -Wunused-parameter -Wno-unused-result @gol @@ -330,7 +352,8 @@ -Wunused-const-variable -Wunused-const-variable=@var{n} @gol -Wunused-but-set-parameter -Wunused-but-set-variable @gol -Wuseless-cast -Wvariadic-macros -Wvector-operation-performance @gol --Wvla -Wvla-larger-than=@var{n} -Wvolatile-register-var -Wwrite-strings @gol +-Wvla -Wvla-larger-than=@var{byte-size} -Wvolatile-register-var @gol +-Wwrite-strings @gol -Wzero-as-null-pointer-constant -Whsa} @item C and Objective-C-only Warning Options @@ -342,11 +365,18 @@ @item Debugging Options @xref{Debugging Options,,Options for Debugging Your Program}. -@gccoptlist{-g -g@var{level} -gcoff -gdwarf -gdwarf-@var{version} @gol +@gccoptlist{-g -g@var{level} -gdwarf -gdwarf-@var{version} @gol -ggdb -grecord-gcc-switches -gno-record-gcc-switches @gol -gstabs -gstabs+ -gstrict-dwarf -gno-strict-dwarf @gol +-gas-loc-support -gno-as-loc-support @gol +-gas-locview-support -gno-as-locview-support @gol -gcolumn-info -gno-column-info @gol +-gstatement-frontiers -gno-statement-frontiers @gol +-gvariable-location-views -gno-variable-location-views @gol +-ginternal-reset-location-views -gno-internal-reset-location-views @gol +-ginline-points -gno-inline-points @gol -gvms -gxcoff -gxcoff+ -gz@r{[}=@var{type}@r{]} @gol +-gsplit-dwarf -gdescribe-dies -gno-describe-dies @gol -fdebug-prefix-map=@var{old}=@var{new} -fdebug-types-section @gol -fno-eliminate-unused-debug-types @gol -femit-struct-debug-baseonly -femit-struct-debug-reduced @gol @@ -357,9 +387,11 @@ @item Optimization Options @xref{Optimize Options,,Options that Control Optimization}. -@gccoptlist{-faggressive-loop-optimizations -falign-functions[=@var{n}] @gol --falign-jumps[=@var{n}] @gol --falign-labels[=@var{n}] -falign-loops[=@var{n}] @gol +@gccoptlist{-faggressive-loop-optimizations @gol +-falign-functions[=@var{n}[:@var{m}:[@var{n2}[:@var{m2}]]]] @gol +-falign-jumps[=@var{n}[:@var{m}:[@var{n2}[:@var{m2}]]]] @gol +-falign-labels[=@var{n}[:@var{m}:[@var{n2}[:@var{m2}]]]] @gol +-falign-loops[=@var{n}[:@var{m}:[@var{n2}[:@var{m2}]]]] @gol -fassociative-math -fauto-profile -fauto-profile[=@var{path}] @gol -fauto-inc-dec -fbranch-probabilities @gol -fbranch-target-load-optimize -fbranch-target-load-optimize2 @gol @@ -409,7 +441,8 @@ -freorder-blocks-algorithm=@var{algorithm} @gol -freorder-blocks-and-partition -freorder-functions @gol -frerun-cse-after-loop -freschedule-modulo-scheduled-loops @gol --frounding-math -fsched2-use-superblocks -fsched-pressure @gol +-frounding-math -fsave-optimization-record @gol +-fsched2-use-superblocks -fsched-pressure @gol -fsched-spec-load -fsched-spec-load-dangerous @gol -fsched-stalled-insns-dep[=@var{n}] -fsched-stalled-insns[=@var{n}] @gol -fsched-group-heuristic -fsched-critical-path-heuristic @gol @@ -434,7 +467,7 @@ -ftree-loop-ivcanon -ftree-loop-linear -ftree-loop-optimize @gol -ftree-loop-vectorize @gol -ftree-parallelize-loops=@var{n} -ftree-pre -ftree-partial-pre -ftree-pta @gol --ftree-reassoc -ftree-sink -ftree-slsr -ftree-sra @gol +-ftree-reassoc -ftree-scev-cprop -ftree-sink -ftree-slsr -ftree-sra @gol -ftree-switch-conversion -ftree-tail-merge @gol -ftree-ter -ftree-vectorize -ftree-vrp -funconstrained-commons @gol -funit-at-a-time -funroll-all-loops -funroll-loops @gol @@ -452,16 +485,7 @@ -fsanitize=@var{style} -fsanitize-recover -fsanitize-recover=@var{style} @gol -fasan-shadow-offset=@var{number} -fsanitize-sections=@var{s1},@var{s2},... @gol -fsanitize-undefined-trap-on-error -fbounds-check @gol --fcheck-pointer-bounds -fchkp-check-incomplete-type @gol --fchkp-first-field-has-own-bounds -fchkp-narrow-bounds @gol --fchkp-narrow-to-innermost-array -fchkp-optimize @gol --fchkp-use-fast-string-functions -fchkp-use-nochk-string-functions @gol --fchkp-use-static-bounds -fchkp-use-static-const-bounds @gol --fchkp-treat-zero-dynamic-size-as-infinite -fchkp-check-read @gol --fchkp-check-read -fchkp-check-write -fchkp-store-bounds @gol --fchkp-instrument-calls -fchkp-instrument-marked-only @gol --fchkp-use-wrappers -fchkp-flexible-struct-trailing-arrays@gol --fcf-protection==@r{[}full@r{|}branch@r{|}return@r{|}none@r{]} @gol +-fcf-protection=@r{[}full@r{|}branch@r{|}return@r{|}none@r{]} @gol -fstack-protector -fstack-protector-all -fstack-protector-strong @gol -fstack-protector-explicit -fstack-check @gol -fstack-limit-register=@var{reg} -fstack-limit-symbol=@var{sym} @gol @@ -480,9 +504,9 @@ -dD -dI -dM -dN -dU @gol -fdebug-cpp -fdirectives-only -fdollars-in-identifiers @gol -fexec-charset=@var{charset} -fextended-identifiers @gol --finput-charset=@var{charset} -fno-canonical-system-headers @gol --fpch-deps -fpch-preprocess -fpreprocessed @gol --ftabstop=@var{width} -ftrack-macro-expansion @gol +-finput-charset=@var{charset} -fmacro-prefix-map=@var{old}=@var{new} @gol +-fno-canonical-system-headers @gol -fpch-deps -fpch-preprocess @gol +-fpreprocessed -ftabstop=@var{width} -ftrack-macro-expansion @gol -fwide-exec-charset=@var{charset} -fworking-directory @gol -H -imacros @var{file} -include @var{file} @gol -M -MD -MF -MG -MM -MMD -MP -MQ -MT @gol @@ -498,10 +522,10 @@ @item Linker Options @xref{Link Options,,Options for Linking}. @gccoptlist{@var{object-file-name} -fuse-ld=@var{linker} -l@var{library} @gol --nostartfiles -nodefaultlibs -nostdlib -pie -pthread -rdynamic @gol +-nostartfiles -nodefaultlibs -nolibc -nostdlib @gol +-pie -pthread -r -rdynamic @gol -s -static -static-pie -static-libgcc -static-libstdc++ @gol -static-libasan -static-libtsan -static-liblsan -static-libubsan @gol --static-libmpx -static-libmpxwrappers @gol -shared -shared-libgcc -symbolic @gol -T @var{script} -Wl,@var{option} -Xlinker @var{option} @gol -u @var{symbol} -z @var{keyword}} @@ -546,9 +570,10 @@ -fdisable-rtl-@var{pass-name}=@var{range-list} @gol -fdisable-tree-@var{pass_name} @gol -fdisable-tree-@var{pass-name}=@var{range-list} @gol +-fdump-debug -fdump-earlydebug @gol -fdump-noaddr -fdump-unnumbered -fdump-unnumbered-links @gol -fdump-class-hierarchy@r{[}-@var{n}@r{]} @gol --fdump-final-insns@r{[}=@var{file}@r{]} +-fdump-final-insns@r{[}=@var{file}@r{]} @gol -fdump-ipa-all -fdump-ipa-cgraph -fdump-ipa-inline @gol -fdump-lang-all @gol -fdump-lang-@var{switch} @gol @@ -589,7 +614,7 @@ @gccoptlist{-mabi=@var{name} -mbig-endian -mlittle-endian @gol -mgeneral-regs-only @gol -mcmodel=tiny -mcmodel=small -mcmodel=large @gol --mstrict-align @gol +-mstrict-align -mno-strict-align @gol -momit-leaf-frame-pointer @gol -mtls-dialect=desc -mtls-dialect=traditional @gol -mtls-size=@var{size} @gol @@ -597,7 +622,8 @@ -mlow-precision-recip-sqrt -mlow-precision-sqrt -mlow-precision-div @gol -mpc-relative-literal-loads @gol -msign-return-address=@var{scope} @gol --march=@var{name} -mcpu=@var{name} -mtune=@var{name} -moverride=@var{string}} +-march=@var{name} -mcpu=@var{name} -mtune=@var{name} @gol +-moverride=@var{string} -mverbose-cost-dump -mtrack-speculation} @emph{Adapteva Epiphany Options} @gccoptlist{-mhalf-reg-file -mprefer-short-insn-regs @gol @@ -608,7 +634,7 @@ -msplit-vecmove-early -m1reg-@var{reg}} @emph{ARC Options} -@gccoptlist{-mbarrel-shifter @gol +@gccoptlist{-mbarrel-shifter -mjli-always @gol -mcpu=@var{cpu} -mA6 -mARC600 -mA7 -mARC700 @gol -mdpfp -mdpfp-compact -mdpfp-fast -mno-dpfp-lrsr @gol -mea -mno-mpy -mmul32x16 -mmul64 -matomic @gol @@ -625,7 +651,7 @@ -mmixed-code -mq-class -mRcq -mRcw -msize-level=@var{level} @gol -mtune=@var{cpu} -mmultcost=@var{num} @gol -munalign-prob-threshold=@var{probability} -mmpy-option=@var{multo} @gol --mdiv-rem -mcode-density -mll64 -mfpu=@var{fpu}} +-mdiv-rem -mcode-density -mll64 -mfpu=@var{fpu} -mrf16} @emph{ARM Options} @gccoptlist{-mapcs-frame -mno-apcs-frame @gol @@ -647,7 +673,7 @@ -mpic-register=@var{reg} @gol -mnop-fun-dllimport @gol -mpoke-function-name @gol --mthumb -marm @gol +-mthumb -marm -mflip-thumb @gol -mtpcs-frame -mtpcs-leaf-frame @gol -mcaller-super-interworking -mcallee-super-interworking @gol -mtp=@var{name} -mtls-dialect=@var{dialect} @gol @@ -658,6 +684,7 @@ -mslow-flash-data @gol -masm-syntax-unified @gol -mrestrict-it @gol +-mverbose-cost-dump @gol -mpure-code @gol -mcmse} @@ -666,7 +693,8 @@ -mbranch-cost=@var{cost} @gol -mcall-prologues -mgas-isr-prologues -mint8 @gol -mn_flash=@var{size} -mno-interrupts @gol --mrelax -mrmw -mstrict-X -mtiny-stack -mfract-convert-truncate @gol +-mmain-is-OS_task -mrelax -mrmw -mstrict-X -mtiny-stack @gol +-mfract-convert-truncate @gol -mshort-calls -nodevicelib @gol -Waddr-space-convert -Wmisspelled-isr} @@ -700,6 +728,16 @@ -msim -mint32 -mbit-ops -mdata-model=@var{model}} +@emph{C-SKY Options} +@gccoptlist{-march=@var{arch} -mcpu=@var{cpu} @gol +-mbig-endian -EB -mlittle-endian -EL @gol +-mhard-float -msoft-float -mfpu=@var{fpu} -mdouble-float -mfdivdu @gol +-melrw -mistack -mmp -mcp -mcache -msecurity -mtrust @gol +-mdsp -medsp -mvdsp @gol +-mdiv -msmart -mhigh-registers -manchor @gol +-mpushpop -mmultiple-stld -mconstpool -mstack-size -mccrt @gol +-mbranch-cost=@var{n} -mcse-cc -msched-prolog} + @emph{Darwin Options} @gccoptlist{-all_load -allowable_client -arch -arch_errors_fatal @gol -arch_only -bind_at_load -bundle -bundle_loader @gol @@ -743,7 +781,7 @@ @gccoptlist{-msmall-model -mno-lsim} @emph{FT32 Options} -@gccoptlist{-msim -mlra -mnodiv} +@gccoptlist{-msim -mlra -mnodiv -mft32b -mcompress -mnopm} @emph{FRV Options} @gccoptlist{-mgpr-32 -mgpr-64 -mfpr-32 -mfpr-64 @gol @@ -857,7 +895,8 @@ -mmemcpy -mxl-soft-mul -mxl-soft-div -mxl-barrel-shift @gol -mxl-pattern-compare -mxl-stack-check -mxl-gp-opt -mno-clearbss @gol -mxl-multiply-high -mxl-float-convert -mxl-float-sqrt @gol --mbig-endian -mlittle-endian -mxl-reorder -mxl-mode-@var{app-model}} +-mbig-endian -mlittle-endian -mxl-reorder -mxl-mode-@var{app-model} +-mpic-data-is-text-relative} @emph{MIPS Options} @gccoptlist{-EL -EB -march=@var{arch} -mtune=@var{arch} @gol @@ -877,6 +916,8 @@ -meva -mno-eva @gol -mvirt -mno-virt @gol -mxpa -mno-xpa @gol +-mcrc -mno-crc @gol +-mginv -mno-ginv @gol -mmicromips -mno-micromips @gol -mmsa -mno-msa @gol -mfpu=@var{fpu-type} @gol @@ -937,7 +978,9 @@ @gccoptlist{-mbig-endian -mlittle-endian @gol -mreduced-regs -mfull-regs @gol -mcmov -mno-cmov @gol --mperf-ext -mno-perf-ext @gol +-mext-perf -mno-ext-perf @gol +-mext-perf2 -mno-ext-perf2 @gol +-mext-string -mno-ext-string @gol -mv3push -mno-v3push @gol -m16bit -mno-16bit @gol -misr-vector-size=@var{num} @gol @@ -964,11 +1007,8 @@ @emph{PDP-11 Options} @gccoptlist{-mfpu -msoft-float -mac0 -mno-ac0 -m40 -m45 -m10 @gol --mbcopy -mbcopy-builtin -mint32 -mno-int16 @gol --mint16 -mno-int32 -mfloat32 -mno-float64 @gol --mfloat64 -mno-float32 -mabshi -mno-abshi @gol --mbranch-expensive -mbranch-cheap @gol --munix-asm -mdec-asm} +-mint32 -mno-int16 -mint16 -mno-int32 @gol +-msplit -munix-asm -mdec-asm -mgnu-asm -mlra} @emph{picoChip Options} @gccoptlist{-mae=@var{ae_type} -mvliw-lookahead=@var{N} @gol @@ -977,20 +1017,61 @@ @emph{PowerPC Options} See RS/6000 and PowerPC Options. +@emph{PowerPC SPE Options} +@gccoptlist{-mcpu=@var{cpu-type} @gol +-mtune=@var{cpu-type} @gol +-mmfcrf -mno-mfcrf -mpopcntb -mno-popcntb @gol +-mfull-toc -mminimal-toc -mno-fp-in-toc -mno-sum-in-toc @gol +-m32 -mxl-compat -mno-xl-compat @gol +-malign-power -malign-natural @gol +-msoft-float -mhard-float -mmultiple -mno-multiple @gol +-msingle-float -mdouble-float @gol +-mupdate -mno-update @gol +-mavoid-indexed-addresses -mno-avoid-indexed-addresses @gol +-mstrict-align -mno-strict-align -mrelocatable @gol +-mno-relocatable -mrelocatable-lib -mno-relocatable-lib @gol +-mtoc -mno-toc -mlittle -mlittle-endian -mbig -mbig-endian @gol +-msingle-pic-base @gol +-mprioritize-restricted-insns=@var{priority} @gol +-msched-costly-dep=@var{dependence_type} @gol +-minsert-sched-nops=@var{scheme} @gol +-mcall-sysv -mcall-netbsd @gol +-maix-struct-return -msvr4-struct-return @gol +-mabi=@var{abi-type} -msecure-plt -mbss-plt @gol +-mblock-move-inline-limit=@var{num} @gol +-misel -mno-isel @gol +-misel=yes -misel=no @gol +-mspe -mno-spe @gol +-mspe=yes -mspe=no @gol +-mfloat-gprs=yes -mfloat-gprs=no -mfloat-gprs=single -mfloat-gprs=double @gol +-mprototype -mno-prototype @gol +-msim -mmvme -mads -myellowknife -memb -msdata @gol +-msdata=@var{opt} -mvxworks -G @var{num} @gol +-mrecip -mrecip=@var{opt} -mno-recip -mrecip-precision @gol +-mno-recip-precision @gol +-mpointers-to-nested-functions -mno-pointers-to-nested-functions @gol +-msave-toc-indirect -mno-save-toc-indirect @gol +-mcompat-align-parm -mno-compat-align-parm @gol +-mfloat128 -mno-float128 @gol +-mgnu-attribute -mno-gnu-attribute @gol +-mstack-protector-guard=@var{guard} -mstack-protector-guard-reg=@var{reg} @gol +-mstack-protector-guard-offset=@var{offset}} + @emph{RISC-V Options} @gccoptlist{-mbranch-cost=@var{N-instruction} @gol --mmemcpy -mno-memcpy @gol -mplt -mno-plt @gol -mabi=@var{ABI-string} @gol -mfdiv -mno-fdiv @gol -mdiv -mno-div @gol -march=@var{ISA-string} @gol -mtune=@var{processor-string} @gol +-mpreferred-stack-boundary=@var{num} @gol -msmall-data-limit=@var{N-bytes} @gol -msave-restore -mno-save-restore @gol -mstrict-align -mno-strict-align @gol --mcmodel=@var{code-model} @gol --mexplicit-relocs -mno-explicit-relocs @gol} +-mcmodel=medlow -mcmodel=medany @gol +-mexplicit-relocs -mno-explicit-relocs @gol +-mrelax -mno-relax @gol} @emph{RL78 Options} @gccoptlist{-msim -mmul=none -mmul=g13 -mmul=g14 -mallregs @gol @@ -1012,8 +1093,7 @@ -m64 -m32 -mxl-compat -mno-xl-compat -mpe @gol -malign-power -malign-natural @gol -msoft-float -mhard-float -mmultiple -mno-multiple @gol --msingle-float -mdouble-float -msimple-fpu @gol --mstring -mno-string -mupdate -mno-update @gol +-mupdate -mno-update @gol -mavoid-indexed-addresses -mno-avoid-indexed-addresses @gol -mfused-madd -mno-fused-madd -mbit-align -mno-bit-align @gol -mstrict-align -mno-strict-align -mrelocatable @gol @@ -1023,29 +1103,30 @@ -mprioritize-restricted-insns=@var{priority} @gol -msched-costly-dep=@var{dependence_type} @gol -minsert-sched-nops=@var{scheme} @gol --mcall-sysv -mcall-netbsd @gol +-mcall-aixdesc -mcall-eabi -mcall-freebsd @gol +-mcall-linux -mcall-netbsd -mcall-openbsd @gol +-mcall-sysv -mcall-sysv-eabi -mcall-sysv-noeabi @gol +-mtraceback=@var{traceback_type} @gol -maix-struct-return -msvr4-struct-return @gol -mabi=@var{abi-type} -msecure-plt -mbss-plt @gol -mblock-move-inline-limit=@var{num} @gol +-mblock-compare-inline-limit=@var{num} @gol +-mblock-compare-inline-loop-limit=@var{num} @gol +-mstring-compare-inline-limit=@var{num} @gol -misel -mno-isel @gol --misel=yes -misel=no @gol --mspe -mno-spe @gol --mspe=yes -mspe=no @gol --mpaired @gol -mvrsave -mno-vrsave @gol -mmulhw -mno-mulhw @gol -mdlmzb -mno-dlmzb @gol --mfloat-gprs=yes -mfloat-gprs=no -mfloat-gprs=single -mfloat-gprs=double @gol -mprototype -mno-prototype @gol -msim -mmvme -mads -myellowknife -memb -msdata @gol --msdata=@var{opt} -mvxworks -G @var{num} @gol +-msdata=@var{opt} -mreadonly-in-sdata -mvxworks -G @var{num} @gol -mrecip -mrecip=@var{opt} -mno-recip -mrecip-precision @gol -mno-recip-precision @gol -mveclibabi=@var{type} -mfriz -mno-friz @gol -mpointers-to-nested-functions -mno-pointers-to-nested-functions @gol -msave-toc-indirect -mno-save-toc-indirect @gol -mpower8-fusion -mno-mpower8-fusion -mpower8-vector -mno-power8-vector @gol --mcrypto -mno-crypto -mhtm -mno-htm -mdirect-move -mno-direct-move @gol +-mcrypto -mno-crypto -mhtm -mno-htm @gol -mquad-memory -mno-quad-memory @gol -mquad-memory-atomic -mno-quad-memory-atomic @gol -mcompat-align-parm -mno-compat-align-parm @gol @@ -1196,16 +1277,18 @@ -mincoming-stack-boundary=@var{num} @gol -mcld -mcx16 -msahf -mmovbe -mcrc32 @gol -mrecip -mrecip=@var{opt} @gol --mvzeroupper -mprefer-avx128 -mprefer-avx256 @gol +-mvzeroupper -mprefer-avx128 -mprefer-vector-width=@var{opt} @gol -mmmx -msse -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 -mavx @gol -mavx2 -mavx512f -mavx512pf -mavx512er -mavx512cd -mavx512vl @gol -mavx512bw -mavx512dq -mavx512ifma -mavx512vbmi -msha -maes @gol --mpclmul -mfsgsbase -mrdrnd -mf16c -mfma @gol +-mpclmul -mfsgsbase -mrdrnd -mf16c -mfma -mpconfig -mwbnoinvd @gol -mprefetchwt1 -mclflushopt -mxsavec -mxsaves @gol -msse4a -m3dnow -m3dnowa -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop @gol --mlzcnt -mbmi2 -mfxsr -mxsave -mxsaveopt -mrtm -mlwp -mmpx @gol --mmwaitx -mclzero -mpku -mthreads @gol --mcet -mibt -mshstk @gol +-mlzcnt -mbmi2 -mfxsr -mxsave -mxsaveopt -mrtm -mlwp @gol +-mmwaitx -mclzero -mpku -mthreads -mgfni -mvaes -mwaitpkg @gol +-mshstk -mforce-indirect-call -mavx512vbmi2 @gol +-mvpclmulqdq -mavx512bitalg -mmovdiri -mmovdir64b -mavx512vpopcntdq +-mcldemote @gol -mms-bitfields -mno-align-stringops -minline-all-stringops @gol -minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol -mmemcpy-strategy=@var{strategy} -mmemset-strategy=@var{strategy} @gol @@ -1222,8 +1305,10 @@ -malign-data=@var{type} -mstack-protector-guard=@var{guard} @gol -mstack-protector-guard-reg=@var{reg} @gol -mstack-protector-guard-offset=@var{offset} @gol --mstack-protector-guard-symbol=@var{symbol} -mmitigate-rop @gol --mgeneral-regs-only -mcall-ms2sysv-xlogues} +-mstack-protector-guard-symbol=@var{symbol} @gol +-mgeneral-regs-only -mcall-ms2sysv-xlogues @gol +-mindirect-branch=@var{choice} -mfunction-return=@var{choice} @gol +-mindirect-branch-register} @emph{x86 Windows Options} @gccoptlist{-mconsole -mcygwin -mno-cygwin -mdll @gol @@ -1366,9 +1451,6 @@ package body). Such files are also called @dfn{bodies}. @c GCC also knows about some suffixes for languages not yet included: -@c Pascal: -@c @var{file}.p -@c @var{file}.pas @c Ratfor: @c @var{file}.r @@ -1652,6 +1734,16 @@ @samp{gdb --args}, thus the invocation of @command{cc1} is @samp{gdb --args cc1 @dots{}}. +@item -ffile-prefix-map=@var{old}=@var{new} +@opindex ffile-prefix-map +When compiling files residing in directory @file{@var{old}}, record +any references to them in the result of the compilation as if the +files resided in directory @file{@var{new}} instead. Specifying this +option is equivalent to specifying all the individual +@option{-f*-prefix-map} options. This can be used to make reproducible +builds that are location independent. See also +@option{-fmacro-prefix-map} and @option{-fdebug-prefix-map}. + @item -fplugin=@var{name}.so @opindex fplugin Load the plugin code in file @var{name}.so, assumed to be a @@ -1831,6 +1923,20 @@ Annexes F and G) and the optional Annexes K (Bounds-checking interfaces) and L (Analyzability). The name @samp{c1x} is deprecated. +@item c17 +@itemx c18 +@itemx iso9899:2017 +@itemx iso9899:2018 +ISO C17, the 2017 revision of the ISO C standard +(published in 2018). This standard is +same as C11 except for corrections of defects (all of which are also +applied with @option{-std=c11}) and a new value of +@code{__STDC_VERSION__}, and so is supported to the same extent as C11. + +@item c2x +The next version of the ISO C standard, still under development. The +support for this version is experimental and incomplete. + @item gnu90 @itemx gnu89 GNU dialect of ISO C90 (including some C99 features). @@ -1841,9 +1947,18 @@ @item gnu11 @itemx gnu1x -GNU dialect of ISO C11. This is the default for C code. +GNU dialect of ISO C11. The name @samp{gnu1x} is deprecated. +@item gnu17 +@itemx gnu18 +GNU dialect of ISO C17. This is the default for C code. + +@item gnu2x +The next version of the ISO C standard, still under development, plus +GNU extensions. The support for this version is experimental and +incomplete. + @item c++98 @itemx c++03 The 1998 ISO C++ standard plus the 2003 technical corrigendum and some @@ -2071,7 +2186,7 @@ Enable handling of OpenMP directives @code{#pragma omp} in C/C++ and @code{!$omp} in Fortran. When @option{-fopenmp} is specified, the compiler generates parallel code according to the OpenMP Application -Program Interface v4.5 @w{@uref{http://www.openmp.org/}}. This option +Program Interface v4.5 @w{@uref{https://www.openmp.org}}. This option implies @option{-pthread}, and thus is only supported on targets that have support for @option{-pthread}. @option{-fopenmp} implies @option{-fopenmp-simd}. @@ -2084,18 +2199,6 @@ in C/C++ and @code{!$omp} in Fortran. Other OpenMP directives are ignored. -@item -fcilkplus -@opindex fcilkplus -@cindex Enable Cilk Plus -Enable the usage of Cilk Plus language extension features for C/C++. -When the option @option{-fcilkplus} is specified, enable the usage of -the Cilk Plus Language extension features for C/C++. The present -implementation follows ABI version 1.2. This is an experimental -feature that is only partially complete, and whose interface may -change in future versions of GCC as the official specification -changes. Currently, all features but @code{_Cilk_for} have been -implemented. - @item -fgnu-tm @opindex fgnu-tm When the option @option{-fgnu-tm} is specified, the compiler @@ -2285,6 +2388,15 @@ the mangling now changes starting with the twelfth occurrence. It also implies @option{-fnew-inheriting-ctors}. +Version 12, which first appeared in G++ 8, corrects the calling +conventions for empty classes on the x86_64 target and for classes +with only deleted copy/move constructors. It accidentally changes the +calling convention for classes with a deleted copy constructor and a +trivial move constructor. + +Version 13, which first appeared in G++ 8.2, fixes the accidental +change in version 12. + See also @option{-Wabi}. @item -fabi-compat-version=@var{n} @@ -2294,7 +2406,7 @@ mangled name when defining a symbol with an incorrect mangled name. This switch specifies which ABI version to use for the alias. -With @option{-fabi-version=0} (the default), this defaults to 8 (GCC 5 +With @option{-fabi-version=0} (the default), this defaults to 11 (GCC 7 compatibility). If another ABI version is explicitly selected, this defaults to 0. For compatibility with GCC versions 3.2 through 4.9, use @option{-fabi-compat-version=2}. @@ -2377,19 +2489,6 @@ of the final standard, so it is disabled by default. This option is deprecated, and may be removed in a future version of G++. -@item -ffriend-injection -@opindex ffriend-injection -Inject friend functions into the enclosing namespace, so that they are -visible outside the scope of the class in which they are declared. -Friend functions were documented to work this way in the old Annotated -C++ Reference Manual. -However, in ISO C++ a friend function that is not declared -in an enclosing scope can only be found using argument dependent -lookup. GCC defaults to the standard behavior. - -This option is for compatibility, and may be removed in a future -release of G++. - @item -fno-elide-constructors @opindex fno-elide-constructors The C++ standard allows an implementation to omit creating a temporary @@ -2434,22 +2533,6 @@ @option{-fextern-tls-init}. On targets that do not support symbol aliases, the default is @option{-fno-extern-tls-init}. -@item -ffor-scope -@itemx -fno-for-scope -@opindex ffor-scope -@opindex fno-for-scope -If @option{-ffor-scope} is specified, the scope of variables declared in -a @i{for-init-statement} is limited to the @code{for} loop itself, -as specified by the C++ standard. -If @option{-fno-for-scope} is specified, the scope of variables declared in -a @i{for-init-statement} extends to the end of the enclosing scope, -as was the case in old versions of G++, and other (traditional) -implementations of C++. - -If neither flag is given, the default is to follow the standard, -but to allow and give a warning for old-style code that would -otherwise be invalid, or have different behavior. - @item -fno-gnu-keywords @opindex fno-gnu-keywords Do not recognize @code{typeof} as a keyword, so that code can use this @@ -2859,6 +2942,59 @@ base class does not have a virtual destructor. This warning is enabled by @option{-Wall}. +@item -Wdeprecated-copy @r{(C++ and Objective-C++ only)} +@opindex Wdeprecated-copy +@opindex Wno-deprecated-copy +Warn that the implicit declaration of a copy constructor or copy +assignment operator is deprecated if the class has a user-provided +copy constructor, copy assignment operator, or destructor, in C++11 +and up. This warning is enabled by @option{-Wall}. + +@item -Wno-init-list-lifetime @r{(C++ and Objective-C++ only)} +@opindex Winit-list-lifetime +@opindex Wno-init-list-lifetime +Do not warn about uses of @code{std::initializer_list} that are likely +to result in dangling pointers. Since the underlying array for an +@code{initializer_list} is handled like a normal C++ temporary object, +it is easy to inadvertently keep a pointer to the array past the end +of the array's lifetime. For example: + +@itemize @bullet +@item +If a function returns a temporary @code{initializer_list}, or a local +@code{initializer_list} variable, the array's lifetime ends at the end +of the return statement, so the value returned has a dangling pointer. + +@item +If a new-expression creates an @code{initializer_list}, the array only +lives until the end of the enclosing full-expression, so the +@code{initializer_list} in the heap has a dangling pointer. + +@item +When an @code{initializer_list} variable is assigned from a +brace-enclosed initializer list, the temporary array created for the +right side of the assignment only lives until the end of the +full-expression, so at the next statement the @code{initializer_list} +variable has a dangling pointer. + +@smallexample +// li's initial underlying array lives as long as li +std::initializer_list<int> li = @{ 1,2,3 @}; +// assignment changes li to point to a temporary array +li = @{ 4, 5 @}; +// now the temporary is gone and li has a dangling pointer +int i = li.begin()[0] // undefined behavior +@end smallexample + +@item +When a list constructor stores the @code{begin} pointer from the +@code{initializer_list} argument, this doesn't extend the lifetime of +the array, so if a class variable is constructed from a temporary +@code{initializer_list}, the pointer is left dangling by the end of +the variable declaration statement. + +@end itemize + @item -Wliteral-suffix @r{(C++ and Objective-C++ only)} @opindex Wliteral-suffix @opindex Wno-literal-suffix @@ -2931,29 +3067,39 @@ type changes the mangled name of a symbol relative to C++14. Enabled by @option{-Wabi} and @option{-Wc++17-compat}. +As an example: + @smallexample template <class T> void f(T t) @{ t(); @}; void g() noexcept; -void h() @{ f(g); @} // in C++14 calls f<void(*)()>, in C++17 calls f<void(*)()noexcept> -@end smallexample +void h() @{ f(g); @} +@end smallexample + +@noindent +In C++14, @code{f} calls @code{f<void(*)()>}, but in +C++17 it calls @code{f<void(*)()noexcept>}. @item -Wclass-memaccess @r{(C++ and Objective-C++ only)} @opindex Wclass-memaccess +@opindex Wno-class-memaccess Warn when the destination of a call to a raw memory function such as -@code{memset} or @code{memcpy} is an object of class type writing into which -might bypass the class non-trivial or deleted constructor or copy assignment, -violate const-correctness or encapsulation, or corrupt the virtual table. -Modifying the representation of such objects may violate invariants maintained -by member functions of the class. For example, the call to @code{memset} -below is undefined becase it modifies a non-trivial class object and is, -therefore, diagnosed. The safe way to either initialize or clear the storage -of objects of such types is by using the appropriate constructor or assignment -operator, if one is available. +@code{memset} or @code{memcpy} is an object of class type, and when writing +into such an object might bypass the class non-trivial or deleted constructor +or copy assignment, violate const-correctness or encapsulation, or corrupt +virtual table pointers. Modifying the representation of such objects may +violate invariants maintained by member functions of the class. For example, +the call to @code{memset} below is undefined because it modifies a non-trivial +class object and is, therefore, diagnosed. The safe way to either initialize +or clear the storage of objects of such types is by using the appropriate +constructor or assignment operator, if one is available. @smallexample std::string str = "abc"; -memset (&str, 0, 3); +memset (&str, 0, sizeof str); @end smallexample The @option{-Wclass-memaccess} option is enabled by @option{-Wall}. +Explicitly casting the pointer to the class object to @code{void *} or +to a type that can be safely accessed by the raw memory function suppresses +the warning. @item -Wnon-virtual-dtor @r{(C++ and Objective-C++ only)} @opindex Wnon-virtual-dtor @@ -2994,6 +3140,74 @@ and @code{j} to match the declaration order of the members, emitting a warning to that effect. This warning is enabled by @option{-Wall}. +@item -Wno-pessimizing-move @r{(C++ and Objective-C++ only)} +@opindex Wpessimizing-move +@opindex Wno-pessimizing-move +This warning warns when a call to @code{std::move} prevents copy +elision. A typical scenario when copy elision can occur is when returning in +a function with a class return type, when the expression being returned is the +name of a non-volatile automatic object, and is not a function parameter, and +has the same type as the function return type. + +@smallexample +struct T @{ +@dots{} +@}; +T fn() +@{ + T t; + @dots{} + return std::move (t); +@} +@end smallexample + +But in this example, the @code{std::move} call prevents copy elision. + +This warning is enabled by @option{-Wall}. + +@item -Wno-redundant-move @r{(C++ and Objective-C++ only)} +@opindex Wredundant-move +@opindex Wno-redundant-move +This warning warns about redundant calls to @code{std::move}; that is, when +a move operation would have been performed even without the @code{std::move} +call. This happens because the compiler is forced to treat the object as if +it were an rvalue in certain situations such as returning a local variable, +where copy elision isn't applicable. Consider: + +@smallexample +struct T @{ +@dots{} +@}; +T fn(T t) +@{ + @dots{} + return std::move (t); +@} +@end smallexample + +Here, the @code{std::move} call is redundant. Because G++ implements Core +Issue 1579, another example is: + +@smallexample +struct T @{ // convertible to U +@dots{} +@}; +struct U @{ +@dots{} +@}; +U fn() +@{ + T t; + @dots{} + return std::move (t); +@} +@end smallexample +In this example, copy elision isn't applicable because the type of the +expression being returned and the function return type differ, yet G++ +treats the return value as if it were designated by an rvalue. + +This warning is enabled by @option{-Wextra}. + @item -fext-numeric-literals @r{(C++ and Objective-C++ only)} @opindex fext-numeric-literals @opindex fno-ext-numeric-literals @@ -3122,6 +3336,7 @@ @item -Wtemplates @r{(C++ and Objective-C++ only)} @opindex Wtemplates +@opindex Wno-templates Warn when a primary template declaration is encountered. Some coding rules disallow templates, and this may be used to enforce that rule. The warning is inactive inside a system header file, such as the STL, so @@ -3130,6 +3345,7 @@ @item -Wmultiple-inheritance @r{(C++ and Objective-C++ only)} @opindex Wmultiple-inheritance +@opindex Wno-multiple-inheritance Warn when a class is defined with multiple direct base classes. Some coding rules disallow multiple inheritance, and this may be used to enforce that rule. The warning is inactive inside a system header file, @@ -3138,6 +3354,7 @@ @item -Wvirtual-inheritance @opindex Wvirtual-inheritance +@opindex Wno-virtual-inheritance Warn when a class is defined with a virtual direct base class. Some coding rules disallow multiple inheritance, and this may be used to enforce that rule. The warning is inactive inside a system header file, @@ -3146,6 +3363,7 @@ @item -Wnamespaces @opindex Wnamespaces +@opindex Wno-namespaces Warn when a namespace definition is opened. Some coding rules disallow namespaces, and this may be used to enforce that rule. The warning is inactive inside a system header file, such as the STL, so one can still @@ -3156,6 +3374,13 @@ @opindex Wno-terminate Disable the warning about a throw-expression that will immediately result in a call to @code{terminate}. + +@item -Wno-class-conversion @r{(C++ and Objective-C++ only)} +@opindex Wno-class-conversion +@opindex Wclass-conversion +Disable the warning about the case when a conversion function converts an +object to the same type, to a base class of that type, or to void; such +a conversion function will never be called. @end table @node Objective-C and Objective-C++ Dialect Options @@ -3428,6 +3653,11 @@ done; each error message appears on a single line. This is the default for all front ends. +Note - this option also affects the display of the @samp{#error} and +@samp{#warning} pre-processor directives, and the @samp{deprecated} +function/type/variable attribute. It does not however affect the +@samp{pragma GCC warning} and @samp{pragma GCC error} pragmas. + @item -fdiagnostics-show-location=once @opindex fdiagnostics-show-location Only meaningful in line-wrapping mode. Instructs the diagnostic messages @@ -3575,6 +3805,35 @@ to the terminal, the width is limited to the width given by the @env{COLUMNS} environment variable or, if not set, to the terminal width. +@item -fno-diagnostics-show-labels +@opindex fno-diagnostics-show-labels +@opindex fdiagnostics-show-labels +By default, when printing source code (via @option{-fdiagnostics-show-caret}), +diagnostics can label ranges of source code with pertinent information, such +as the types of expressions: + +@smallexample + printf ("foo %s bar", long_i + long_j); + ~^ ~~~~~~~~~~~~~~~ + | | + char * long int +@end smallexample + +This option suppresses the printing of these labels (in the example above, +the vertical bars and the ``char *'' and ``long int'' text). + +@item -fno-diagnostics-show-line-numbers +@opindex fno-diagnostics-show-line-numbers +@opindex fdiagnostics-show-line-numbers +By default, when printing source code (via @option{-fdiagnostics-show-caret}), +a left margin is printed, showing line numbers. This option suppresses this +left margin. + +@item -fdiagnostics-minimum-margin-width=@var{width} +@opindex -fdiagnostics-minimum-margin-width +This option controls the minimum width of the left margin printed by +@option{-fdiagnostics-show-line-numbers}. It defaults to 6. + @item -fdiagnostics-parseable-fixits @opindex fdiagnostics-parseable-fixits Emit fix-it hints in a machine-parseable format, suitable for consumption @@ -3776,6 +4035,7 @@ @itemx -pedantic @opindex pedantic @opindex Wpedantic +@opindex Wno-pedantic Issue all the warnings demanded by strict ISO C and ISO C++; reject all programs that use forbidden extensions, and some other programs that do not follow ISO C and ISO C++. For ISO C, follows the @@ -3857,6 +4117,7 @@ -Wmemset-elt-size @gol -Wmemset-transposed-args @gol -Wmisleading-indentation @r{(only for C/C++)} @gol +-Wmissing-attributes @gol -Wmissing-braces @r{(only for C/ObjC)} @gol -Wmultistatement-macros @gol -Wnarrowing @r{(only for C++)} @gol @@ -3864,8 +4125,10 @@ -Wnonnull-compare @gol -Wopenmp-simd @gol -Wparentheses @gol +-Wpessimizing-move @r{(only for C++)} @gol -Wpointer-sign @gol -Wreorder @gol +-Wrestrict @gol -Wreturn-type @gol -Wsequence-point @gol -Wsign-compare @r{(only in C++)} @gol @@ -3902,6 +4165,7 @@ name is still supported, but the newer name is more descriptive.) @gccoptlist{-Wclobbered @gol +-Wcast-function-type @gol -Wempty-body @gol -Wignored-qualifiers @gol -Wimplicit-fallthrough=3 @gol @@ -3910,6 +4174,7 @@ -Wold-style-declaration @r{(C only)} @gol -Woverride-init @gol -Wsign-compare @r{(C only)} @gol +-Wredundant-move @r{(only for C++)} @gol -Wtype-limits @gol -Wuninitialized @gol -Wshift-negative-value @r{(in C++03 and in C99 and newer)} @gol @@ -3956,15 +4221,17 @@ @item -Wchkp @opindex Wchkp +@opindex Wno-chkp Warn about an invalid memory access that is found by Pointer Bounds Checker (@option{-fcheck-pointer-bounds}). @item -Wno-coverage-mismatch @opindex Wno-coverage-mismatch +@opindex Wcoverage-mismatch Warn if feedback profiles do not match when using the @option{-fprofile-use} option. -If a source file is changed between compiling with @option{-fprofile-gen} and -with @option{-fprofile-use}, the files with the profile feedback can fail +If a source file is changed between compiling with @option{-fprofile-generate} +and with @option{-fprofile-use}, the files with the profile feedback can fail to match the source file and GCC cannot use the profile feedback information. By default, this warning is enabled and is treated as an error. @option{-Wno-coverage-mismatch} can be used to disable the @@ -4089,7 +4356,7 @@ @table @gcctabopt @item -Wformat-overflow -@item -Wformat-overflow=1 +@itemx -Wformat-overflow=1 @opindex Wformat-overflow @opindex Wno-format-overflow Level @var{1} of @option{-Wformat-overflow} enabled by @option{-Wformat} @@ -4110,7 +4377,7 @@ @smallexample void f (int a, int b) @{ - char buf [12]; + char buf [13]; sprintf (buf, "a = %i, b = %i\n", a, b); @} @end smallexample @@ -4208,9 +4475,9 @@ @table @gcctabopt @item -Wformat-truncation -@item -Wformat-truncation=1 +@itemx -Wformat-truncation=1 @opindex Wformat-truncation -@opindex Wno-format-overflow +@opindex Wno-format-truncation Level @var{1} of @option{-Wformat-truncation} enabled by @option{-Wformat} employs a conservative approach that warns only about calls to bounded functions whose return value is unused and that will most likely result @@ -4446,7 +4713,7 @@ @opindex Wif-not-aligned @opindex Wno-if-not-aligned Control if warning triggered by the @code{warn_if_not_aligned} attribute -should be issued. This is is enabled by default. +should be issued. This is enabled by default. Use @option{-Wno-if-not-aligned} to disable it. @item -Wignored-qualifiers @r{(C and C++ only)} @@ -4518,6 +4785,36 @@ This warning is enabled by @option{-Wall} in C and C++. +@item -Wmissing-attributes +@opindex Wmissing-attributes +@opindex Wno-missing-attributes +Warn when a declaration of a function is missing one or more attributes +that a related function is declared with and whose absence may adversely +affect the correctness or efficiency of generated code. For example, in +C++, the warning is issued when an explicit specialization of a primary +template declared with attribute @code{alloc_align}, @code{alloc_size}, +@code{assume_aligned}, @code{format}, @code{format_arg}, @code{malloc}, +or @code{nonnull} is declared without it. Attributes @code{deprecated}, +@code{error}, and @code{warning} suppress the warning. +(@pxref{Function Attributes}). + +@option{-Wmissing-attributes} is enabled by @option{-Wall}. + +For example, since the declaration of the primary function template +below makes use of both attribute @code{malloc} and @code{alloc_size} +the declaration of the explicit specialization of the template is +diagnosed because it is missing one of the attributes. + +@smallexample +template <class T> +T* __attribute__ ((malloc, alloc_size (1))) +allocate (size_t); + +template <> +void* __attribute__ ((malloc)) // missing alloc_size +allocate<void> (size_t); +@end smallexample + @item -Wmissing-braces @opindex Wmissing-braces @opindex Wno-missing-braces @@ -4538,6 +4835,23 @@ @opindex Wno-missing-include-dirs Warn if a user-supplied include directory does not exist. +@item -Wmissing-profile +@opindex Wmissing-profile +@opindex Wno-missing-profile +Warn if feedback profiles are missing when using the +@option{-fprofile-use} option. +This option diagnoses those cases where a new function or a new file is added +to the user code between compiling with @option{-fprofile-generate} and with +@option{-fprofile-use}, without regenerating the profiles. In these cases, the +profile feedback data files do not contain any profile feedback information for +the newly added function or file respectively. Also, in the case when profile +count data (.gcda) files are removed, GCC cannot use any profile feedback +information. In all these cases, warnings are issued to inform the user that a +profile generation step is due. @option{-Wno-missing-profile} can be used to +disable the warning. Ignoring the warning can result in poorly optimized code. +Completely disabling the warning is not recommended and should be done only +when non-existent profile data is justified. + @item -Wmultistatement-macros @opindex Wmultistatement-macros @opindex Wno-multistatement-macros @@ -4672,7 +4986,7 @@ message, even when @option{-Wno-return-type} is specified. The only exceptions are @code{main} and functions defined in system headers. -This warning is enabled by @option{-Wall}. +This warning is enabled by default for C++ and is enabled by @option{-Wall}. @item -Wshift-count-negative @opindex Wshift-count-negative @@ -4837,6 +5151,7 @@ @item -Wunused-local-typedefs @r{(C, Objective-C, C++ and Objective-C++ only)} @opindex Wunused-local-typedefs +@opindex Wno-unused-local-typedefs Warn when a typedef locally defined in a function is not used. This warning is enabled by @option{-Wall}. @@ -4960,14 +5275,18 @@ @item -Wmaybe-uninitialized @opindex Wmaybe-uninitialized @opindex Wno-maybe-uninitialized -For an automatic variable, if there exists a path from the function -entry to a use of the variable that is initialized, but there exist +For an automatic (i.e.@ local) variable, if there exists a path from the +function entry to a use of the variable that is initialized, but there exist some other paths for which the variable is not initialized, the compiler emits a warning if it cannot prove the uninitialized paths are not -executed at run time. These warnings are made optional because GCC is -not smart enough to see all the reasons why the code might be correct -in spite of appearing to have an error. Here is one example of how -this can happen: +executed at run time. + +These warnings are only possible in optimizing compilation, because otherwise +GCC does not keep track of the state of variables. + +These warnings are made optional because GCC may not be able to determine when +the code is correct in spite of appearing to have an error. Here is one +example of how this can happen: @smallexample @group @@ -4994,9 +5313,7 @@ @cindex @code{longjmp} warnings This option also warns when a non-volatile automatic variable might be -changed by a call to @code{longjmp}. These warnings as well are possible -only in optimizing compilation. - +changed by a call to @code{longjmp}. The compiler sees only the calls to @code{setjmp}. It cannot know where @code{longjmp} will be called; in fact, a signal handler could call it at any point in the code. As a result, you may get a warning @@ -5027,6 +5344,16 @@ invalid syntax, or conflicts between pragmas. See also @option{-Wunknown-pragmas}. +@item -Wno-prio-ctor-dtor +@opindex Wno-prio-ctor-dtor +@opindex Wprio-ctor-dtor +Do not warn if a priority from 0 to 100 is used for constructor or destructor. +The use of constructor and destructor attributes allow you to assign a +priority to the constructor/destructor to control its order of execution +before @code{main} is called or after it returns. The priority values must be +greater than 100 as the compiler reserves priority values between 0--100 for +the implementation. + @item -Wstrict-aliasing @opindex Wstrict-aliasing @opindex Wno-strict-aliasing @@ -5167,7 +5494,7 @@ @table @gcctabopt @item -Wstringop-overflow -@item -Wstringop-overflow=1 +@itemx -Wstringop-overflow=1 @opindex Wstringop-overflow @opindex Wno-stringop-overflow The @option{-Wstringop-overflow=1} option uses type-zero Object Size Checking @@ -5204,7 +5531,64 @@ setting of the option may result in warnings for benign code. @end table -@item -Wsuggest-attribute=@r{[}pure@r{|}const@r{|}noreturn@r{|}format@r{|}cold@r{]} +@item -Wstringop-truncation +@opindex Wstringop-truncation +@opindex Wno-stringop-truncation +Warn for calls to bounded string manipulation functions such as @code{strncat}, +@code{strncpy}, and @code{stpncpy} that may either truncate the copied string +or leave the destination unchanged. + +In the following example, the call to @code{strncat} specifies a bound that +is less than the length of the source string. As a result, the copy of +the source will be truncated and so the call is diagnosed. To avoid the +warning use @code{bufsize - strlen (buf) - 1)} as the bound. + +@smallexample +void append (char *buf, size_t bufsize) +@{ + strncat (buf, ".txt", 3); +@} +@end smallexample + +As another example, the following call to @code{strncpy} results in copying +to @code{d} just the characters preceding the terminating NUL, without +appending the NUL to the end. Assuming the result of @code{strncpy} is +necessarily a NUL-terminated string is a common mistake, and so the call +is diagnosed. To avoid the warning when the result is not expected to be +NUL-terminated, call @code{memcpy} instead. + +@smallexample +void copy (char *d, const char *s) +@{ + strncpy (d, s, strlen (s)); +@} +@end smallexample + +In the following example, the call to @code{strncpy} specifies the size +of the destination buffer as the bound. If the length of the source +string is equal to or greater than this size the result of the copy will +not be NUL-terminated. Therefore, the call is also diagnosed. To avoid +the warning, specify @code{sizeof buf - 1} as the bound and set the last +element of the buffer to @code{NUL}. + +@smallexample +void copy (const char *s) +@{ + char buf[80]; + strncpy (buf, s, sizeof buf); + @dots{} +@} +@end smallexample + +In situations where a character array is intended to store a sequence +of bytes with no terminating @code{NUL} such an array may be annotated +with attribute @code{nonstring} to avoid this warning. Such arrays, +however, are not suitable arguments to functions that expect +@code{NUL}-terminated strings. To help detect accidental misuses of +such arrays GCC issues warnings unless it can prove that the use is +safe. @xref{Common Variable Attributes}. + +@item -Wsuggest-attribute=@r{[}pure@r{|}const@r{|}noreturn@r{|}format@r{|}cold@r{|}malloc@r{]} @opindex Wsuggest-attribute= @opindex Wno-suggest-attribute= Warn for cases where adding an attribute may be beneficial. The @@ -5214,21 +5598,25 @@ @item -Wsuggest-attribute=pure @itemx -Wsuggest-attribute=const @itemx -Wsuggest-attribute=noreturn +@itemx -Wsuggest-attribute=malloc @opindex Wsuggest-attribute=pure @opindex Wno-suggest-attribute=pure @opindex Wsuggest-attribute=const @opindex Wno-suggest-attribute=const @opindex Wsuggest-attribute=noreturn @opindex Wno-suggest-attribute=noreturn +@opindex Wsuggest-attribute=malloc +@opindex Wno-suggest-attribute=malloc Warn about functions that might be candidates for attributes -@code{pure}, @code{const} or @code{noreturn}. The compiler only warns for -functions visible in other compilation units or (in the case of @code{pure} and -@code{const}) if it cannot prove that the function returns normally. A function -returns normally if it doesn't contain an infinite loop or return abnormally -by throwing, calling @code{abort} or trapping. This analysis requires option -@option{-fipa-pure-const}, which is enabled by default at @option{-O} and -higher. Higher optimization levels improve the accuracy of the analysis. +@code{pure}, @code{const} or @code{noreturn} or @code{malloc}. The compiler +only warns for functions visible in other compilation units or (in the case of +@code{pure} and @code{const}) if it cannot prove that the function returns +normally. A function returns normally if it doesn't contain an infinite loop or +return abnormally by throwing, calling @code{abort} or trapping. This analysis +requires option @option{-fipa-pure-const}, which is enabled by default at +@option{-O} and higher. Higher optimization levels improve the accuracy +of the analysis. @item -Wsuggest-attribute=format @itemx -Wmissing-format-attribute @@ -5306,27 +5694,39 @@ of @code{realloc} has been deprecated) relying on it may result in subtle portability bugs and should be avoided. -@item -Walloc-size-larger-than=@var{n} +@item -Walloc-size-larger-than=@var{byte-size} +@opindex Walloc-size-larger-than= +@opindex Wno-alloc-size-larger-than Warn about calls to functions decorated with attribute @code{alloc_size} that attempt to allocate objects larger than the specified number of bytes, or where the result of the size computation in an integer type with infinite -precision would exceed @code{SIZE_MAX / 2}. The option argument @var{n} -may end in one of the standard suffixes designating a multiple of bytes -such as @code{kB} and @code{KiB} for kilobyte and kibibyte, respectively, -@code{MB} and @code{MiB} for megabyte and mebibyte, and so on. +precision would exceed the value of @samp{PTRDIFF_MAX} on the target. +@option{-Walloc-size-larger-than=}@samp{PTRDIFF_MAX} is enabled by default. +Warnings controlled by the option can be disabled either by specifying +@var{byte-size} of @samp{SIZE_MAX} or more or by +@option{-Wno-alloc-size-larger-than}. @xref{Function Attributes}. +@item -Wno-alloc-size-larger-than +@opindex Wno-alloc-size-larger-than +Disable @option{-Walloc-size-larger-than=} warnings. The option is +equivalent to @option{-Walloc-size-larger-than=}@samp{SIZE_MAX} or +larger. + @item -Walloca @opindex Wno-alloca @opindex Walloca This option warns on all uses of @code{alloca} in the source. -@item -Walloca-larger-than=@var{n} -This option warns on calls to @code{alloca} that are not bounded by a -controlling predicate limiting its argument of integer type to at most -@var{n} bytes, or calls to @code{alloca} where the bound is unknown. -Arguments of non-integer types are considered unbounded even if they -appear to be constrained to the expected range. +@item -Walloca-larger-than=@var{byte-size} +@opindex -Walloca-larger-than= +@opindex -Wno-alloca-larger-than +This option warns on calls to @code{alloca} with an integer argument whose +value is either zero, or that is not bounded by a controlling predicate +that limits its value to at most @var{byte-size}. It also warns for calls +to @code{alloca} where the bound value is unknown. Arguments of non-integer +types are considered unbounded even if they appear to be constrained to +the expected range. For example, a bounded case of @code{alloca} could be: @@ -5380,10 +5780,16 @@ This option also warns when @code{alloca} is used in a loop. -This warning is not enabled by @option{-Wall}, and is only active when -@option{-ftree-vrp} is active (default for @option{-O2} and above). - -See also @option{-Wvla-larger-than=@var{n}}. +@option{-Walloca-larger-than=}@samp{PTRDIFF_MAX} is enabled by default +but is usually only effective when @option{-ftree-vrp} is active (default +for @option{-O2} and above). + +See also @option{-Wvla-larger-than=}@samp{byte-size}. + +@item -Wno-alloca-larger-than +@opindex Wno-alloca-larger-than +Disable @option{-Walloca-larger-than=} warnings. The option is +equivalent to @option{-Walloca-larger-than=}@samp{SIZE_MAX} or larger. @item -Warray-bounds @itemx -Warray-bounds=@var{n} @@ -5731,21 +6137,40 @@ This warning is enabled by @option{-Wshadow=local}. -@item -Wlarger-than=@var{len} -@opindex Wlarger-than=@var{len} -@opindex Wlarger-than-@var{len} -Warn whenever an object of larger than @var{len} bytes is defined. - -@item -Wframe-larger-than=@var{len} -@opindex Wframe-larger-than -Warn if the size of a function frame is larger than @var{len} bytes. +@item -Wlarger-than=@var{byte-size} +@opindex Wlarger-than= +@opindex Wlarger-than-@var{byte-size} +Warn whenever an object is defined whose size exceeds @var{byte-size}. +@option{-Wlarger-than=}@samp{PTRDIFF_MAX} is enabled by default. +Warnings controlled by the option can be disabled either by specifying +@var{byte-size} of @samp{SIZE_MAX} or more or by +@option{-Wno-larger-than}. + +@item -Wno-larger-than +@opindex Wno-larger-than +Disable @option{-Wlarger-than=} warnings. The option is equivalent +to @option{-Wlarger-than=}@samp{SIZE_MAX} or larger. + +@item -Wframe-larger-than=@var{byte-size} +@opindex Wframe-larger-than= +@opindex Wno-frame-larger-than +Warn if the size of a function frame exceeds @var{byte-size}. The computation done to determine the stack frame size is approximate and not conservative. -The actual requirements may be somewhat greater than @var{len} +The actual requirements may be somewhat greater than @var{byte-size} even if you do not get a warning. In addition, any space allocated via @code{alloca}, variable-length arrays, or related constructs is not included by the compiler when determining whether or not to issue a warning. +@option{-Wframe-larger-than=}@samp{PTRDIFF_MAX} is enabled by default. +Warnings controlled by the option can be disabled either by specifying +@var{byte-size} of @samp{SIZE_MAX} or more or by +@option{-Wno-frame-larger-than}. + +@item -Wno-frame-larger-than +@opindex Wno-frame-larger-than +Disable @option{-Wframe-larger-than=} warnings. The option is equivalent +to @option{-Wframe-larger-than=}@samp{SIZE_MAX} or larger. @item -Wno-free-nonheap-object @opindex Wno-free-nonheap-object @@ -5753,9 +6178,10 @@ Do not warn when attempting to free an object that was not allocated on the heap. -@item -Wstack-usage=@var{len} +@item -Wstack-usage=@var{byte-size} @opindex Wstack-usage -Warn if the stack usage of a function might be larger than @var{len} bytes. +@opindex Wno-stack-usage +Warn if the stack usage of a function might exceed @var{byte-size}. The computation done to determine the stack usage is conservative. Any space allocated via @code{alloca}, variable-length arrays, or related constructs is included by the compiler when determining whether or not to @@ -5784,6 +6210,16 @@ @end smallexample @end itemize +@option{-Wstack-usage=}@samp{PTRDIFF_MAX} is enabled by default. +Warnings controlled by the option can be disabled either by specifying +@var{byte-size} of @samp{SIZE_MAX} or more or by +@option{-Wno-stack-usage}. + +@item -Wno-stack-usage +@opindex Wno-stack-usage +Disable @option{-Wstack-usage=} warnings. The option is equivalent +to @option{-Wstack-usage=}@samp{SIZE_MAX} or larger. + @item -Wunsafe-loop-optimizations @opindex Wunsafe-loop-optimizations @opindex Wno-unsafe-loop-optimizations @@ -5891,6 +6327,14 @@ @code{<} or @code{>=}. This warning is also enabled by @option{-Wextra}. +@item -Wabsolute-value @r{(C and Objective-C only)} +@opindex Wabsolute-value +@opindex Wno-absolute-value +Warn when a wrong absolute value function seems to be used or when it +does not have any effect because its argument is an unsigned type. +This warning be suppressed with an explicit type cast and it is also +enabled by @option{-Wextra}. + @include cppwarnopts.texi @item -Wbad-function-cast @r{(C and Objective-C only)} @@ -5921,12 +6365,14 @@ @item -Wc++-compat @r{(C and Objective-C only)} @opindex Wc++-compat +@opindex Wno-c++-compat Warn about ISO C constructs that are outside of the common subset of ISO C and ISO C++, e.g.@: request for implicit conversion from @code{void *} to a pointer to non-@code{void} type. @item -Wc++11-compat @r{(C++ and Objective-C++ only)} @opindex Wc++11-compat +@opindex Wno-c++11-compat Warn about C++ constructs whose meaning differs between ISO C++ 1998 and ISO C++ 2011, e.g., identifiers in ISO C++ 1998 that are keywords in ISO C++ 2011. This warning turns on @option{-Wnarrowing} and is @@ -5934,11 +6380,13 @@ @item -Wc++14-compat @r{(C++ and Objective-C++ only)} @opindex Wc++14-compat +@opindex Wno-c++14-compat Warn about C++ constructs whose meaning differs between ISO C++ 2011 and ISO C++ 2014. This warning is enabled by @option{-Wall}. @item -Wc++17-compat @r{(C++ and Objective-C++ only)} @opindex Wc++17-compat +@opindex Wno-c++17-compat Warn about C++ constructs whose meaning differs between ISO C++ 2014 and ISO C++ 2017. This warning is enabled by @option{-Wall}. @@ -5976,6 +6424,21 @@ target is increased. For example, warn if a @code{char *} is cast to an @code{int *} regardless of the target machine. +@item -Wcast-function-type +@opindex Wcast-function-type +@opindex Wno-cast-function-type +Warn when a function pointer is cast to an incompatible function pointer. +In a cast involving function types with a variable argument list only +the types of initial arguments that are provided are considered. +Any parameter of pointer-type matches any other pointer-type. Any benign +differences in integral types are ignored, like @code{int} vs. @code{long} +on ILP32 targets. Likewise type qualifiers are ignored. The function +type @code{void (*) (void)} is special and matches everything, which can +be used to suppress this warning. +In a cast involving pointer to member types this warning warns whenever +the type cast is changing the pointer to member type. +This warning is enabled by @option{-Wextra}. + @item -Wwrite-strings @opindex Wwrite-strings @opindex Wno-write-strings @@ -6216,11 +6679,26 @@ @opindex Wsizeof-pointer-memaccess @opindex Wno-sizeof-pointer-memaccess Warn for suspicious length parameters to certain string and memory built-in -functions if the argument uses @code{sizeof}. This warning warns e.g.@: -about @code{memset (ptr, 0, sizeof (ptr));} if @code{ptr} is not an array, -but a pointer, and suggests a possible fix, or about -@code{memcpy (&foo, ptr, sizeof (&foo));}. This warning is enabled by -@option{-Wall}. +functions if the argument uses @code{sizeof}. This warning triggers for +example for @code{memset (ptr, 0, sizeof (ptr));} if @code{ptr} is not +an array, but a pointer, and suggests a possible fix, or about +@code{memcpy (&foo, ptr, sizeof (&foo));}. @option{-Wsizeof-pointer-memaccess} +also warns about calls to bounded string copy functions like @code{strncat} +or @code{strncpy} that specify as the bound a @code{sizeof} expression of +the source array. For example, in the following function the call to +@code{strncat} specifies the size of the source string as the bound. That +is almost certainly a mistake and so the call is diagnosed. +@smallexample +void make_file (const char *name) +@{ + char path[PATH_MAX]; + strncpy (path, name, sizeof path - 1); + strncat (path, ".text", sizeof ".text"); + @dots{} +@} +@end smallexample + +The @option{-Wsizeof-pointer-memaccess} option is enabled by @option{-Wall}. @item -Wsizeof-array-argument @opindex Wsizeof-array-argument @@ -6512,8 +6990,9 @@ Requires @option{-flto-odr-type-merging} to be enabled. Enabled by default. @item -Wopenmp-simd -@opindex Wopenm-simd -Warn if the vectorizer cost model overrides the OpenMP or the Cilk Plus +@opindex Wopenmp-simd +@opindex Wno-openmp-simd +Warn if the vectorizer cost model overrides the OpenMP simd directive set by user. The @option{-fsimd-cost-model=unlimited} option can be used to relax the cost model. @@ -6615,11 +7094,28 @@ Warn if anything is declared more than once in the same scope, even in cases where multiple declaration is valid and changes nothing. -@item -Wrestrict +@item -Wno-restrict @opindex Wrestrict @opindex Wno-restrict -Warn when an argument passed to a restrict-qualified parameter -aliases with another argument. +Warn when an object referenced by a @code{restrict}-qualified parameter +(or, in C++, a @code{__restrict}-qualified parameter) is aliased by another +argument, or when copies between such objects overlap. For example, +the call to the @code{strcpy} function below attempts to truncate the string +by replacing its initial characters with the last four. However, because +the call writes the terminating NUL into @code{a[4]}, the copies overlap and +the call is diagnosed. + +@smallexample +void foo (void) +@{ + char a[] = "abcd1234"; + strcpy (a, a + 4); + @dots{} +@} +@end smallexample +The @option{-Wrestrict} option detects some instances of simple overlap +even without optimization but works best at @option{-O2} and above. It +is included in @option{-Wall}. @item -Wnested-externs @r{(C and Objective-C only)} @opindex Wnested-externs @@ -6742,21 +7238,29 @@ @option{-Wno-vla} prevents the @option{-Wpedantic} warning of the variable-length array. -@item -Wvla-larger-than=@var{n} -If this option is used, the compiler will warn on uses of -variable-length arrays where the size is either unbounded, or bounded -by an argument that can be larger than @var{n} bytes. This is similar -to how @option{-Walloca-larger-than=@var{n}} works, but with -variable-length arrays. +@item -Wvla-larger-than=@var{byte-size} +@opindex -Wvla-larger-than= +@opindex -Wno-vla-larger-than +If this option is used, the compiler will warn for declarations of +variable-length arrays whose size is either unbounded, or bounded +by an argument that allows the array size to exceed @var{byte-size} +bytes. This is similar to how @option{-Walloca-larger-than=}@var{byte-size} +works, but with variable-length arrays. Note that GCC may optimize small variable-length arrays of a known value into plain arrays, so this warning may not get triggered for such arrays. -This warning is not enabled by @option{-Wall}, and is only active when -@option{-ftree-vrp} is active (default for @option{-O2} and above). - -See also @option{-Walloca-larger-than=@var{n}}. +@option{-Wvla-larger-than=}@samp{PTRDIFF_MAX} is enabled by default but +is typically only effective when @option{-ftree-vrp} is active (default +for @option{-O2} and above). + +See also @option{-Walloca-larger-than=@var{byte-size}}. + +@item -Wno-vla-larger-than +@opindex Wno-vla-larger-than +Disable @option{-Wvla-larger-than=} warnings. The option is equivalent +to @option{-Wvla-larger-than=}@samp{SIZE_MAX} or larger. @item -Wvolatile-register-var @opindex Wvolatile-register-var @@ -6809,6 +7313,7 @@ @item -Wunsuffixed-float-constants @r{(C and Objective-C only)} @opindex Wunsuffixed-float-constants +@opindex Wno-unsuffixed-float-constants Issue a warning for any floating constant that does not have a suffix. When used together with @option{-Wsystem-headers} it @@ -6897,7 +7402,7 @@ Produce debugging information in stabs format (if that is supported), without GDB extensions. This is the format used by DBX on most BSD systems. On MIPS, Alpha and System V Release 4 systems this option -produces stabs debugging output that is not understood by DBX or SDB@. +produces stabs debugging output that is not understood by DBX@. On System V Release 4 systems this option requires the GNU assembler. @item -gstabs+ @@ -6907,12 +7412,6 @@ use of these extensions is likely to make other debuggers crash or refuse to read the program. -@item -gcoff -@opindex gcoff -Produce debugging information in COFF format (if that is supported). -This is the format used by SDB on most System V systems prior to -System V Release 4. - @item -gxcoff @opindex gxcoff Produce debugging information in XCOFF format (if that is supported). @@ -6934,7 +7433,6 @@ @item -g@var{level} @itemx -ggdb@var{level} @itemx -gstabs@var{level} -@itemx -gcoff@var{level} @itemx -gxcoff@var{level} @itemx -gvms@var{level} Request debugging information and also use @var{level} to specify how @@ -6982,13 +7480,14 @@ @item -fdebug-prefix-map=@var{old}=@var{new} @opindex fdebug-prefix-map -When compiling files in directory @file{@var{old}}, record debugging -information describing them as in @file{@var{new}} instead. This can be -used to replace a build-time path with an install-time path in the debug info. -It can also be used to change an absolute path to a relative path by using -@file{.} for @var{new}. This can give more reproducible builds, which are -location independent, but may require an extra command to tell GDB where to -find the source files. +When compiling files residing in directory @file{@var{old}}, record +debugging information describing them as if the files resided in +directory @file{@var{new}} instead. This can be used to replace a +build-time path with an install-time path in the debug info. It can +also be used to change an absolute path to a relative path by using +@file{.} for @var{new}. This can give more reproducible builds, which +are location independent, but may require an extra command to tell GDB +where to find the source files. See also @option{-ffile-prefix-map}. @item -fvar-tracking @opindex fvar-tracking @@ -7021,6 +7520,12 @@ be useful, this option requires a debugger capable of reading @file{.dwo} files. +@item -gdescribe-dies +@opindex gdescribe-dies +Add description attributes to some DWARF DIEs that have no name attribute, +such as artificial variables, external references and call site +parameter DIEs. + @item -gpubnames @opindex gpubnames Generate DWARF @code{.debug_pubnames} and @code{.debug_pubtypes} sections. @@ -7037,13 +7542,13 @@ When using DWARF Version 4 or higher, type DIEs can be put into their own @code{.debug_types} section instead of making them part of the @code{.debug_info} section. It is more efficient to put them in a separate -comdat sections since the linker can then remove duplicates. +comdat section since the linker can then remove duplicates. But not all DWARF consumers support @code{.debug_types} sections yet and on some objects @code{.debug_types} produces larger instead of smaller debugging information. @item -grecord-gcc-switches -@item -gno-record-gcc-switches +@itemx -gno-record-gcc-switches @opindex grecord-gcc-switches @opindex gno-record-gcc-switches This switch causes the command-line options used to invoke the @@ -7066,14 +7571,113 @@ Allow using extensions of later DWARF standard version than selected with @option{-gdwarf-@var{version}}. +@item -gas-loc-support +@opindex gas-loc-support +Inform the compiler that the assembler supports @code{.loc} directives. +It may then use them for the assembler to generate DWARF2+ line number +tables. + +This is generally desirable, because assembler-generated line-number +tables are a lot more compact than those the compiler can generate +itself. + +This option will be enabled by default if, at GCC configure time, the +assembler was found to support such directives. + +@item -gno-as-loc-support +@opindex gno-as-loc-support +Force GCC to generate DWARF2+ line number tables internally, if DWARF2+ +line number tables are to be generated. + +@item gas-locview-support +@opindex gas-locview-support +Inform the compiler that the assembler supports @code{view} assignment +and reset assertion checking in @code{.loc} directives. + +This option will be enabled by default if, at GCC configure time, the +assembler was found to support them. + +@item gno-as-locview-support +Force GCC to assign view numbers internally, if +@option{-gvariable-location-views} are explicitly requested. + @item -gcolumn-info -@item -gno-column-info +@itemx -gno-column-info @opindex gcolumn-info @opindex gno-column-info Emit location column information into DWARF debugging information, rather than just file and line. This option is enabled by default. +@item -gstatement-frontiers +@itemx -gno-statement-frontiers +@opindex gstatement-frontiers +@opindex gno-statement-frontiers +This option causes GCC to create markers in the internal representation +at the beginning of statements, and to keep them roughly in place +throughout compilation, using them to guide the output of @code{is_stmt} +markers in the line number table. This is enabled by default when +compiling with optimization (@option{-Os}, @option{-O}, @option{-O2}, +@dots{}), and outputting DWARF 2 debug information at the normal level. + +@item -gvariable-location-views +@itemx -gvariable-location-views=incompat5 +@itemx -gno-variable-location-views +@opindex gvariable-location-views +@opindex gvariable-location-views=incompat5 +@opindex gno-variable-location-views +Augment variable location lists with progressive view numbers implied +from the line number table. This enables debug information consumers to +inspect state at certain points of the program, even if no instructions +associated with the corresponding source locations are present at that +point. If the assembler lacks support for view numbers in line number +tables, this will cause the compiler to emit the line number table, +which generally makes them somewhat less compact. The augmented line +number tables and location lists are fully backward-compatible, so they +can be consumed by debug information consumers that are not aware of +these augmentations, but they won't derive any benefit from them either. + +This is enabled by default when outputting DWARF 2 debug information at +the normal level, as long as there is assembler support, +@option{-fvar-tracking-assignments} is enabled and +@option{-gstrict-dwarf} is not. When assembler support is not +available, this may still be enabled, but it will force GCC to output +internal line number tables, and if +@option{-ginternal-reset-location-views} is not enabled, that will most +certainly lead to silently mismatching location views. + +There is a proposed representation for view numbers that is not backward +compatible with the location list format introduced in DWARF 5, that can +be enabled with @option{-gvariable-location-views=incompat5}. This +option may be removed in the future, is only provided as a reference +implementation of the proposed representation. Debug information +consumers are not expected to support this extended format, and they +would be rendered unable to decode location lists using it. + +@item -ginternal-reset-location-views +@itemx -gnointernal-reset-location-views +@opindex ginternal-reset-location-views +@opindex gno-internal-reset-location-views +Attempt to determine location views that can be omitted from location +view lists. This requires the compiler to have very accurate insn +length estimates, which isn't always the case, and it may cause +incorrect view lists to be generated silently when using an assembler +that does not support location view lists. The GNU assembler will flag +any such error as a @code{view number mismatch}. This is only enabled +on ports that define a reliable estimation function. + +@item -ginline-points +@itemx -gno-inline-points +@opindex ginline-points +@opindex gno-inline-points +Generate extended debug information for inlined functions. Location +view tracking markers are inserted at inlined entry points, so that +address and view numbers can be computed and output in debug +information. This can be enabled independently of location views, in +which case the view numbers won't be output, but it can only be enabled +along with statement frontiers, and it is only enabled by default if +location views are enabled. + @item -gz@r{[}=@var{type}@r{]} @opindex gz Produce compressed debug sections in DWARF format, if that is supported. @@ -7251,6 +7855,7 @@ -fipa-reference @gol -fmerge-constants @gol -fmove-loop-invariants @gol +-fomit-frame-pointer @gol -freorder-blocks @gol -fshrink-wrap @gol -fshrink-wrap-separate @gol @@ -7268,6 +7873,7 @@ -ftree-forwprop @gol -ftree-fre @gol -ftree-phiprop @gol +-ftree-scev-cprop @gol -ftree-sink @gol -ftree-slsr @gol -ftree-sra @gol @@ -7275,9 +7881,6 @@ -ftree-ter @gol -funit-at-a-time} -@option{-O} also turns on @option{-fomit-frame-pointer} on machines -where doing so does not interfere with debugging. - @item -O2 @opindex O2 Optimize even more. GCC performs nearly all supported optimizations @@ -7339,6 +7942,8 @@ -ftree-loop-vectorize @gol -ftree-loop-distribution @gol -ftree-loop-distribute-patterns @gol +-floop-interchange @gol +-floop-unroll-and-jam @gol -fsplit-paths @gol -ftree-slp-vectorize @gol -fvect-cost-model @gol @@ -7429,29 +8034,18 @@ @item -fomit-frame-pointer @opindex fomit-frame-pointer -Don't keep the frame pointer in a register for functions that -don't need one. This avoids the instructions to save, set up and -restore frame pointers; it also makes an extra register available -in many functions. @strong{It also makes debugging impossible on -some machines.} - -On some machines, such as the VAX, this flag has no effect, because -the standard calling sequence automatically handles the frame pointer -and nothing is saved by pretending it doesn't exist. The -machine-description macro @code{FRAME_POINTER_REQUIRED} controls -whether a target machine supports this flag. @xref{Registers,,Register -Usage, gccint, GNU Compiler Collection (GCC) Internals}. - -The default setting (when not optimizing for -size) for 32-bit GNU/Linux x86 and 32-bit Darwin x86 targets is -@option{-fomit-frame-pointer}. You can configure GCC with the -@option{--enable-frame-pointer} configure option to change the default. - -Note that @option{-fno-omit-frame-pointer} doesn't force a new stack -frame for all functions if it isn't otherwise needed, and hence doesn't -guarantee a new frame pointer for all functions. - -Enabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}. +Omit the frame pointer in functions that don't need one. This avoids the +instructions to save, set up and restore the frame pointer; on many targets +it also makes an extra register available. + +On some targets this flag has no effect because the standard calling sequence +always uses a frame pointer, so it cannot be omitted. + +Note that @option{-fno-omit-frame-pointer} doesn't guarantee the frame pointer +is used in all functions. Several targets always omit the frame pointer in +leaf functions. + +Enabled by default at @option{-O} and higher. @item -foptimize-sibling-calls @opindex foptimize-sibling-calls @@ -7484,7 +8078,7 @@ in this way. This inlining applies to all functions, even those not declared inline. -Enabled at level @option{-O2}. +Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}. @item -findirect-inlining @opindex findirect-inlining @@ -7493,7 +8087,7 @@ when inlining itself is turned on by the @option{-finline-functions} or @option{-finline-small-functions} options. -Enabled at level @option{-O2}. +Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}. @item -finline-functions @opindex finline-functions @@ -7505,7 +8099,7 @@ declared @code{static}, then the function is normally not output as assembler code in its own right. -Enabled at level @option{-O3}. +Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}. @item -finline-functions-called-once @opindex finline-functions-called-once @@ -8358,7 +8952,7 @@ @item -fisolate-erroneous-paths-attribute @opindex fisolate-erroneous-paths-attribute -Detect paths that trigger erroneous or undefined behavior due a null value +Detect paths that trigger erroneous or undefined behavior due to a null value being used in a way forbidden by a @code{returns_nonnull} or @code{nonnull} attribute. Isolate those paths from the main control flow and turn the statement with erroneous or undefined behavior into a trap. This is not @@ -8417,7 +9011,7 @@ @item -ftree-builtin-call-dce @opindex ftree-builtin-call-dce Perform conditional dead code elimination (DCE) for calls to built-in functions -that may set @code{errno} but are otherwise side-effect free. This flag is +that may set @code{errno} but are otherwise free of side effects. This flag is enabled by default at @option{-O2} and higher if @option{-Os} is not also specified. @@ -8449,15 +9043,11 @@ at @option{-O} and higher. @item -ftree-loop-linear -@itemx -floop-interchange @itemx -floop-strip-mine @itemx -floop-block -@itemx -floop-unroll-and-jam @opindex ftree-loop-linear -@opindex floop-interchange @opindex floop-strip-mine @opindex floop-block -@opindex floop-unroll-and-jam Perform loop nest optimizations. Same as @option{-floop-nest-optimize}. To use this code transformation, GCC has to be configured with @option{--with-isl} to enable the Graphite loop @@ -8549,6 +9139,32 @@ @end smallexample and the initialization loop is transformed into a call to memset zero. +@item -floop-interchange +@opindex floop-interchange +Perform loop interchange outside of graphite. This flag can improve cache +performance on loop nest and allow further loop optimizations, like +vectorization, to take place. For example, the loop +@smallexample +for (int i = 0; i < N; i++) + for (int j = 0; j < N; j++) + for (int k = 0; k < N; k++) + c[i][j] = c[i][j] + a[i][k]*b[k][j]; +@end smallexample +is transformed to +@smallexample +for (int i = 0; i < N; i++) + for (int k = 0; k < N; k++) + for (int j = 0; j < N; j++) + c[i][j] = c[i][j] + a[i][k]*b[k][j]; +@end smallexample +This flag is enabled by default at @option{-O3}. + +@item -floop-unroll-and-jam +@opindex floop-unroll-and-jam +Apply unroll and jam transformations on feasible loops. In a loop +nest this unrolls the outer loop by some factor and fuses the resulting +multiple inner loops. This flag is enabled by default at @option{-O3}. + @item -ftree-loop-im @opindex ftree-loop-im Perform loop invariant motion on trees. This pass moves only invariants that @@ -8565,6 +9181,15 @@ optimizations then may determine the number easily. Useful especially in connection with unrolling. +@item -ftree-scev-cprop +@opindex ftree-scev-cprop +Perform final value replacement. If a variable is modified in a loop +in such a way that its value when exiting the loop can be determined using +only its initial value and the number of loop iterations, replace uses of +the final value by such a computation, provided it is sufficiently cheap. +This reduces data dependencies and may allow further simplifications. +Enabled by default at @option{-O} and higher. + @item -fivopts @opindex fivopts Perform induction variable optimizations (strength reduction, induction @@ -8646,7 +9271,7 @@ @item -fsimd-cost-model=@var{model} @opindex fsimd-cost-model Alter the cost model used for vectorization of loops marked with the OpenMP -or Cilk Plus simd directive. The @var{model} argument should be one of +simd directive. The @var{model} argument should be one of @samp{unlimited}, @samp{dynamic}, @samp{cheap}. All values of @var{model} have the same meaning as described in @option{-fvect-cost-model} and by default a cost model defined with @option{-fvect-cost-model} is used. @@ -8691,7 +9316,7 @@ when inlining itself is turned on by the @option{-finline-functions} or @option{-finline-small-functions} options. -Enabled at level @option{-O2}. +Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}. @item -fpredictive-commoning @opindex fpredictive-commoning @@ -8732,9 +9357,9 @@ @end smallexample The @option{-fprintf-return-value} option relies on other optimizations -and yields best results with @option{-O2}. It works in tandem with the -@option{-Wformat-overflow} and @option{-Wformat-truncation} options. -The @option{-fprintf-return-value} option is enabled by default. +and yields best results with @option{-O2} and above. It works in tandem +with the @option{-Wformat-overflow} and @option{-Wformat-truncation} +options. The @option{-fprintf-return-value} option is enabled by default. @item -fno-peephole @itemx -fno-peephole2 @@ -8762,6 +9387,9 @@ some cases, it may be useful to disable the heuristics so that the effects of @code{__builtin_expect} are easier to understand. +It is also possible to specify expected probability of the expression +with @code{__builtin_expect_with_probability} built-in function. + The default is @option{-fguess-branch-probability} at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}. @@ -8798,7 +9426,7 @@ enabled by default (to avoid linker errors), but may be enabled explicitly (if using a working linker). -Enabled for x86 at levels @option{-O2}, @option{-O3}. +Enabled for x86 at levels @option{-O2}, @option{-O3}, @option{-Os}. @item -freorder-functions @opindex freorder-functions @@ -8869,20 +9497,38 @@ @item -falign-functions @itemx -falign-functions=@var{n} +@itemx -falign-functions=@var{n}:@var{m} +@itemx -falign-functions=@var{n}:@var{m}:@var{n2} +@itemx -falign-functions=@var{n}:@var{m}:@var{n2}:@var{m2} @opindex falign-functions Align the start of functions to the next power-of-two greater than -@var{n}, skipping up to @var{n} bytes. For instance, -@option{-falign-functions=32} aligns functions to the next 32-byte -boundary, but @option{-falign-functions=24} aligns to the next -32-byte boundary only if this can be done by skipping 23 bytes or less. +@var{n}, skipping up to @var{m}-1 bytes. This ensures that at least +the first @var{m} bytes of the function can be fetched by the CPU +without crossing an @var{n}-byte alignment boundary. + +If @var{m} is not specified, it defaults to @var{n}. + +Examples: @option{-falign-functions=32} aligns functions to the next +32-byte boundary, @option{-falign-functions=24} aligns to the next +32-byte boundary only if this can be done by skipping 23 bytes or less, +@option{-falign-functions=32:7} aligns to the next +32-byte boundary only if this can be done by skipping 6 bytes or less. + +The second pair of @var{n2}:@var{m2} values allows you to specify +a secondary alignment: @option{-falign-functions=64:7:32:3} aligns to +the next 64-byte boundary if this can be done by skipping 6 bytes or less, +otherwise aligns to the next 32-byte boundary if this can be done +by skipping 2 bytes or less. +If @var{m2} is not specified, it defaults to @var{n2}. + +Some assemblers only support this flag when @var{n} is a power of two; +in that case, it is rounded up. @option{-fno-align-functions} and @option{-falign-functions=1} are equivalent and mean that functions are not aligned. -Some assemblers only support this flag when @var{n} is a power of two; -in that case, it is rounded up. - If @var{n} is not specified or is zero, use a machine-dependent default. +The maximum allowed @var{n} option value is 65536. Enabled at levels @option{-O2}, @option{-O3}. @@ -8894,12 +9540,13 @@ @item -falign-labels @itemx -falign-labels=@var{n} +@itemx -falign-labels=@var{n}:@var{m} +@itemx -falign-labels=@var{n}:@var{m}:@var{n2} +@itemx -falign-labels=@var{n}:@var{m}:@var{n2}:@var{m2} @opindex falign-labels -Align all branch targets to a power-of-two boundary, skipping up to -@var{n} bytes like @option{-falign-functions}. This option can easily -make code slower, because it must insert dummy operations for when the -branch target is reached in the usual flow of the code. - +Align all branch targets to a power-of-two boundary. + +Parameters of this option are analogous to the @option{-falign-functions} option. @option{-fno-align-labels} and @option{-falign-labels=1} are equivalent and mean that labels are not aligned. @@ -8908,19 +9555,24 @@ If @var{n} is not specified or is zero, use a machine-dependent default which is very likely to be @samp{1}, meaning no alignment. +The maximum allowed @var{n} option value is 65536. Enabled at levels @option{-O2}, @option{-O3}. @item -falign-loops @itemx -falign-loops=@var{n} +@itemx -falign-loops=@var{n}:@var{m} +@itemx -falign-loops=@var{n}:@var{m}:@var{n2} +@itemx -falign-loops=@var{n}:@var{m}:@var{n2}:@var{m2} @opindex falign-loops -Align loops to a power-of-two boundary, skipping up to @var{n} bytes -like @option{-falign-functions}. If the loops are -executed many times, this makes up for any execution of the dummy -operations. - +Align loops to a power-of-two boundary. If the loops are executed +many times, this makes up for any execution of the dummy padding +instructions. + +Parameters of this option are analogous to the @option{-falign-functions} option. @option{-fno-align-loops} and @option{-falign-loops=1} are equivalent and mean that loops are not aligned. +The maximum allowed @var{n} option value is 65536. If @var{n} is not specified or is zero, use a machine-dependent default. @@ -8928,16 +9580,20 @@ @item -falign-jumps @itemx -falign-jumps=@var{n} +@itemx -falign-jumps=@var{n}:@var{m} +@itemx -falign-jumps=@var{n}:@var{m}:@var{n2} +@itemx -falign-jumps=@var{n}:@var{m}:@var{n2}:@var{m2} @opindex falign-jumps Align branch targets to a power-of-two boundary, for branch targets -where the targets can only be reached by jumping, skipping up to @var{n} -bytes like @option{-falign-functions}. In this case, no dummy operations -need be executed. - +where the targets can only be reached by jumping. In this case, +no dummy operations need be executed. + +Parameters of this option are analogous to the @option{-falign-functions} option. @option{-fno-align-jumps} and @option{-falign-jumps=1} are equivalent and mean that loops are not aligned. If @var{n} is not specified or is zero, use a machine-dependent default. +The maximum allowed @var{n} option value is 65536. Enabled at levels @option{-O2}, @option{-O3}. @@ -9137,7 +9793,7 @@ and @command{ranlib}; to show the symbols of object files with GIMPLE bytecode, use @command{gcc-nm}. Those commands require that @command{ar}, @command{ranlib} -and @command{nm} have been compiled with plugin support. At link time, use the the +and @command{nm} have been compiled with plugin support. At link time, use the flag @option{-fuse-linker-plugin} to ensure that the library participates in the LTO optimization process: @@ -9171,9 +9827,8 @@ GCC do not work with an older or newer version of GCC. Link-time optimization does not work well with generation of debugging -information. Combining @option{-flto} with -@option{-g} is currently experimental and expected to produce unexpected -results. +information on systems other than those using a combination of ELF and +DWARF. If you specify the optional @var{n}, the optimization and code generation done at link time is executed in parallel using @var{n} @@ -9253,6 +9908,11 @@ @command{gcc-nm}, @command{gcc-ranlib} wrappers to pass the right options to these tools. With non fat LTO makefiles need to be modified to use them. +Note that modern binutils provide plugin auto-load mechanism. +Installing the linker plugin into @file{$libdir/bfd-plugins} has the same +effect as usage of the command wrappers (@command{gcc-ar}, @command{gcc-nm} and +@command{gcc-ranlib}). + The default is @option{-fno-fat-lto-objects} on targets with linker plugin support. @@ -9299,8 +9959,9 @@ By default, GCC emits an error message if the feedback profiles do not match the source code. This error can be turned into a warning by using -@option{-Wcoverage-mismatch}. Note this may result in poorly optimized -code. +@option{-Wno-error=coverage-mismatch}. Note this may result in poorly +optimized code. Additionally, by default, GCC also emits a warning message if +the feedback profiles do not exist (See @option{-Wmissing-profile}). If @var{path} is specified, GCC looks at the @var{path} to find the profile feedback data files. See @option{-fprofile-dir}. @@ -9807,24 +10468,27 @@ tied to the internals of the compiler, and are subject to change without notice in future releases. +In order to get minimal, maximal and default value of a parameter, +one can use @option{--help=param -Q} options. + In each case, the @var{value} is an integer. The allowable choices for @var{name} are: @table @gcctabopt @item predictable-branch-outcome When branch is predicted to be taken with probability lower than this threshold -(in percent), then it is considered well predictable. The default is 10. +(in percent), then it is considered well predictable. @item max-rtl-if-conversion-insns RTL if-conversion tries to remove conditional branches around a block and replace them with conditionally executed instructions. This parameter gives the maximum number of instructions in a block which should be -considered for if-conversion. The default is 10, though the compiler will +considered for if-conversion. The compiler will also use other heuristics to decide whether if-conversion is likely to be profitable. @item max-rtl-if-conversion-predictable-cost -@item max-rtl-if-conversion-unpredictable-cost +@itemx max-rtl-if-conversion-unpredictable-cost RTL if-conversion will try to remove conditional branches around a block and replace them with conditionally executed instructions. These parameters give the maximum permissible cost for the sequence that would be generated @@ -9845,12 +10509,11 @@ The minimum number of instructions that must be matched at the end of two blocks before cross-jumping is performed on them. This value is ignored in the case where all instructions in the block being -cross-jumped from are matched. The default value is 5. +cross-jumped from are matched. @item max-grow-copy-bb-insns The maximum code size expansion factor when copying basic blocks instead of jumping. The expansion is relative to a jump instruction. -The default value is 8. @item max-goto-duplication-insns The maximum number of instructions to duplicate to a block that jumps @@ -9858,7 +10521,7 @@ passes, GCC factors computed gotos early in the compilation process, and unfactors them as late as possible. Only computed jumps at the end of a basic blocks with no more than max-goto-duplication-insns are -unfactored. The default value is 8. +unfactored. @item max-delay-slot-insn-search The maximum number of instructions to consider when looking for an @@ -9885,7 +10548,7 @@ @item max-gcse-insertion-ratio If the ratio of expression insertions to deletions is larger than this value for any expression, then RTL PRE inserts or removes the expression and thus -leaves partially redundant computations in the instruction stream. The default value is 20. +leaves partially redundant computations in the instruction stream. @item max-pending-list-length The maximum number of pending dependencies scheduling allows @@ -9904,7 +10567,6 @@ internal representation) in a single function that the tree inliner considers for inlining. This only affects functions declared inline and methods implemented in a class declaration (C++). -The default value is 400. @item max-inline-insns-auto When you use @option{-finline-functions} (included in @option{-O3}), @@ -9912,7 +10574,6 @@ by the compiler are investigated. To those functions, a different (more restrictive) limit compared to functions declared inline can be applied. -The default value is 40. @item inline-min-speedup When estimated performance improvement of caller + callee runtime exceeds this @@ -9926,11 +10587,10 @@ @option{--param large-function-growth}. This parameter is useful primarily to avoid extreme compilation time caused by non-linear algorithms used by the back end. -The default value is 2700. @item large-function-growth Specifies maximal growth of large function caused by inlining in percents. -The default value is 100 which limits large function growth to 2.0 times +For example, parameter value 100 limits large function growth to 2.0 times the original size. @item large-unit-insns @@ -9943,26 +10603,26 @@ large units consisting of small inlineable functions, however, the overall unit growth limit is needed to avoid exponential explosion of code size. Thus for smaller units, the size is increased to @option{--param large-unit-insns} -before applying @option{--param inline-unit-growth}. The default is 10000. +before applying @option{--param inline-unit-growth}. @item inline-unit-growth Specifies maximal overall growth of the compilation unit caused by inlining. -The default value is 20 which limits unit growth to 1.2 times the original +For example, parameter value 20 limits unit growth to 1.2 times the original size. Cold functions (either marked cold via an attribute or by profile feedback) are not accounted into the unit size. @item ipcp-unit-growth Specifies maximal overall growth of the compilation unit caused by -interprocedural constant propagation. The default value is 10 which limits +interprocedural constant propagation. For example, parameter value 10 limits unit growth to 1.1 times the original size. @item large-stack-frame The limit specifying large stack frames. While inlining the algorithm is trying -to not grow past this limit too much. The default value is 256 bytes. +to not grow past this limit too much. @item large-stack-frame-growth Specifies maximal growth of large stack frames caused by inlining in percents. -The default value is 1000 which limits large stack frame growth to 11 times +For example, parameter value 1000 limits large stack frame growth to 11 times the original size. @item max-inline-insns-recursive @@ -9975,8 +10635,7 @@ declared inline. For functions not declared inline, recursive inlining happens only when @option{-finline-functions} (included in @option{-O3}) is -enabled; @option{--param max-inline-insns-recursive-auto} applies instead. The -default value is 450. +enabled; @option{--param max-inline-insns-recursive-auto} applies instead. @item max-inline-recursive-depth @itemx max-inline-recursive-depth-auto @@ -9985,8 +10644,7 @@ @option{--param max-inline-recursive-depth} applies to functions declared inline. For functions not declared inline, recursive inlining happens only when @option{-finline-functions} (included in @option{-O3}) is -enabled; @option{--param max-inline-recursive-depth-auto} applies instead. The -default value is 8. +enabled; @option{--param max-inline-recursive-depth-auto} applies instead. @item min-inline-recursive-probability Recursive inlining is profitable only for function having deep recursion @@ -9998,12 +10656,10 @@ recursion depth can be guessed from the probability that function recurses via a given call expression. This parameter limits inlining only to call expressions whose probability exceeds the given threshold (in percents). -The default value is 10. @item early-inlining-insns Specify growth that the early inliner can make. In effect it increases the amount of inlining for code having a large abstraction penalty. -The default value is 14. @item max-early-inliner-iterations Limit of iterations of the early inliner. This basically bounds @@ -10012,20 +10668,19 @@ @item comdat-sharing-probability Probability (in percent) that C++ inline function with comdat visibility -are shared across multiple compilation units. The default value is 20. +are shared across multiple compilation units. @item profile-func-internal-id A parameter to control whether to use function internal id in profile database lookup. If the value is 0, the compiler uses an id that is based on function assembler name and filename, which makes old profile data more tolerant to source changes such as function reordering etc. -The default value is 0. @item min-vect-loop-bound The minimum number of iterations under which loops are not vectorized when @option{-ftree-vectorize} is used. The number of iterations after vectorization needs to be greater than the value specified by this option -to allow vectorization. The default value is 0. +to allow vectorization. @item gcse-cost-distance-ratio Scaling factor in calculation of maximum distance an expression @@ -10033,7 +10688,7 @@ code hoisting pass. The bigger the ratio, the more aggressive code hoisting is with simple expressions, i.e., the expressions that have cost less than @option{gcse-unrestricted-cost}. Specifying 0 disables -hoisting of simple expressions. The default value is 10. +hoisting of simple expressions. @item gcse-unrestricted-cost Cost, roughly measured as the cost of a single typical machine @@ -10042,29 +10697,28 @@ supported only in the code hoisting pass. The lesser the cost, the more aggressive code hoisting is. Specifying 0 allows all expressions to travel unrestricted distances. -The default value is 3. @item max-hoist-depth The depth of search in the dominator tree for expressions to hoist. This is used to avoid quadratic behavior in hoisting algorithm. The value of 0 does not limit on the search, but may slow down compilation -of huge functions. The default value is 30. +of huge functions. @item max-tail-merge-comparisons The maximum amount of similar bbs to compare a bb with. This is used to -avoid quadratic behavior in tree tail merging. The default value is 10. +avoid quadratic behavior in tree tail merging. @item max-tail-merge-iterations The maximum amount of iterations of the pass over the function. This is used to -limit compilation time in tree tail merging. The default value is 2. +limit compilation time in tree tail merging. @item store-merging-allow-unaligned Allow the store merging pass to introduce unaligned stores if it is legal to -do so. The default value is 1. +do so. @item max-stores-to-merge The maximum number of stores to attempt to merge into wider stores in the store -merging pass. The minimum value is 2 and the default is 64. +merging pass. @item max-unrolled-insns The maximum number of instructions that a loop may have to be unrolled. @@ -10105,10 +10759,6 @@ @item max-unswitch-level The maximum number of branches unswitched in a single loop. -@item max-loop-headers-insns -The maximum number of insns in loop header duplicated by the copy loop headers -pass. - @item lim-expensive The minimum cost of an expensive expression in the loop invariant motion. @@ -10134,6 +10784,11 @@ Maximum size (in bytes) of objects tracked bytewise by dead store elimination. Larger values may result in larger compilation times. +@item dse-max-alias-queries-per-store +Maximum number of queries into the alias oracle per store. +Larger values result in larger compilation times and may result in more +removed dead stores. + @item scev-max-expr-size Bound on size of expressions used in the scalar evolutions analyzer. Large expressions slow the analyzer. @@ -10181,7 +10836,10 @@ @item builtin-expect-probability Control the probability of the expression having the specified value. This parameter takes a percentage (i.e. 0 ... 100) as input. -The default probability of 90 is obtained empirically. + +@item builtin-string-cmp-inline-length +The maximum length of a constant string for a builtin string cmp call +eligible for inlining. @item align-threshold @@ -10231,27 +10889,23 @@ @item stack-clash-protection-guard-size Specify the size of the operating system provided stack guard as -2 raised to @var{num} bytes. The default value is 12 (4096 bytes). -Acceptable values are between 12 and 30. Higher values may reduce the +2 raised to @var{num} bytes. Higher values may reduce the number of explicit probes, but a value larger than the operating system provided guard will leave code vulnerable to stack clash style attacks. @item stack-clash-protection-probe-interval Stack clash protection involves probing stack space as it is allocated. This param controls the maximum distance between probes into the stack as 2 raised -to @var{num} bytes. Acceptable values are between 10 and 16 and defaults to -12. Higher values may reduce the number of explicit probes, but a value +to @var{num} bytes. Higher values may reduce the number of explicit probes, but a value larger than the operating system provided guard will leave code vulnerable to stack clash style attacks. @item max-cse-path-length The maximum number of basic blocks on path that CSE considers. -The default is 10. @item max-cse-insns The maximum number of instructions CSE processes before flushing. -The default is 1000. @item ggc-min-expand @@ -10291,92 +10945,85 @@ The maximum number of instruction reload should look backward for equivalent register. Increasing values mean more aggressive optimization, making the compilation time increase with probably slightly better performance. -The default value is 100. @item max-cselib-memory-locations The maximum number of memory locations cselib should take into account. Increasing values mean more aggressive optimization, making the compilation time -increase with probably slightly better performance. The default value is 500. +increase with probably slightly better performance. @item max-sched-ready-insns The maximum number of instructions ready to be issued the scheduler should consider at any given time during the first scheduling pass. Increasing values mean more thorough searches, making the compilation time increase -with probably little benefit. The default value is 100. +with probably little benefit. @item max-sched-region-blocks The maximum number of blocks in a region to be considered for -interblock scheduling. The default value is 10. +interblock scheduling. @item max-pipeline-region-blocks The maximum number of blocks in a region to be considered for -pipelining in the selective scheduler. The default value is 15. +pipelining in the selective scheduler. @item max-sched-region-insns The maximum number of insns in a region to be considered for -interblock scheduling. The default value is 100. +interblock scheduling. @item max-pipeline-region-insns The maximum number of insns in a region to be considered for -pipelining in the selective scheduler. The default value is 200. +pipelining in the selective scheduler. @item min-spec-prob The minimum probability (in percents) of reaching a source block -for interblock speculative scheduling. The default value is 40. +for interblock speculative scheduling. @item max-sched-extend-regions-iters The maximum number of iterations through CFG to extend regions. -A value of 0 (the default) disables region extensions. +A value of 0 disables region extensions. @item max-sched-insn-conflict-delay The maximum conflict delay for an insn to be considered for speculative motion. -The default value is 3. @item sched-spec-prob-cutoff The minimal probability of speculation success (in percents), so that speculative insns are scheduled. -The default value is 40. @item sched-state-edge-prob-cutoff The minimum probability an edge must have for the scheduler to save its state across it. -The default value is 10. @item sched-mem-true-dep-cost Minimal distance (in CPU cycles) between store and load targeting same -memory locations. The default value is 1. +memory locations. @item selsched-max-lookahead The maximum size of the lookahead window of selective scheduling. It is a depth of search for available instructions. -The default value is 50. @item selsched-max-sched-times The maximum number of times that an instruction is scheduled during selective scheduling. This is the limit on the number of iterations -through which the instruction may be pipelined. The default value is 2. +through which the instruction may be pipelined. @item selsched-insns-to-rename The maximum number of best instructions in the ready list that are considered -for renaming in the selective scheduler. The default value is 2. +for renaming in the selective scheduler. @item sms-min-sc The minimum value of stage count that swing modulo scheduler -generates. The default value is 2. +generates. @item max-last-value-rtl The maximum size measured as number of RTLs that can be recorded in an expression -in combiner for a pseudo register as last known value of that register. The default -is 10000. +in combiner for a pseudo register as last known value of that register. @item max-combine-insns The maximum number of instructions the RTL combiner tries to combine. -The default value is 2 at @option{-Og} and 4 otherwise. @item integer-share-limit Small integer constants can use a shared data structure, reducing the compiler's memory usage and increasing its speed. This sets the maximum -value of a shared integer constant. The default value is 256. +value of a shared integer constant. @item ssp-buffer-size The minimum size of buffers (i.e.@: arrays) that receive stack smashing @@ -10384,7 +11031,7 @@ @item min-size-for-stack-sharing The minimum size of variables taking part in stack slot sharing when not -optimizing. The default value is 32. +optimizing. @item max-jump-thread-duplication-stmts Maximum number of statements allowed in a block that needs to be @@ -10392,9 +11039,7 @@ @item max-fields-for-field-sensitive Maximum number of fields in a structure treated in -a field sensitive manner during pointer analysis. The default is zero -for @option{-O0} and @option{-O1}, -and 100 for @option{-Os}, @option{-O2}, and @option{-O3}. +a field sensitive manner during pointer analysis. @item prefetch-latency Estimate on average number of instructions that are executed before @@ -10414,6 +11059,37 @@ @item l2-cache-size The size of L2 cache, in kilobytes. +@item prefetch-dynamic-strides +Whether the loop array prefetch pass should issue software prefetch hints +for strides that are non-constant. In some cases this may be +beneficial, though the fact the stride is non-constant may make it +hard to predict when there is clear benefit to issuing these hints. + +Set to 1 if the prefetch hints should be issued for non-constant +strides. Set to 0 if prefetch hints should be issued only for strides that +are known to be constant and below @option{prefetch-minimum-stride}. + +@item prefetch-minimum-stride +Minimum constant stride, in bytes, to start using prefetch hints for. If +the stride is less than this threshold, prefetch hints will not be issued. + +This setting is useful for processors that have hardware prefetchers, in +which case there may be conflicts between the hardware prefetchers and +the software prefetchers. If the hardware prefetchers have a maximum +stride they can handle, it should be used here to improve the use of +software prefetchers. + +A value of -1 means we don't have a threshold and therefore +prefetch hints can be issued for any constant stride. + +This setting is only useful for strides that are known and constant. + +@item loop-interchange-max-num-stmts +The maximum number of stmts in a loop to be interchanged. + +@item loop-interchange-stride-ratio +The minimum ratio between stride of two loops for interchange to be profitable. + @item min-insn-to-prefetch-ratio The minimum ratio between the number of instructions and the number of prefetches to enable prefetching in a loop. @@ -10423,8 +11099,8 @@ number of memory references to enable prefetching in a loop. @item use-canonical-types -Whether the compiler should use the ``canonical'' type system. By -default, this should always be 1, which uses a more efficient internal +Whether the compiler should use the ``canonical'' type system. +Should always be 1, which uses a more efficient internal mechanism for comparing types in C++ and Objective-C++. However, if bugs in the canonical type system are causing compilation failures, set this value to 0 to disable canonical types. @@ -10444,11 +11120,11 @@ which prevents the runaway behavior. Setting a value of 0 for this parameter allows an unlimited set length. -@item sccvn-max-scc-size -Maximum size of a strongly connected component (SCC) during SCCVN -processing. If this limit is hit, SCCVN processing for the whole -function is not done and optimizations depending on it are -disabled. The default maximum SCC size is 10000. +@item rpo-vn-max-loop-depth +Maximum loop depth that is value-numbered optimistically. +When the limit hits the innermost +@var{rpo-vn-max-loop-depth} loops and the outermost loop in the +loop nest are value-numbered optimistically and the remaining ones not. @item sccvn-max-alias-queries-per-access Maximum number of alias-oracle queries we perform when looking for @@ -10456,14 +11132,12 @@ is aborted and the load or store is not considered redundant. The number of queries is algorithmically limited to the number of stores on all paths from the load to the function entry. -The default maximum number of queries is 1000. @item ira-max-loops-num IRA uses regional register allocation by default. If a function contains more loops than the number given by this parameter, only at most the given number of the most frequently-executed loops form regions -for regional register allocation. The default value of the -parameter is 100. +for regional register allocation. @item ira-max-conflict-table-size Although IRA uses a sophisticated algorithm to compress the conflict @@ -10472,37 +11146,33 @@ than the size in MB given by this parameter, the register allocator instead uses a faster, simpler, and lower-quality algorithm that does not require building a pseudo-register conflict table. -The default value of the parameter is 2000. @item ira-loop-reserved-regs IRA can be used to evaluate more accurate register pressure in loops for decisions to move loop invariants (see @option{-O3}). The number of available registers reserved for some other purposes is given -by this parameter. The default value of the parameter is 2, which is -the minimal number of registers needed by typical instructions. -This value is the best found from numerous experiments. +by this parameter. Default of the parameter +is the best found from numerous experiments. @item lra-inheritance-ebb-probability-cutoff LRA tries to reuse values reloaded in registers in subsequent insns. This optimization is called inheritance. EBB is used as a region to do this optimization. The parameter defines a minimal fall-through edge probability in percentage used to add BB to inheritance EBB in -LRA. The default value of the parameter is 40. The value was chosen +LRA. The default value was chosen from numerous runs of SPEC2000 on x86-64. @item loop-invariant-max-bbs-in-loop Loop invariant motion can be very expensive, both in compilation time and in amount of needed compile-time memory, with very large loops. Loops with more basic blocks than this parameter won't have loop invariant -motion optimization performed on them. The default value of the -parameter is 1000 for @option{-O1} and 10000 for @option{-O2} and above. +motion optimization performed on them. @item loop-max-datarefs-for-datadeps Building data dependencies is expensive for very large loops. This parameter limits the number of data references in loops that are considered for data dependence analysis. These large loops are no handled by the optimizations using loop data dependencies. -The default value is 1000. @item max-vartrack-size Sets a maximum number of hash table slots to use during variable @@ -10520,7 +11190,14 @@ low, value expressions that are available and could be represented in debug information may end up not being used; setting this higher may enable the compiler to find more complex debug expressions, but compile -time and memory use may grow. The default is 12. +time and memory use may grow. + +@item max-debug-marker-count +Sets a threshold on the number of debug markers (e.g. begin stmt +markers) to avoid complexity explosion at inlining or expanding to RTL. +If a function has more such gimple stmts than the set limit, such stmts +will be dropped from the inlined copy of a function, and from its RTL +expansion. @item min-nondebug-insn-uid Use uids starting at this parameter for nondebug insns. The range below @@ -10535,7 +11212,7 @@ pointer parameter. @item sra-max-scalarization-size-Ospeed -@item sra-max-scalarization-size-Osize +@itemx sra-max-scalarization-size-Osize The two Scalar Reduction of Aggregates passes (SRA and IPA-SRA) aim to replace scalar parts of aggregates with uses of independent scalar variables. These parameters control the maximum size, in storage units, @@ -10553,8 +11230,8 @@ @item graphite-max-nb-scop-params To avoid exponential effects in the Graphite loop transforms, the -number of parameters in a Static Control Part (SCoP) is bounded. The -default value is 10 parameters, a value of zero can be used to lift +number of parameters in a Static Control Part (SCoP) is bounded. +A value of zero can be used to lift the bound. A variable whose value is unknown at compilation time and defined outside a SCoP is a parameter of the SCoP. @@ -10563,15 +11240,7 @@ @option{-floop-block} or @option{-floop-strip-mine}, strip mine each loop in the loop nest by a given number of iterations. The strip length can be changed using the @option{loop-block-tile-size} -parameter. The default value is 51 iterations. - -@item loop-unroll-jam-size -Specify the unroll factor for the @option{-floop-unroll-and-jam} option. The -default value is 4. - -@item loop-unroll-jam-depth -Specify the dimension to be unrolled (counting from the most inner loop) -for the @option{-floop-unroll-and-jam}. The default value is 2. +parameter. @item ipa-cp-value-list-size IPA-CP attempts to track all possible values and types passed to a function's @@ -10592,7 +11261,6 @@ Percentage penalty functions containing a single call to another function will receive when they are evaluated for cloning. - @item ipa-max-agg-items IPA-CP is also capable to propagate a number of scalar values passed in an aggregate. @option{ipa-max-agg-items} controls the maximum @@ -10620,7 +11288,6 @@ @item lto-partitions Specify desired number of partitions produced during WHOPR compilation. The number of partitions should exceed the number of CPUs used for compilation. -The default value is 32. @item lto-min-partition Size of minimal partition for WHOPR (in estimated instructions). @@ -10634,29 +11301,28 @@ @item cxx-max-namespaces-for-diagnostic-help The maximum number of namespaces to consult for suggestions when C++ -name lookup fails for an identifier. The default is 1000. +name lookup fails for an identifier. @item sink-frequency-threshold The maximum relative execution frequency (in percents) of the target block relative to a statement's original block to allow statement sinking of a statement. Larger numbers result in more aggressive statement sinking. -The default value is 75. A small positive adjustment is applied for +A small positive adjustment is applied for statements with memory operands as those are even more profitable so sink. @item max-stores-to-sink The maximum number of conditional store pairs that can be sunk. Set to 0 if either vectorization (@option{-ftree-vectorize}) or if-conversion -(@option{-ftree-loop-if-convert}) is disabled. The default is 2. +(@option{-ftree-loop-if-convert}) is disabled. @item allow-store-data-races Allow optimizers to introduce new data races on stores. -Set to 1 to allow, otherwise to 0. This option is enabled by default -at optimization level @option{-Ofast}. +Set to 1 to allow, otherwise to 0. @item case-values-threshold The smallest number of different values for which it is best to use a jump-table instead of a tree of conditional branches. If the value is -0, use the default for the machine. The default is 0. +0, use the default for the machine. @item tree-reassoc-width Set the maximum number of instructions executed in parallel in @@ -10726,33 +11392,32 @@ @item use-after-scope-direct-emission-threshold If the size of a local variable in bytes is smaller or equal to this number, directly poison (or unpoison) shadow memory instead of using -run-time callbacks. The default value is 256. - -@item chkp-max-ctor-size -Static constructors generated by Pointer Bounds Checker may become very -large and significantly increase compile time at optimization level -@option{-O1} and higher. This parameter is a maximum number of statements -in a single generated constructor. Default value is 5000. +run-time callbacks. @item max-fsm-thread-path-insns Maximum number of instructions to copy when duplicating blocks on a -finite state automaton jump thread path. The default is 100. +finite state automaton jump thread path. @item max-fsm-thread-length Maximum number of basic blocks on a finite state automaton jump thread -path. The default is 10. +path. @item max-fsm-thread-paths Maximum number of new jump thread paths to create for a finite state -automaton. The default is 50. +automaton. @item parloops-chunk-size -Chunk size of omp schedule for loops parallelized by parloops. The default -is 0. +Chunk size of omp schedule for loops parallelized by parloops. @item parloops-schedule Schedule type of omp schedule for loops parallelized by parloops (static, -dynamic, guided, auto, runtime). The default is static. +dynamic, guided, auto, runtime). + +@item parloops-min-per-thread +The minimum number of iterations per thread of an innermost parallelized +loop for which the parallelized variant is preferred over the single threaded +one. Note that for a parallelized loop nest the +minimum number of iterations of the outermost loop per thread is two. @item max-ssa-name-query-depth Maximum depth of recursion when querying properties of SSA names in things @@ -10772,7 +11437,152 @@ @item max-vrp-switch-assertions The maximum number of assertions to add along the default edge of a switch -statement during VRP. The default is 10. +statement during VRP. + +@item unroll-jam-min-percent +The minimum percentage of memory references that must be optimized +away for the unroll-and-jam transformation to be considered profitable. + +@item unroll-jam-max-unroll +The maximum number of times the outer loop should be unrolled by +the unroll-and-jam transformation. + +@item max-rtl-if-conversion-unpredictable-cost +Maximum permissible cost for the sequence that would be generated +by the RTL if-conversion pass for a branch that is considered unpredictable. + +@item max-variable-expansions-in-unroller +If @option{-fvariable-expansion-in-unroller} is used, the maximum number +of times that an individual variable will be expanded during loop unrolling. + +@item tracer-min-branch-probability-feedback +Stop forward growth if the probability of best edge is less than +this threshold (in percent). Used when profile feedback is available. + +@item partial-inlining-entry-probability +Maximum probability of the entry BB of split region +(in percent relative to entry BB of the function) +to make partial inlining happen. + +@item max-tracked-strlens +Maximum number of strings for which strlen optimization pass will +track string lengths. + +@item gcse-after-reload-partial-fraction +The threshold ratio for performing partial redundancy +elimination after reload. + +@item gcse-after-reload-critical-fraction +The threshold ratio of critical edges execution count that +permit performing redundancy elimination after reload. + +@item max-loop-header-insns +The maximum number of insns in loop header duplicated +by the copy loop headers pass. + +@item vect-epilogues-nomask +Enable loop epilogue vectorization using smaller vector size. + +@item slp-max-insns-in-bb +Maximum number of instructions in basic block to be +considered for SLP vectorization. + +@item avoid-fma-max-bits +Maximum number of bits for which we avoid creating FMAs. + +@item sms-loop-average-count-threshold +A threshold on the average loop count considered by the swing modulo scheduler. + +@item sms-dfa-history +The number of cycles the swing modulo scheduler considers when checking +conflicts using DFA. + +@item hot-bb-count-fraction +Select fraction of the maximal count of repetitions of basic block +in program given basic block needs +to have to be considered hot (used in non-LTO mode) + +@item max-inline-insns-recursive-auto +The maximum number of instructions non-inline function +can grow to via recursive inlining. + +@item graphite-allow-codegen-errors +Whether codegen errors should be ICEs when @option{-fchecking}. + +@item sms-max-ii-factor +A factor for tuning the upper bound that swing modulo scheduler +uses for scheduling a loop. + +@item lra-max-considered-reload-pseudos +The max number of reload pseudos which are considered during +spilling a non-reload pseudo. + +@item max-pow-sqrt-depth +Maximum depth of sqrt chains to use when synthesizing exponentiation +by a real constant. + +@item max-dse-active-local-stores +Maximum number of active local stores in RTL dead store elimination. + +@item asan-instrument-allocas +Enable asan allocas/VLAs protection. + +@item max-iterations-computation-cost +Bound on the cost of an expression to compute the number of iterations. + +@item max-isl-operations +Maximum number of isl operations, 0 means unlimited. + +@item graphite-max-arrays-per-scop +Maximum number of arrays per scop. + +@item max-vartrack-reverse-op-size +Max. size of loc list for which reverse ops should be added. + +@item unlikely-bb-count-fraction +The minimum fraction of profile runs a given basic block execution count +must be not to be considered unlikely. + +@item tracer-dynamic-coverage-feedback +The percentage of function, weighted by execution frequency, +that must be covered by trace formation. +Used when profile feedback is available. + +@item max-inline-recursive-depth-auto +The maximum depth of recursive inlining for non-inline functions. + +@item fsm-scale-path-stmts +Scale factor to apply to the number of statements in a threading path +when comparing to the number of (scaled) blocks. + +@item fsm-maximum-phi-arguments +Maximum number of arguments a PHI may have before the FSM threader +will not try to thread through its block. + +@item uninit-control-dep-attempts +Maximum number of nested calls to search for control dependencies +during uninitialized variable analysis. + +@item indir-call-topn-profile +Track top N target addresses in indirect-call profile. + +@item max-once-peeled-insns +The maximum number of insns of a peeled loop that rolls only once. + +@item sra-max-scalarization-size-Osize +Maximum size, in storage units, of an aggregate +which should be considered for scalarization when compiling for size. + +@item fsm-scale-path-blocks +Scale factor to apply to the number of blocks in a threading path +when comparing to the number of (scaled) statements. + +@item sched-autopref-queue-depth +Hardware autoprefetcher scheduler model control flag. +Number of lookahead cycles the model looks into; at ' +' only enable instruction sorting heuristic. + + @end table @end table @@ -10868,9 +11678,9 @@ Run the program on a representative workload to generate the arc profile information. This may be repeated any number of times. You can run concurrent instances of your program, and provided that the file system -supports locking, the data files will be correctly updated. Also -@code{fork} calls are detected and correctly handled (double counting -will not happen). +supports locking, the data files will be correctly updated. Unless +a strict ISO C dialect option is in effect, @code{fork} calls are +detected and correctly handled without double counting. @item For profile-directed optimizations, compile the source files again with @@ -10921,6 +11731,24 @@ and its related options. Both absolute and relative paths can be used. By default, GCC uses the current directory as @var{path}, thus the profile data file appears in the same directory as the object file. +In order to prevent the file name clashing, if the object file name is +not an absolute path, we mangle the absolute path of the +@file{@var{sourcename}.gcda} file and use it as the file name of a +@file{.gcda} file. + +When an executable is run in a massive parallel environment, it is recommended +to save profile to different folders. That can be done with variables +in @var{path} that are exported during run-time: + +@table @gcctabopt + +@item %p +process ID. + +@item %q@{VAR@} +value of environment variable @var{VAR} + +@end table @item -fprofile-generate @itemx -fprofile-generate=@var{path} @@ -10968,14 +11796,34 @@ the available options are shown at startup of the instrumented program. See @url{https://github.com/google/sanitizers/wiki/AddressSanitizerFlags#run-time-flags} for a list of supported options. -The option cannot be combined with @option{-fsanitize=thread} -and/or @option{-fcheck-pointer-bounds}. +The option cannot be combined with @option{-fsanitize=thread}. @item -fsanitize=kernel-address @opindex fsanitize=kernel-address Enable AddressSanitizer for Linux kernel. See @uref{https://github.com/google/kasan/wiki} for more details. -The option cannot be combined with @option{-fcheck-pointer-bounds}. + +@item -fsanitize=pointer-compare +@opindex fsanitize=pointer-compare +Instrument comparison operation (<, <=, >, >=) with pointer operands. +The option must be combined with either @option{-fsanitize=kernel-address} or +@option{-fsanitize=address} +The option cannot be combined with @option{-fsanitize=thread}. +Note: By default the check is disabled at run time. To enable it, +add @code{detect_invalid_pointer_pairs=2} to the environment variable +@env{ASAN_OPTIONS}. Using @code{detect_invalid_pointer_pairs=1} detects +invalid operation only when both pointers are non-null. + +@item -fsanitize=pointer-subtract +@opindex fsanitize=pointer-subtract +Instrument subtraction with pointer operands. +The option must be combined with either @option{-fsanitize=kernel-address} or +@option{-fsanitize=address} +The option cannot be combined with @option{-fsanitize=thread}. +Note: By default the check is disabled at run time. To enable it, +add @code{detect_invalid_pointer_pairs=2} to the environment variable +@env{ASAN_OPTIONS}. Using @code{detect_invalid_pointer_pairs=1} detects +invalid operation only when both pointers are non-null. @item -fsanitize=thread @opindex fsanitize=thread @@ -10987,7 +11835,7 @@ @url{https://github.com/google/sanitizers/wiki/ThreadSanitizerFlags} for a list of supported options. The option cannot be combined with @option{-fsanitize=address}, -@option{-fsanitize=leak} and/or @option{-fcheck-pointer-bounds}. +@option{-fsanitize=leak}. Note that sanitized atomic builtins cannot throw exceptions when operating on invalid memory addresses with non-call exceptions @@ -11080,15 +11928,13 @@ This option enables instrumentation of array bounds. Various out of bounds accesses are detected. Flexible array members, flexible array member-like arrays, and initializers of variables with static storage are not instrumented. -The option cannot be combined with @option{-fcheck-pointer-bounds}. @item -fsanitize=bounds-strict @opindex fsanitize=bounds-strict This option enables strict instrumentation of array bounds. Most out of bounds accesses are detected, including flexible array members and flexible array member-like arrays. Initializers of variables with static storage are not -instrumented. The option cannot be combined -with @option{-fcheck-pointer-bounds}. +instrumented. @item -fsanitize=alignment @opindex fsanitize=alignment @@ -11262,172 +12108,7 @@ @code{__sanitizer_cov_trace_cmpd} for float or double comparisons and @code{__sanitizer_cov_trace_switch} for switch statements. -@item -fbounds-check -@opindex fbounds-check -For front ends that support it, generate additional code to check that -indices used to access arrays are within the declared range. This is -currently only supported by the Fortran front end, where this option -defaults to false. - -@item -fcheck-pointer-bounds -@opindex fcheck-pointer-bounds -@opindex fno-check-pointer-bounds -@cindex Pointer Bounds Checker options -Enable Pointer Bounds Checker instrumentation. Each memory reference -is instrumented with checks of the pointer used for memory access against -bounds associated with that pointer. - -Currently there -is only an implementation for Intel MPX available, thus x86 GNU/Linux target -and @option{-mmpx} are required to enable this feature. -MPX-based instrumentation requires -a runtime library to enable MPX in hardware and handle bounds -violation signals. By default when @option{-fcheck-pointer-bounds} -and @option{-mmpx} options are used to link a program, the GCC driver -links against the @file{libmpx} and @file{libmpxwrappers} libraries. -Bounds checking on calls to dynamic libraries requires a linker -with @option{-z bndplt} support; if GCC was configured with a linker -without support for this option (including the Gold linker and older -versions of ld), a warning is given if you link with @option{-mmpx} -without also specifying @option{-static}, since the overall effectiveness -of the bounds checking protection is reduced. -See also @option{-static-libmpxwrappers}. - -MPX-based instrumentation -may be used for debugging and also may be included in production code -to increase program security. Depending on usage, you may -have different requirements for the runtime library. The current version -of the MPX runtime library is more oriented for use as a debugging -tool. MPX runtime library usage implies @option{-lpthread}. See -also @option{-static-libmpx}. The runtime library behavior can be -influenced using various @env{CHKP_RT_*} environment variables. See -@uref{https://gcc.gnu.org/wiki/Intel%20MPX%20support%20in%20the%20GCC%20compiler} -for more details. - -Generated instrumentation may be controlled by various -@option{-fchkp-*} options and by the @code{bnd_variable_size} -structure field attribute (@pxref{Type Attributes}) and -@code{bnd_legacy}, and @code{bnd_instrument} function attributes -(@pxref{Function Attributes}). GCC also provides a number of built-in -functions for controlling the Pointer Bounds Checker. @xref{Pointer -Bounds Checker builtins}, for more information. - -@item -fchkp-check-incomplete-type -@opindex fchkp-check-incomplete-type -@opindex fno-chkp-check-incomplete-type -Generate pointer bounds checks for variables with incomplete type. -Enabled by default. - -@item -fchkp-narrow-bounds -@opindex fchkp-narrow-bounds -@opindex fno-chkp-narrow-bounds -Controls bounds used by Pointer Bounds Checker for pointers to object -fields. If narrowing is enabled then field bounds are used. Otherwise -object bounds are used. See also @option{-fchkp-narrow-to-innermost-array} -and @option{-fchkp-first-field-has-own-bounds}. Enabled by default. - -@item -fchkp-first-field-has-own-bounds -@opindex fchkp-first-field-has-own-bounds -@opindex fno-chkp-first-field-has-own-bounds -Forces Pointer Bounds Checker to use narrowed bounds for the address of the -first field in the structure. By default a pointer to the first field has -the same bounds as a pointer to the whole structure. - -@item -fchkp-flexible-struct-trailing-arrays -@opindex fchkp-flexible-struct-trailing-arrays -@opindex fno-chkp-flexible-struct-trailing-arrays -Forces Pointer Bounds Checker to treat all trailing arrays in structures as -possibly flexible. By default only array fields with zero length or that are -marked with attribute bnd_variable_size are treated as flexible. - -@item -fchkp-narrow-to-innermost-array -@opindex fchkp-narrow-to-innermost-array -@opindex fno-chkp-narrow-to-innermost-array -Forces Pointer Bounds Checker to use bounds of the innermost arrays in -case of nested static array access. By default this option is disabled and -bounds of the outermost array are used. - -@item -fchkp-optimize -@opindex fchkp-optimize -@opindex fno-chkp-optimize -Enables Pointer Bounds Checker optimizations. Enabled by default at -optimization levels @option{-O}, @option{-O2}, @option{-O3}. - -@item -fchkp-use-fast-string-functions -@opindex fchkp-use-fast-string-functions -@opindex fno-chkp-use-fast-string-functions -Enables use of @code{*_nobnd} versions of string functions (not copying bounds) -by Pointer Bounds Checker. Disabled by default. - -@item -fchkp-use-nochk-string-functions -@opindex fchkp-use-nochk-string-functions -@opindex fno-chkp-use-nochk-string-functions -Enables use of @code{*_nochk} versions of string functions (not checking bounds) -by Pointer Bounds Checker. Disabled by default. - -@item -fchkp-use-static-bounds -@opindex fchkp-use-static-bounds -@opindex fno-chkp-use-static-bounds -Allow Pointer Bounds Checker to generate static bounds holding -bounds of static variables. Enabled by default. - -@item -fchkp-use-static-const-bounds -@opindex fchkp-use-static-const-bounds -@opindex fno-chkp-use-static-const-bounds -Use statically-initialized bounds for constant bounds instead of -generating them each time they are required. By default enabled when -@option{-fchkp-use-static-bounds} is enabled. - -@item -fchkp-treat-zero-dynamic-size-as-infinite -@opindex fchkp-treat-zero-dynamic-size-as-infinite -@opindex fno-chkp-treat-zero-dynamic-size-as-infinite -With this option, objects with incomplete type whose -dynamically-obtained size is zero are treated as having infinite size -instead by Pointer Bounds -Checker. This option may be helpful if a program is linked with a library -missing size information for some symbols. Disabled by default. - -@item -fchkp-check-read -@opindex fchkp-check-read -@opindex fno-chkp-check-read -Instructs Pointer Bounds Checker to generate checks for all read -accesses to memory. Enabled by default. - -@item -fchkp-check-write -@opindex fchkp-check-write -@opindex fno-chkp-check-write -Instructs Pointer Bounds Checker to generate checks for all write -accesses to memory. Enabled by default. - -@item -fchkp-store-bounds -@opindex fchkp-store-bounds -@opindex fno-chkp-store-bounds -Instructs Pointer Bounds Checker to generate bounds stores for -pointer writes. Enabled by default. - -@item -fchkp-instrument-calls -@opindex fchkp-instrument-calls -@opindex fno-chkp-instrument-calls -Instructs Pointer Bounds Checker to pass pointer bounds to calls. -Enabled by default. - -@item -fchkp-instrument-marked-only -@opindex fchkp-instrument-marked-only -@opindex fno-chkp-instrument-marked-only -Instructs Pointer Bounds Checker to instrument only functions -marked with the @code{bnd_instrument} attribute -(@pxref{Function Attributes}). Disabled by default. - -@item -fchkp-use-wrappers -@opindex fchkp-use-wrappers -@opindex fno-chkp-use-wrappers -Allows Pointer Bounds Checker to replace calls to built-in functions -with calls to wrapper functions. When @option{-fchkp-use-wrappers} -is used to link a program, the GCC driver automatically links -against @file{libmpxwrappers}. See also @option{-static-libmpxwrappers}. -Enabled by default. - -@item -fcf-protection==@r{[}full@r{|}branch@r{|}return@r{|}none@r{]} +@item -fcf-protection=@r{[}full@r{|}branch@r{|}return@r{|}none@r{]} @opindex fcf-protection Enable code instrumentation of control-flow transfers to increase program security by checking that target addresses of control-flow @@ -11445,14 +12126,17 @@ @code{branch} and @code{return}. The value @code{none} turns off instrumentation. +The macro @code{__CET__} is defined when @option{-fcf-protection} is +used. The first bit of @code{__CET__} is set to 1 for the value +@code{branch} and the second bit of @code{__CET__} is set to 1 for +the @code{return}. + You can also use the @code{nocf_check} attribute to identify which functions and calls should be skipped from instrumentation (@pxref{Function Attributes}). Currently the x86 GNU/Linux target provides an implementation based -on Intel Control-flow Enforcement Technology (CET). Instrumentation -for x86 is controlled by target-specific options @option{-mcet}, -@option{-mibt} and @option{-mshstk} (@pxref{x86 Options}). +on Intel Control-flow Enforcement Technology (CET). @item -fstack-protector @opindex fstack-protector @@ -11850,6 +12534,50 @@ object file names should not be used as arguments. @xref{Overall Options}. +@item -flinker-output=@var{type} +@opindex -flinker-output +This option controls the code generation of the link time optimizer. By +default the linker output is determined by the linker plugin automatically. For +debugging the compiler and in the case of incremental linking to non-lto object +file is desired, it may be useful to control the type manually. + +If @var{type} is @samp{exec} the code generation is configured to produce static +binary. In this case @option{-fpic} and @option{-fpie} are both disabled. + +If @var{type} is @samp{dyn} the code generation is configured to produce shared +library. In this case @option{-fpic} or @option{-fPIC} is preserved, but not +enabled automatically. This makes it possible to build shared libraries without +position independent code on architectures this is possible, i.e. on x86. + +If @var{type} is @samp{pie} the code generation is configured to produce +@option{-fpie} executable. This result in similar optimizations as @samp{exec} +except that @option{-fpie} is not disabled if specified at compilation time. + +If @var{type} is @samp{rel} the compiler assumes that incremental linking is +done. The sections containing intermediate code for link-time optimization are +merged, pre-optimized, and output to the resulting object file. In addition, if +@option{-ffat-lto-objects} is specified the binary code is produced for future +non-lto linking. The object file produced by incremental linking will be smaller +than a static library produced from the same object files. At link-time the +result of incremental linking will also load faster to compiler than a static +library assuming that majority of objects in the library are used. + +Finally @samp{nolto-rel} configure compiler to for incremental linking where +code generation is forced, final binary is produced and the intermediate code +for later link-time optimization is stripped. When multiple object files are +linked together the resulting code will be optimized better than with link time +optimizations disabled (for example, the cross-module inlining will happen), +most of benefits of whole program optimizations are however lost. + +During the incremental link (by @option{-r}) the linker plugin will default to +@option{rel}. With current interfaces to GNU Binutils it is however not +possible to link incrementally LTO objects and non-LTO objects into a single +mixed object file. In the case any of object files in incremental link can not +be used for link-time optimization the linker plugin will output warning and +use @samp{nolto-rel}. To maintain the whole program optimization it is +recommended to link such objects into static library instead. Alternatively it +is possible to use H.J. Lu's binutils with support for mixed objects. + @item -fuse-ld=bfd @opindex fuse-ld=bfd Use the @command{bfd} linker instead of the default linker. @@ -11896,8 +12624,8 @@ @item -nostartfiles @opindex nostartfiles Do not use the standard system startup files when linking. -The standard system libraries are used normally, unless @option{-nostdlib} -or @option{-nodefaultlibs} is used. +The standard system libraries are used normally, unless @option{-nostdlib}, +@option{-nolibc}, or @option{-nodefaultlibs} is used. @item -nodefaultlibs @opindex nodefaultlibs @@ -11914,6 +12642,18 @@ libc. These entry points should be supplied through some other mechanism when this option is specified. +@item -nolibc +@opindex nolibc +Do not use the C library or system libraries tightly coupled with it when +linking. Still link with the startup files, @file{libgcc} or toolchain +provided language support libraries such as @file{libgnat}, @file{libgfortran} +or @file{libstdc++} unless options preventing their inclusion are used as +well. This typically removes @option{-lc} from the link command line, as well +as system libraries that normally go with it and become meaningless when +absence of a C library is assumed, for example @option{-lpthread} or +@option{-lm} in some configurations. This is intended for bare-board +targets when there is indeed no C library available. + @item -nostdlib @opindex nostdlib Do not use the standard system startup files or libraries when linking. @@ -11977,6 +12717,11 @@ flags for the preprocessor, so it should be used consistently for both compilation and linking. +@item -r +@opindex r +Produce a relocatable object as output. This is also known as partial +linking. + @item -rdynamic @opindex rdynamic Pass the flag @option{-export-dynamic} to the ELF linker, on targets @@ -12023,9 +12768,9 @@ across different shared libraries. In that case, each of the libraries as well as the application itself should use the shared @file{libgcc}. -Therefore, the G++ and driver automatically adds @option{-shared-libgcc} - whenever you build a shared library or a main executable, because C++ - programs typically use exceptions, so this is the right thing to do. +Therefore, the G++ driver automatically adds @option{-shared-libgcc} +whenever you build a shared library or a main executable, because C++ +programs typically use exceptions, so this is the right thing to do. If, instead, you use the GCC driver to create shared libraries, you may find that they are not always linked with the shared @file{libgcc}. @@ -12039,8 +12784,7 @@ costs at library load time. However, if a library or main executable is supposed to throw or catch -exceptions, you must link it using the G++ driver, as appropriate -for the languages used in the program, or using the option +exceptions, you must link it using the G++ driver, or using the option @option{-shared-libgcc}, such that it is linked with the shared @file{libgcc}. @@ -12084,27 +12828,6 @@ driver to link @file{libubsan} statically, without necessarily linking other libraries statically. -@item -static-libmpx -@opindex static-libmpx -When the @option{-fcheck-pointer bounds} and @option{-mmpx} options are -used to link a program, the GCC driver automatically links against -@file{libmpx}. If @file{libmpx} is available as a shared library, -and the @option{-static} option is not used, then this links against -the shared version of @file{libmpx}. The @option{-static-libmpx} -option directs the GCC driver to link @file{libmpx} statically, -without necessarily linking other libraries statically. - -@item -static-libmpxwrappers -@opindex static-libmpxwrappers -When the @option{-fcheck-pointer bounds} and @option{-mmpx} options are used -to link a program without also using @option{-fno-chkp-use-wrappers}, the -GCC driver automatically links against @file{libmpxwrappers}. If -@file{libmpxwrappers} is available as a shared library, and the -@option{-static} option is not used, then this links against the shared -version of @file{libmpxwrappers}. The @option{-static-libmpxwrappers} -option directs the GCC driver to link @file{libmpxwrappers} statically, -without necessarily linking other libraries statically. - @item -static-libstdc++ @opindex static-libstdc++ When the @command{g++} program is used to link a C++ program, it @@ -12391,6 +13114,18 @@ using @option{-ftrapv} @option{-fwrapv} @option{-fno-wrapv} on the command-line results in @option{-ftrapv} being effective. +@item -fwrapv-pointer +@opindex fwrapv-pointer +This option instructs the compiler to assume that pointer arithmetic +overflow on addition and subtraction wraps around using twos-complement +representation. This flag disables some optimizations which assume +pointer overflow is invalid. + +@item -fstrict-overflow +@opindex fstrict-overflow +This option implies @option{-fno-wrapv} @option{-fno-wrapv-pointer} and when +negated implies @option{-fwrapv} @option{-fwrapv-pointer}. + @item -fexceptions @opindex fexceptions Enable exception handling. Generates extra code needed to propagate @@ -12694,10 +13429,10 @@ @itemx -fPIE @opindex fpie @opindex fPIE -These options are similar to @option{-fpic} and @option{-fPIC}, but -generated position independent code can be only linked into executables. -Usually these options are used when @option{-pie} GCC option is -used during linking. +These options are similar to @option{-fpic} and @option{-fPIC}, but the +generated position-independent code can be only linked into executables. +Usually these options are used to compile code that will be linked using +the @option{-pie} GCC option. @option{-fpie} and @option{-fPIE} both define the macros @code{__pie__} and @code{__PIE__}. The macros have the value 1 @@ -12958,6 +13693,26 @@ rarely need to use any of these options for ordinary compilation and linking tasks. +Many developer options that cause GCC to dump output to a file take an +optional @samp{=@var{filename}} suffix. You can specify @samp{stdout} +or @samp{-} to dump to standard output, and @samp{stderr} for standard +error. + +If @samp{=@var{filename}} is omitted, a default dump file name is +constructed by concatenating the base dump file name, a pass number, +phase letter, and pass name. The base dump file name is the name of +output file produced by the compiler if explicitly specified and not +an executable; otherwise it is the source file name. +The pass number is determined by the order passes are registered with +the compiler's pass manager. +This is generally the same as the order of execution, but passes +registered by plugins, target-specific passes, or passes that are +otherwise registered late are numbered higher than the pass named +@samp{final}, even if they are executed earlier. The phase letter is +one of @samp{i} (inter-procedural analysis), @samp{l} +(language-specific), @samp{r} (RTL), or @samp{t} (tree). +The files are created in the directory of the output file. + @table @gcctabopt @item -d@var{letters} @@ -12967,20 +13722,7 @@ @opindex fdump-rtl-@var{pass} Says to make debugging dumps during compilation at times specified by @var{letters}. This is used for debugging the RTL-based passes of the -compiler. The file names for most of the dumps are made by appending -a pass number and a word to the @var{dumpname}, and the files are -created in the directory of the output file. In case of -@option{=@var{filename}} option, the dump is output on the given file -instead of the pass numbered dump files. Note that the pass number is -assigned as passes are registered into the pass manager. Most passes -are registered in the order that they will execute and for these passes -the number corresponds to the pass execution order. However, passes -registered by plugins, passes specific to compilation targets, or -passes that are otherwise registered after all the other passes are -numbered higher than a pass named "final", even if they are executed -earlier. @var{dumpname} is generated from the name of the output -file if explicitly specified and not an executable, otherwise it is -the basename of the source file. +compiler. Some @option{-d@var{letters}} switches have different meaning when @option{-E} is used for preprocessing. @xref{Preprocessor Options}, @@ -13260,7 +14002,7 @@ @item -dp @opindex dp Annotate the assembler output with a comment indicating which -pattern and alternative is used. The length of each instruction is +pattern and alternative is used. The length and cost of each instruction are also printed. @item -dP @@ -13274,6 +14016,16 @@ with @option{-fdump-rtl-expand}. @end table +@item -fdump-debug +@opindex fdump-debug +Dump debugging information generated during the debug +generation phase. + +@item -fdump-earlydebug +@opindex fdump-earlydebug +Dump debugging information generated during the early debug +generation phase. + @item -fdump-noaddr @opindex fdump-noaddr When doing debugging dumps, suppress address output. This makes it more @@ -13368,11 +14120,7 @@ @opindex fdump-tree-all @opindex fdump-tree Control the dumping at various stages of processing the intermediate -language tree to a file. The file name is generated by appending a -switch-specific suffix to the source file name, and the file is -created in the same directory as the output file. In case of -@option{=@var{filename}} option, the dump is output on the given file -instead of the auto named dump files. If the @samp{-@var{options}} +language tree to a file. If the @samp{-@var{options}} form is used, @var{options} is a list of @samp{-} separated options which control the details of the dump. Not all options are applicable to all dumps; those that are not meaningful are ignored. The @@ -13439,26 +14187,9 @@ @item note Enable other detailed optimization information (only available in certain passes). -@item =@var{filename} -Instead of an auto named dump file, output into the given file -name. The file names @file{stdout} and @file{stderr} are treated -specially and are considered already open standard streams. For -example, - -@smallexample -gcc -O2 -ftree-vectorize -fdump-tree-vect-blocks=foo.dump - -fdump-tree-pre=/dev/stderr file.c -@end smallexample - -outputs vectorizer dump into @file{foo.dump}, while the PRE dump is -output on to @file{stderr}. If two conflicting dump filenames are -given for the same pass, then the latter option overrides the earlier -one. - @item all Turn on all options, except @option{raw}, @option{slim}, @option{verbose} and @option{lineno}. - @item optall Turn on all optimization options, i.e., @option{optimized}, @option{missed}, and @option{note}. @@ -13501,14 +14232,21 @@ @samp{-} separated option keywords to select the dump details and optimizations. -The @var{options} can be divided into two groups: options describing the -verbosity of the dump, and options describing which optimizations -should be included. The options from both the groups can be freely -mixed as they are non-overlapping. However, in case of any conflicts, +The @var{options} can be divided into three groups: +@enumerate +@item +options describing what kinds of messages should be emitted, +@item +options describing the verbosity of the dump, and +@item +options describing which optimizations should be included. +@end enumerate +The options from each group can be freely mixed as they are +non-overlapping. However, in case of any conflicts, the later options override the earlier options on the command line. -The following options control the dump verbosity: +The following options control which kinds of messages should be emitted: @table @samp @item optimized @@ -13527,6 +14265,15 @@ @samp{optimized}, @samp{missed}, and @samp{note}. @end table +The following option controls the dump verbosity: + +@table @samp +@item internals +By default, only ``high-level'' messages are emitted. This option enables +additional, more detailed, messages, which are likely to only be of interest +to GCC developers. +@end table + One or more of the following option keywords can be used to describe a group of optimizations: @@ -13547,8 +14294,9 @@ @end table If @var{options} is -omitted, it defaults to @samp{optimized-optall}, which means to dump all -info about successful optimizations from all the passes. +omitted, it defaults to @samp{optimized-optall}, which means to dump messages +about successful optimizations from all the passes, omitting messages +that are treated as ``internals''. If the @var{filename} is provided, then the dumps from all the applicable optimizations are concatenated into the @var{filename}. @@ -13612,6 +14360,51 @@ ignored. Thus only @file{vec.miss} is produced which contains dumps from the vectorizer about missed opportunities. +@item -fsave-optimization-record +@opindex fsave-optimization-record +Write a SRCFILE.opt-record.json file detailing what optimizations +were performed, for those optimizations that support @option{-fopt-info}. + +This option is experimental and the format of the data within the JSON +file is subject to change. + +It is roughly equivalent to a machine-readable version of +@option{-fopt-info-all}, as a collection of messages with source file, +line number and column number, with the following additional data for +each message: + +@itemize @bullet + +@item +the execution count of the code being optimized, along with metadata about +whether this was from actual profile data, or just an estimate, allowing +consumers to prioritize messages by code hotness, + +@item +the function name of the code being optimized, where applicable, + +@item +the ``inlining chain'' for the code being optimized, so that when +a function is inlined into several different places (which might +themselves be inlined), the reader can distinguish between the copies, + +@item +objects identifying those parts of the message that refer to expressions, +statements or symbol-table nodes, which of these categories they are, and, +when available, their source code location, + +@item +the GCC pass that emitted the message, and + +@item +the location in GCC's own code from which the message was emitted + +@end itemize + +Additionally, some messages are logically nested within other +messages, reflecting implementation details of the optimization +passes. + @item -fsched-verbose=@var{n} @opindex fsched-verbose On targets that use instruction scheduling, this option controls the @@ -13842,8 +14635,8 @@ @opindex fcompare-debug-second This option is implicitly passed to the compiler for the second compilation requested by @option{-fcompare-debug}, along with options to -silence warnings, and omitting other options that would cause -side-effect compiler outputs to files or to the standard output. Dump +silence warnings, and omitting other options that would cause the compiler +to produce output to files or to standard output as a side effect. Dump files and preserved temporary files are renamed so as to contain the @code{.gk} additional extension during the second compilation, to avoid overwriting those generated by the first. @@ -13969,14 +14762,17 @@ @item -fdbg-cnt=@var{counter-value-list} @opindex fdbg-cnt -Set the internal debug counter upper bound. @var{counter-value-list} -is a comma-separated list of @var{name}:@var{value} pairs -which sets the upper bound of each debug counter @var{name} to @var{value}. +Set the internal debug counter lower and upper bound. @var{counter-value-list} +is a comma-separated list of @var{name}:@var{lower_bound}:@var{upper_bound} +tuples which sets the lower and the upper bound of each debug +counter @var{name}. The @var{lower_bound} is optional and is zero +initialized if not set. All debug counters have the initial upper bound of @code{UINT_MAX}; thus @code{dbg_cnt} returns true always unless the upper bound is set by this option. -For example, with @option{-fdbg-cnt=dce:10,tail_call:0}, -@code{dbg_cnt(dce)} returns true only for first 10 invocations. +For example, with @option{-fdbg-cnt=dce:2:4,tail_call:10}, +@code{dbg_cnt(dce)} returns true only for third and fourth invocation. +For @code{dbg_cnt(tail_call)} true is returned for first 10 invocations. @item -print-file-name=@var{library} @opindex print-file-name @@ -14064,16 +14860,16 @@ @item -dumpversion @opindex dumpversion Print the compiler version (for example, @code{3.0}, @code{6.3.0} or @code{7})---and don't do -anything else. This is the compiler version used in filesystem paths, -specs, can be depending on how the compiler has been configured just -a single number (major version), two numbers separated by dot (major and +anything else. This is the compiler version used in filesystem paths and +specs. Depending on how the compiler has been configured it can be just +a single number (major version), two numbers separated by a dot (major and minor version) or three numbers separated by dots (major, minor and patchlevel version). @item -dumpfullversion @opindex dumpfullversion -Print the full compiler version, always 3 numbers separated by dots, -major, minor and patchlevel version. +Print the full compiler version---and don't do anything else. The output is +always three numbers separated by dots, major, minor and patchlevel version. @item -dumpspecs @opindex dumpspecs @@ -14113,6 +14909,7 @@ * C6X Options:: * CRIS Options:: * CR16 Options:: +* C-SKY Options:: * Darwin Options:: * DEC Alpha Options:: * FR30 Options:: @@ -14140,6 +14937,7 @@ * PDP-11 Options:: * picoChip Options:: * PowerPC Options:: +* PowerPC SPE Options:: * RISC-V Options:: * RL78 Options:: * RS/6000 and PowerPC Options:: @@ -14218,9 +15016,11 @@ addresses and sizes of sections. Programs can be statically linked only. @item -mstrict-align +@itemx -mno-strict-align @opindex mstrict-align -Avoid generating memory accesses that may not be aligned on a natural object -boundary as described in the architecture specification. +@opindex mno-strict-align +Avoid or allow generating memory accesses that may not be aligned on a natural +object boundary as described in the architecture specification. @item -momit-leaf-frame-pointer @itemx -mno-omit-leaf-frame-pointer @@ -14261,7 +15061,7 @@ corresponding flag to the linker. @item -mlow-precision-recip-sqrt -@item -mno-low-precision-recip-sqrt +@itemx -mno-low-precision-recip-sqrt @opindex mlow-precision-recip-sqrt @opindex mno-low-precision-recip-sqrt Enable or disable the reciprocal square root approximation. @@ -14271,7 +15071,7 @@ single precision and to 32 bits for double precision. @item -mlow-precision-sqrt -@item -mno-low-precision-sqrt +@itemx -mno-low-precision-sqrt @opindex -mlow-precision-sqrt @opindex -mno-low-precision-sqrt Enable or disable the square root approximation. @@ -14282,7 +15082,7 @@ If enabled, it implies @option{-mlow-precision-recip-sqrt}. @item -mlow-precision-div -@item -mno-low-precision-div +@itemx -mno-low-precision-div @opindex -mlow-precision-div @opindex -mno-low-precision-div Enable or disable the division approximation. @@ -14291,6 +15091,14 @@ precision of division results to about 16 bits for single precision and to 32 bits for double precision. +@item -mtrack-speculation +@itemx -mno-track-speculation +Enable or disable generation of additional code to track speculative +execution through conditional branches. The tracking state can then +be used by the compiler when expanding calls to +@code{__builtin_speculation_safe_copy} to permit a more efficient code +sequence to be generated. + @item -march=@var{name} @opindex march Specify the name of the target architecture and, optionally, one or @@ -14298,7 +15106,11 @@ @option{-march=@var{arch}@r{@{}+@r{[}no@r{]}@var{feature}@r{@}*}}. The permissible values for @var{arch} are @samp{armv8-a}, -@samp{armv8.1-a}, @samp{armv8.2-a}, @samp{armv8.3-a} or @var{native}. +@samp{armv8.1-a}, @samp{armv8.2-a}, @samp{armv8.3-a} or @samp{armv8.4-a} +or @var{native}. + +The value @samp{armv8.4-a} implies @samp{armv8.3-a} and enables compiler +support for the ARMv8.4-A architecture extensions. The value @samp{armv8.3-a} implies @samp{armv8.2-a} and enables compiler support for the ARMv8.3-A architecture extensions. @@ -14332,18 +15144,19 @@ performance of the code. Permissible values for this option are: @samp{generic}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a55}, @samp{cortex-a57}, @samp{cortex-a72}, @samp{cortex-a73}, @samp{cortex-a75}, -@samp{exynos-m1}, @samp{falkor}, @samp{qdf24xx}, -@samp{xgene1}, @samp{vulcan}, @samp{thunderx}, -@samp{thunderxt88}, @samp{thunderxt88p1}, @samp{thunderxt81}, +@samp{cortex-a76}, @samp{exynos-m1}, @samp{falkor}, @samp{qdf24xx}, +@samp{saphira}, @samp{phecda}, @samp{xgene1}, @samp{vulcan}, @samp{thunderx}, +@samp{thunderxt88}, @samp{thunderxt88p1}, @samp{thunderxt81},@samp{tsv110}, @samp{thunderxt83}, @samp{thunderx2t99}, @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53}, @samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53}, @samp{cortex-a75.cortex-a55}, +@samp{cortex-a76.cortex-a55} @samp{native}. The values @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53}, @samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53}, -@samp{cortex-a75.cortex-a55} specify that GCC should tune for a -big.LITTLE system. +@samp{cortex-a75.cortex-a55}, @samp{cortex-a76.cortex-a55} specify that GCC +should tune for a big.LITTLE system. Additionally on native AArch64 GNU/Linux systems the value @samp{native} tunes performance to the host system. This option has no effect @@ -14383,6 +15196,11 @@ This option is only intended to be useful when developing GCC. +@item -mverbose-cost-dump +@opindex mverbose-cost-dump +Enable verbose cost model dumping in the debug dump files. This option is +provided for use in debugging the compiler. + @item -mpc-relative-literal-loads @itemx -mno-pc-relative-literal-loads @opindex mpc-relative-literal-loads @@ -14400,6 +15218,23 @@ functions, and @samp{all}, which enables pointer signing for all functions. The default value is @samp{none}. +@item -msve-vector-bits=@var{bits} +@opindex msve-vector-bits +Specify the number of bits in an SVE vector register. This option only has +an effect when SVE is enabled. + +GCC supports two forms of SVE code generation: ``vector-length +agnostic'' output that works with any size of vector register and +``vector-length specific'' output that only works when the vector +registers are a particular size. Replacing @var{bits} with +@samp{scalable} selects vector-length agnostic output while +replacing it with a number selects vector-length specific output. +The possible lengths in the latter case are: 128, 256, 512, 1024 +and 2048. @samp{scalable} is the default. + +At present, @samp{-msve-vector-bits=128} produces the same output +as @samp{-msve-vector-bits=scalable}. + @end table @subsubsection @option{-march} and @option{-mcpu} Feature Modifiers @@ -14423,6 +15258,9 @@ Enable Advanced SIMD instructions. This also enables floating-point instructions. This is on by default for all possible values for options @option{-march} and @option{-mcpu}. +@item sve +Enable Scalable Vector Extension instructions. This also enables Advanced +SIMD and floating-point instructions. @item lse Enable Large System Extension instructions. This is on by default for @option{-march=armv8.1-a}. @@ -14431,18 +15269,37 @@ for @option{-march=armv8.1-a}. @item fp16 Enable FP16 extension. This also enables floating-point instructions. +@item fp16fml +Enable FP16 fmla extension. This also enables FP16 extensions and +floating-point instructions. This option is enabled by default for @option{-march=armv8.4-a}. Use of this option with architectures prior to Armv8.2-A is not supported. + @item rcpc Enable the RcPc extension. This does not change code generation from GCC, but is passed on to the assembler, enabling inline asm statements to use instructions from the RcPc extension. @item dotprod Enable the Dot Product extension. This also enables Advanced SIMD instructions. - -@end table - -Feature @option{crypto} implies @option{simd}, which implies @option{fp}. +@item aes +Enable the Armv8-a aes and pmull crypto extension. This also enables Advanced +SIMD instructions. +@item sha2 +Enable the Armv8-a sha2 crypto extension. This also enables Advanced SIMD instructions. +@item sha3 +Enable the sha512 and sha3 crypto extension. This also enables Advanced SIMD +instructions. Use of this option with architectures prior to Armv8.2-A is not supported. +@item sm4 +Enable the sm3 and sm4 crypto extension. This also enables Advanced SIMD instructions. +Use of this option with architectures prior to Armv8.2-A is not supported. +@item profile +Enable the Statistical Profiling extension. This option is only to enable the +extension at the assembler level and does not affect code generation. + +@end table + +Feature @option{crypto} implies @option{aes}, @option{sha2}, and @option{simd}, +which implies @option{fp}. Conversely, @option{nofp} implies @option{nosimd}, which implies -@option{nocrypto}. +@option{nocrypto}, @option{noaes} and @option{nosha2}. @node Adapteva Epiphany Options @subsection Adapteva Epiphany Options @@ -14615,6 +15472,11 @@ Generate instructions supported by barrel shifter. This is the default unless @option{-mcpu=ARC601} or @samp{-mcpu=ARCEM} is in effect. +@item -mjli-always +@opindex mjli-alawys +Force to call a function using jli_s instruction. This option is +valid only for ARCv2 architecture. + @item -mcpu=@var{cpu} @opindex mcpu Set architecture type, register usage, and instruction scheduling @@ -14699,6 +15561,10 @@ @item nps400 Compile for ARC 700 on NPS400 chip. +@item em_mini +Compile for ARC EM minimalist configuration featuring reduced register +set. + @end table @item -mdpfp @@ -14957,6 +15823,12 @@ loop mechanism for various needs. This option defines macro @code{__ARC_LPC_WIDTH__} with the value of @var{width}. +@item -mrf16 +@opindex mrf16 +This option instructs the compiler to generate code for a 16-entry +register file. This option defines the @code{__ARC_RF16__} +preprocessor macro. + @end table The following options are passed through to the assembler, and also @@ -15162,6 +16034,7 @@ optimizers then assume that indexed stores exist, which is not the case. +@item -mlra @opindex mlra Enable Local Register Allocation. This is still experimental for ARC, so by default the compiler uses standard reload @@ -15466,7 +16339,8 @@ @samp{armv6}, @samp{armv6j}, @samp{armv6k}, @samp{armv6kz}, @samp{armv6t2}, @samp{armv6z}, @samp{armv6zk}, @samp{armv7}, @samp{armv7-a}, @samp{armv7ve}, -@samp{armv8-a}, @samp{armv8.1-a}, @samp{armv8.2-a}, +@samp{armv8-a}, @samp{armv8.1-a}, @samp{armv8.2-a}, @samp{armv8.3-a}, +@samp{armv8.4-a}, @samp{armv7-r}, @samp{armv8-r}, @samp{armv6-m}, @samp{armv6s-m}, @@ -15475,9 +16349,7 @@ @samp{iwmmxt} and @samp{iwmmxt2}. Additionally, the following architectures, which lack support for the -Thumb exection state, are recognized but support is deprecated: -@samp{armv2}, @samp{armv2a}, @samp{armv3}, @samp{armv3m}, -@samp{armv4}, @samp{armv5} and @samp{armv5e}. +Thumb execution state, are recognized but support is deprecated: @samp{armv4}. Many of the architectures support extensions. These can be added by appending @samp{+@var{extension}} to the architecture name. Extension @@ -15497,16 +16369,15 @@ Most extension names are generically named, but have an effect that is dependent upon the architecture to which it is applied. For example, the @samp{+simd} option can be applied to both @samp{armv7-a} and -@samp{armv8-a} architectures, but will enable the original ARMv7 -Advanced SIMD (Neon) extensions for @samp{armv7-a} and the ARMv8-a +@samp{armv8-a} architectures, but will enable the original ARMv7-A +Advanced SIMD (Neon) extensions for @samp{armv7-a} and the ARMv8-A variant for @samp{armv8-a}. The table below lists the supported extensions for each architecture. Architectures not mentioned do not support any extensions. @table @samp -@item armv5e -@itemx armv5te +@item armv5te @itemx armv6 @itemx armv6j @itemx armv6k @@ -15639,11 +16510,11 @@ @item +crc The Cyclic Redundancy Check (CRC) instructions. @item +simd -The ARMv8 Advanced SIMD and floating-point instructions. +The ARMv8-A Advanced SIMD and floating-point instructions. @item +crypto The cryptographic instructions. @item +nocrypto -Disable the cryptographic isntructions. +Disable the cryptographic instructions. @item +nofp Disable the floating-point, Advanced SIMD and cryptographic instructions. @end table @@ -15651,27 +16522,33 @@ @item armv8.1-a @table @samp @item +simd -The ARMv8.1 Advanced SIMD and floating-point instructions. +The ARMv8.1-A Advanced SIMD and floating-point instructions. @item +crypto The cryptographic instructions. This also enables the Advanced SIMD and floating-point instructions. @item +nocrypto -Disable the cryptographic isntructions. +Disable the cryptographic instructions. @item +nofp Disable the floating-point, Advanced SIMD and cryptographic instructions. @end table @item armv8.2-a +@itemx armv8.3-a @table @samp @item +fp16 The half-precision floating-point data processing instructions. This also enables the Advanced SIMD and floating-point instructions. +@item +fp16fml +The half-precision floating-point fmla extension. This also enables +the half-precision floating-point extension and Advanced SIMD and +floating-point instructions. + @item +simd -The ARMv8.1 Advanced SIMD and floating-point instructions. +The ARMv8.1-A Advanced SIMD and floating-point instructions. @item +crypto The cryptographic instructions. This also enables the Advanced SIMD and @@ -15687,6 +16564,29 @@ Disable the floating-point, Advanced SIMD and cryptographic instructions. @end table +@item armv8.4-a +@table @samp +@item +fp16 +The half-precision floating-point data processing instructions. +This also enables the Advanced SIMD and floating-point instructions as well +as the Dot Product extension and the half-precision floating-point fmla +extension. + +@item +simd +The ARMv8.3-A Advanced SIMD and floating-point instructions as well as the +Dot Product extension. + +@item +crypto +The cryptographic instructions. This also enables the Advanced SIMD and +floating-point instructions as well as the Dot Product extension. + +@item +nocrypto +Disable the cryptographic extension. + +@item +nofp +Disable the floating-point, Advanced SIMD and cryptographic instructions. +@end table + @item armv7-r @table @samp @item +fp.sp @@ -15747,11 +16647,11 @@ @item +fp.sp The single-precision FPv5 floating-point instructions. @item +simd -The ARMv8 Advanced SIMD and floating-point instructions. +The ARMv8-A Advanced SIMD and floating-point instructions. @item +crypto The cryptographic instructions. @item +nocrypto -Disable the cryptographic isntructions. +Disable the cryptographic instructions. @item +nofp Disable the floating-point, Advanced SIMD and cryptographic instructions. @end table @@ -15790,8 +16690,8 @@ @samp{cortex-a9}, @samp{cortex-a12}, @samp{cortex-a15}, @samp{cortex-a17}, @samp{cortex-a32}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a55}, @samp{cortex-a57}, @samp{cortex-a72}, @samp{cortex-a73}, @samp{cortex-a75}, -@samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-r5}, @samp{cortex-r7}, -@samp{cortex-r8}, @samp{cortex-r52}, +@samp{cortex-a76}, @samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-r5}, +@samp{cortex-r7}, @samp{cortex-r8}, @samp{cortex-r52}, @samp{cortex-m33}, @samp{cortex-m23}, @samp{cortex-m7}, @@ -15815,7 +16715,7 @@ @samp{cortex-a15.cortex-a7}, @samp{cortex-a17.cortex-a7}, @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53}, @samp{cortex-a72.cortex-a35}, @samp{cortex-a73.cortex-a53}, -@samp{cortex-a75.cortex-a55}. +@samp{cortex-a75.cortex-a55}, @samp{cortex-a76.cortex-a55}. @option{-mtune=generic-@var{arch}} specifies that GCC should tune the performance for a blend of processors within architecture @var{arch}. @@ -16063,6 +16963,12 @@ by using the @code{target("thumb")} and @code{target("arm")} function attributes (@pxref{ARM Function Attributes}) or pragmas (@pxref{Function Specific Option Pragmas}). +@item -mflip-thumb +@opindex mflip-thumb +Switch ARM/Thumb modes on alternating functions. +This option is provided for regression testing of mixed Thumb/ARM code +generation, and is not intended for ordinary use in compiling code. + @item -mtpcs-frame @opindex mtpcs-frame Generate a stack frame that is compliant with the Thumb Procedure Call @@ -16166,9 +17072,9 @@ @item -mrestrict-it @opindex mrestrict-it -Restricts generation of IT blocks to conform to the rules of ARMv8. +Restricts generation of IT blocks to conform to the rules of ARMv8-A. IT blocks can only contain a single 16-bit instruction from a select -set of instructions. This option is on by default for ARMv8 Thumb mode. +set of instructions. This option is on by default for ARMv8-A Thumb mode. @item -mprint-tune-info @opindex mprint-tune-info @@ -16177,6 +17083,11 @@ intended for ordinary use in compiling code. This option is disabled by default. +@item -mverbose-cost-dump +@opindex mverbose-cost-dump +Enable verbose cost model dumping in the debug dump files. This option is +provided for use in debugging the compiler. + @item -mpure-code @opindex mpure-code Do not allow constant data to be placed in code sections. @@ -16262,6 +17173,12 @@ conform to the C standards, but it results in smaller code size. +@item -mmain-is-OS_task +@opindex mmain-is-OS_task +Do not save registers in @code{main}. The effect is the same like +attaching attribute @ref{AVR Function Attributes,,@code{OS_task}} +to @code{main}. It is activated per default if optimization is on. + @item -mn-flash=@var{num} @opindex mn-flash Assume that the flash memory has a size of @@ -16350,11 +17267,13 @@ @item -Waddr-space-convert @opindex Waddr-space-convert +@opindex Wno-addr-space-convert Warn about conversions between address spaces in the case where the resulting address space is not contained in the incoming address space. @item -Wmisspelled-isr @opindex Wmisspelled-isr +@opindex Wno-misspelled-isr Warn if the ISR is misspelled, i.e. without __vector prefix. Enabled by default. @end table @@ -16746,9 +17665,7 @@ @opindex momit-leaf-frame-pointer Don't keep the frame pointer in a register for leaf functions. This avoids the instructions to save, set up and restore frame pointers and -makes an extra register available in leaf functions. The option -@option{-fomit-frame-pointer} removes the frame pointer for all functions, -which might make debugging harder. +makes an extra register available in leaf functions. @item -mspecld-anomaly @opindex mspecld-anomaly @@ -17117,6 +18034,198 @@ CR16C architecture does not support the far data model. @end table +@node C-SKY Options +@subsection C-SKY Options +@cindex C-SKY Options + +GCC supports these options when compiling for C-SKY V2 processors. + +@table @gcctabopt + +@item -march=@var{arch} +@opindex march= +Specify the C-SKY target architecture. Valid values for @var{arch} are: +@samp{ck801}, @samp{ck802}, @samp{ck803}, @samp{ck807}, and @samp{ck810}. +The default is @samp{ck810}. + +@item -mcpu=@var{cpu} +@opindex mcpu= +Specify the C-SKY target processor. Valid values for @var{cpu} are: +@samp{ck801}, @samp{ck801t}, +@samp{ck802}, @samp{ck802t}, @samp{ck802j}, +@samp{ck803}, @samp{ck803h}, @samp{ck803t}, @samp{ck803ht}, +@samp{ck803f}, @samp{ck803fh}, @samp{ck803e}, @samp{ck803eh}, +@samp{ck803et}, @samp{ck803eht}, @samp{ck803ef}, @samp{ck803efh}, +@samp{ck803ft}, @samp{ck803eft}, @samp{ck803efht}, @samp{ck803r1}, +@samp{ck803hr1}, @samp{ck803tr1}, @samp{ck803htr1}, @samp{ck803fr1}, +@samp{ck803fhr1}, @samp{ck803er1}, @samp{ck803ehr1}, @samp{ck803etr1}, +@samp{ck803ehtr1}, @samp{ck803efr1}, @samp{ck803efhr1}, @samp{ck803ftr1}, +@samp{ck803eftr1}, @samp{ck803efhtr1}, +@samp{ck803s}, @samp{ck803st}, @samp{ck803se}, @samp{ck803sf}, +@samp{ck803sef}, @samp{ck803seft}, +@samp{ck807e}, @samp{ck807ef}, @samp{ck807}, @samp{ck807f}, +@samp{ck810e}, @samp{ck810et}, @samp{ck810ef}, @samp{ck810eft}, +@samp{ck810}, @samp{ck810v}, @samp{ck810f}, @samp{ck810t}, @samp{ck810fv}, +@samp{ck810tv}, @samp{ck810ft}, and @samp{ck810ftv}. + +@item -mbig-endian +@opindex mbig-endian +@itemx -EB +@opindex -EB +@itemx -mlittle-endian +@opindex mlittle-endian +@itemx -EL +@opindex -EL + +Select big- or little-endian code. The default is little-endian. + +@item -mhard-float +@opindex mhard-float +@itemx -msoft-float +@opindex msoft-float + +Select hardware or software floating-point implementations. +The default is soft float. + +@item -mdouble-float +@itemx -mno-double-float +@opindex mdouble-float +When @option{-mhard-float} is in effect, enable generation of +double-precision float instructions. This is the default except +when compiling for CK803. + +@item -mfdivdu +@itemx -mno-fdivdu +@opindex mfdivdu +When @option{-mhard-float} is in effect, enable generation of +@code{frecipd}, @code{fsqrtd}, and @code{fdivd} instructions. +This is the default except when compiling for CK803. + +@item -mfpu=@var{fpu} +@opindex mfpu= +Select the floating-point processor. This option can only be used with +@option{-mhard-float}. +Values for @var{fpu} are +@samp{fpv2_sf} (equivalent to @samp{-mno-double-float -mno-fdivdu}), +@samp{fpv2} (@samp{-mdouble-float -mno-divdu}), and +@samp{fpv2_divd} (@samp{-mdouble-float -mdivdu}). + +@item -melrw +@itemx -mno-elrw +@opindex melrw +Enable the extended @code{lrw} instruction. This option defaults to on +for CK801 and off otherwise. + +@item -mistack +@itemx -mno-istack +@opindex mistack +Enable interrupt stack instructions; the default is off. + +The @option{-mistack} option is required to handle the +@code{interrupt} and @code{isr} function attributes +(@pxref{C-SKY Function Attributes}). + +@item -mmp +@opindex mmp +Enable multiprocessor instructions; the default is off. + +@item -mcp +@opindex mcp +Enable coprocessor instructions; the default is off. + +@item -mcache +@opindex mcache +Enable coprocessor instructions; the default is off. + +@item -msecurity +@opindex msecurity +Enable C-SKY security instructions; the default is off. + +@item -mtrust +@opindex mtrust +Enable C-SKY trust instructions; the default is off. + +@item -mdsp +@opindex mdsp +@itemx -medsp +@opindex medsp +@itemx -mvdsp +@opindex mvdsp +Enable C-SKY DSP, Enhanced DSP, or Vector DSP instructions, respectively. +All of these options default to off. + +@item -mdiv +@itemx -mno-div +@opindex mdiv +Generate divide instructions. Default is off. + +@item -msmart +@itemx -mno-smart +@opindex msmart +Generate code for Smart Mode, using only registers numbered 0-7 to allow +use of 16-bit instructions. This option is ignored for CK801 where this +is the required behavior, and it defaults to on for CK802. +For other targets, the default is off. + +@item -mhigh-registers +@itemx -mno-high-registers +@opindex mhigh-registers +Generate code using the high registers numbered 16-31. This option +is not supported on CK801, CK802, or CK803, and is enabled by default +for other processors. + +@item -manchor +@itemx -mno-anchor +@opindex manchor +Generate code using global anchor symbol addresses. + +@item -mpushpop +@itemx -mno-pushpop +@opindex mpushpop +Generate code using @code{push} and @code{pop} instructions. This option +defaults to on. + +@item -mmultiple-stld +@itemx -mstm +@itemx -mno-multiple-stld +@itemx -mno-stm +@opindex mmultiple-stld +Generate code using @code{stm} and @code{ldm} instructions. This option +isn't supported on CK801 but is enabled by default on other processors. + +@item -mconstpool +@itemx -mno-constpool +@opindex mconstpool +Create constant pools in the compiler instead of deferring it to the +assembler. This option is the default and required for correct code +generation on CK801 and CK802, and is optional on other processors. + +@item -mstack-size +@item -mno-stack-size +@opindex mstack-size +Emit @code{.stack_size} directives for each function in the assembly +output. This option defaults to off. + +@item -mccrt +@itemx -mno-ccrt +@opindex mccrt +Generate code for the C-SKY compiler runtime instead of libgcc. This +option defaults to off. + +@item -mbranch-cost=@var{n} +@opindex mbranch-cost= +Set the branch costs to roughly @code{n} instructions. The default is 1. + +@item -msched-prolog +@itemx -mno-sched-prolog +@opindex msched-prolog +Permit scheduling of function prologue and epilogue sequences. Using +this option can result in code that is not compliant with the C-SKY V2 ABI +prologue requirements and that cannot be debugged or backtraced. +It is disabled by default. + +@end table + @node Darwin Options @subsection Darwin Options @cindex Darwin options @@ -17761,6 +18870,18 @@ @opindex mnodiv Do not use div and mod instructions. +@item -mft32b +@opindex mft32b +Enable use of the extended instructions of the FT32B processor. + +@item -mcompress +@opindex mcompress +Compress all code using the Ft32B code compression scheme. + +@item -mnopm +@opindex mnopm +Do not generate code that reads program memory. + @end table @node FRV Options @@ -19535,7 +20656,7 @@ Supported values are in the format @samp{v@var{X}.@var{YY}.@var{Z}}, where @var{X} is a major version, @var{YY} is the minor version, and @var{Z} is compatibility code. Example values are @samp{v3.00.a}, -@samp{v4.00.b}, @samp{v5.00.a}, @samp{v5.00.b}, @samp{v5.00.b}, @samp{v6.00.a}. +@samp{v4.00.b}, @samp{v5.00.a}, @samp{v5.00.b}, @samp{v6.00.a}. @item -mxl-soft-mul @opindex mxl-soft-mul @@ -19595,6 +20716,12 @@ @item executable normal executable (default), uses startup code @file{crt0.o}. +@item -mpic-data-is-text-relative +@opindex mpic-data-is-text-relative +Assume that the displacement between the text and data segments is fixed +at static link time. This allows data to be referenced by offset from start of +text address instead of GOT since PC-relative addressing is not supported. + @item xmdstub for use with Xilinx Microprocessor Debugger (XMD) based software intrusive debug agent called xmdstub. This uses startup file @@ -19651,7 +20778,7 @@ @samp{34kc}, @samp{34kf2_1}, @samp{34kf1_1}, @samp{34kn}, @samp{74kc}, @samp{74kf2_1}, @samp{74kf1_1}, @samp{74kf3_2}, @samp{1004kc}, @samp{1004kf2_1}, @samp{1004kf1_1}, -@samp{i6400}, +@samp{i6400}, @samp{i6500}, @samp{interaptiv}, @samp{loongson2e}, @samp{loongson2f}, @samp{loongson3a}, @samp{m4k}, @@ -19659,7 +20786,7 @@ @samp{m5100}, @samp{m5101}, @samp{octeon}, @samp{octeon+}, @samp{octeon2}, @samp{octeon3}, @samp{orion}, -@samp{p5600}, +@samp{p5600}, @samp{p6600}, @samp{r2000}, @samp{r3000}, @samp{r3900}, @samp{r4000}, @samp{r4400}, @samp{r4600}, @samp{r4650}, @samp{r4700}, @samp{r6000}, @samp{r8000}, @samp{rm7000}, @samp{rm9000}, @@ -19792,7 +20919,7 @@ not intended for ordinary use in compiling user code. @item -minterlink-compressed -@item -mno-interlink-compressed +@itemx -mno-interlink-compressed @opindex minterlink-compressed @opindex mno-interlink-compressed Require (do not require) that code using the standard (uncompressed) MIPS ISA @@ -20132,6 +21259,18 @@ @opindex mno-xpa Use (do not use) the MIPS eXtended Physical Address (XPA) instructions. +@item -mcrc +@itemx -mno-crc +@opindex mcrc +@opindex mno-crc +Use (do not use) the MIPS Cyclic Redundancy Check (CRC) instructions. + +@item -mginv +@itemx -mno-ginv +@opindex mginv +@opindex mno-ginv +Use (do not use) the MIPS Global INValidate (GINV) instructions. + @item -mlong64 @opindex mlong64 Force @code{long} types to be 64 bits wide. See @option{-mlong32} for @@ -20373,7 +21512,7 @@ assembler files (with a @samp{.s} suffix) when assembling them. @item -mfix-24k -@item -mno-fix-24k +@itemx -mno-fix-24k @opindex mfix-24k @opindex mno-fix-24k Work around the 24K E48 (lost data on stores during refill) errata. @@ -20465,7 +21604,7 @@ @item -mr10k-cache-barrier=@var{setting} @opindex mr10k-cache-barrier Specify whether GCC should insert cache barriers to avoid the -side-effects of speculation on R10K processors. +side effects of speculation on R10K processors. In common with many processors, the R10K tries to predict the outcome of a conditional branch and speculatively executes instructions from @@ -21038,14 +22177,30 @@ @opindex mno-cmov Do not generate conditional move instructions. -@item -mperf-ext +@item -mext-perf @opindex mperf-ext Generate performance extension instructions. -@item -mno-perf-ext +@item -mno-ext-perf @opindex mno-perf-ext Do not generate performance extension instructions. +@item -mext-perf2 +@opindex mperf-ext +Generate performance extension 2 instructions. + +@item -mno-ext-perf2 +@opindex mno-perf-ext +Do not generate performance extension 2 instructions. + +@item -mext-string +@opindex mperf-ext +Generate string extension instructions. + +@item -mno-ext-string +@opindex mno-perf-ext +Do not generate string extension instructions. + @item -mv3push @opindex mv3push Generate v3 push25/pop25 instructions. @@ -21117,7 +22272,7 @@ sections. The default value of @var{num} is 8. @item -mgpopt=@var{option} -@item -mgpopt +@itemx -mgpopt @itemx -mno-gpopt @opindex mgpopt @opindex mno-gpopt @@ -21181,7 +22336,7 @@ The @var{regexp} is a POSIX Extended Regular Expression. This option does not affect the behavior of the @option{-G} option, and -and the specified sections are in addition to the standard @code{.sdata} +the specified sections are in addition to the standard @code{.sdata} and @code{.sbss} small-data sections that are recognized by @option{-mgpopt}. @item -mr0rel-sec=@var{regexp} @@ -21484,6 +22639,12 @@ @opindex m64 Generate code for 32-bit or 64-bit ABI. +@item -misa=@var{ISA-string} +@opindex march +Generate code for given the specified PTX ISA (e.g.@ @samp{sm_35}). ISA +strings must be lower-case. Valid ISA strings include @samp{sm_30} and +@samp{sm_35}. The default ISA is sm_30. + @item -mmainkernel @opindex mmainkernel Link in code for a __main kernel. This is for stand-alone instead of @@ -21537,7 +22698,7 @@ @item -mfpu @opindex mfpu Use hardware FPP floating point. This is the default. (FIS floating -point on the PDP-11/40 is not supported.) +point on the PDP-11/40 is not supported.) Implies -m45. @item -msoft-float @opindex msoft-float @@ -21553,7 +22714,7 @@ @item -m40 @opindex m40 -Generate code for a PDP-11/40. +Generate code for a PDP-11/40. Implies -msoft-float -mno-split. @item -m45 @opindex m45 @@ -21561,16 +22722,7 @@ @item -m10 @opindex m10 -Generate code for a PDP-11/10. - -@item -mbcopy-builtin -@opindex mbcopy-builtin -Use inline @code{movmemhi} patterns for copying memory. This is the -default. - -@item -mbcopy -@opindex mbcopy -Do not use inline @code{movmemhi} patterns for copying memory. +Generate code for a PDP-11/10. Implies -msoft-float -mno-split. @item -mint16 @itemx -mno-int32 @@ -21584,44 +22736,26 @@ @opindex mno-int16 Use 32-bit @code{int}. -@item -mfloat64 -@itemx -mno-float32 -@opindex mfloat64 -@opindex mno-float32 -Use 64-bit @code{float}. This is the default. - -@item -mfloat32 -@itemx -mno-float64 -@opindex mfloat32 -@opindex mno-float64 -Use 32-bit @code{float}. - -@item -mabshi -@opindex mabshi -Use @code{abshi2} pattern. This is the default. - -@item -mno-abshi -@opindex mno-abshi -Do not use @code{abshi2} pattern. - -@item -mbranch-expensive -@opindex mbranch-expensive -Pretend that branches are expensive. This is for experimenting with -code generation only. - -@item -mbranch-cheap -@opindex mbranch-cheap -Do not pretend that branches are expensive. This is the default. +@item -msplit +@opindex msplit +Target has split instruction and data space. Implies -m45. @item -munix-asm @opindex munix-asm -Use Unix assembler syntax. This is the default when configured for -@samp{pdp11-*-bsd}. +Use Unix assembler syntax. @item -mdec-asm @opindex mdec-asm -Use DEC assembler syntax. This is the default when configured for any -PDP-11 target other than @samp{pdp11-*-bsd}. +Use DEC assembler syntax. + +@item -mgnu-asm +@opindex mgnu-asm +Use GNU assembler syntax. This is the default. + +@item -mlra +@opindex mlra +Use the new LRA register allocator. By default, the old ``reload'' +allocator is used. @end table @node picoChip Options @@ -21678,227 +22812,20 @@ These are listed under @xref{RS/6000 and PowerPC Options}. -@node RISC-V Options -@subsection RISC-V Options -@cindex RISC-V Options - -These command-line options are defined for RISC-V targets: - -@table @gcctabopt -@item -mbranch-cost=@var{n} -@opindex mbranch-cost -Set the cost of branches to roughly @var{n} instructions. - -@item -mmemcpy -@itemx -mno-memcpy -@opindex mmemcpy -Don't optimize block moves. - -@item -mplt -@itemx -mno-plt -@opindex plt -When generating PIC code, allow the use of PLTs. Ignored for non-PIC. - -@item -mabi=@var{ABI-string} -@opindex mabi -Specify integer and floating-point calling convention. This defaults to the -natural calling convention: e.g.@ LP64 for RV64I, ILP32 for RV32I, LP64D for -RV64G. - -@item -mfdiv -@itemx -mno-fdiv -@opindex mfdiv -Use hardware floating-point divide and square root instructions. This requires -the F or D extensions for floating-point registers. - -@item -mdiv -@itemx -mno-div -@opindex mdiv -Use hardware instructions for integer division. This requires the M extension. - -@item -march=@var{ISA-string} -@opindex march -Generate code for given RISC-V ISA (e.g.@ @samp{rv64im}). ISA strings must be -lower-case. Examples include @samp{rv64i}, @samp{rv32g}, and @samp{rv32imaf}. - -@item -mtune=@var{processor-string} -@opindex mtune -Optimize the output for the given processor, specified by microarchitecture -name. - -@item -msmall-data-limit=@var{n} -@opindex msmall-data-limit -Put global and static data smaller than @var{n} bytes into a special section -(on some targets). - -@item -msave-restore -@itemx -mno-save-restore -@opindex msave-restore -Use smaller but slower prologue and epilogue code. - -@item -mstrict-align -@itemx -mno-strict-align -@opindex mstrict-align -Do not generate unaligned memory accesses. - -@item -mcmodel=@var{code-model} -@opindex mcmodel -Specify the code model. - -@end table - -@node RL78 Options -@subsection RL78 Options -@cindex RL78 Options - -@table @gcctabopt - -@item -msim -@opindex msim -Links in additional target libraries to support operation within a -simulator. - -@item -mmul=none -@itemx -mmul=g10 -@itemx -mmul=g13 -@itemx -mmul=g14 -@itemx -mmul=rl78 -@opindex mmul -Specifies the type of hardware multiplication and division support to -be used. The simplest is @code{none}, which uses software for both -multiplication and division. This is the default. The @code{g13} -value is for the hardware multiply/divide peripheral found on the -RL78/G13 (S2 core) targets. The @code{g14} value selects the use of -the multiplication and division instructions supported by the RL78/G14 -(S3 core) parts. The value @code{rl78} is an alias for @code{g14} and -the value @code{mg10} is an alias for @code{none}. - -In addition a C preprocessor macro is defined, based upon the setting -of this option. Possible values are: @code{__RL78_MUL_NONE__}, -@code{__RL78_MUL_G13__} or @code{__RL78_MUL_G14__}. - -@item -mcpu=g10 -@itemx -mcpu=g13 -@itemx -mcpu=g14 -@itemx -mcpu=rl78 -@opindex mcpu -Specifies the RL78 core to target. The default is the G14 core, also -known as an S3 core or just RL78. The G13 or S2 core does not have -multiply or divide instructions, instead it uses a hardware peripheral -for these operations. The G10 or S1 core does not have register -banks, so it uses a different calling convention. - -If this option is set it also selects the type of hardware multiply -support to use, unless this is overridden by an explicit -@option{-mmul=none} option on the command line. Thus specifying -@option{-mcpu=g13} enables the use of the G13 hardware multiply -peripheral and specifying @option{-mcpu=g10} disables the use of -hardware multiplications altogether. - -Note, although the RL78/G14 core is the default target, specifying -@option{-mcpu=g14} or @option{-mcpu=rl78} on the command line does -change the behavior of the toolchain since it also enables G14 -hardware multiply support. If these options are not specified on the -command line then software multiplication routines will be used even -though the code targets the RL78 core. This is for backwards -compatibility with older toolchains which did not have hardware -multiply and divide support. - -In addition a C preprocessor macro is defined, based upon the setting -of this option. Possible values are: @code{__RL78_G10__}, -@code{__RL78_G13__} or @code{__RL78_G14__}. - -@item -mg10 -@itemx -mg13 -@itemx -mg14 -@itemx -mrl78 -@opindex mg10 -@opindex mg13 -@opindex mg14 -@opindex mrl78 -These are aliases for the corresponding @option{-mcpu=} option. They -are provided for backwards compatibility. - -@item -mallregs -@opindex mallregs -Allow the compiler to use all of the available registers. By default -registers @code{r24..r31} are reserved for use in interrupt handlers. -With this option enabled these registers can be used in ordinary -functions as well. - -@item -m64bit-doubles -@itemx -m32bit-doubles -@opindex m64bit-doubles -@opindex m32bit-doubles -Make the @code{double} data type be 64 bits (@option{-m64bit-doubles}) -or 32 bits (@option{-m32bit-doubles}) in size. The default is -@option{-m32bit-doubles}. - -@item -msave-mduc-in-interrupts -@item -mno-save-mduc-in-interrupts -@opindex msave-mduc-in-interrupts -@opindex mno-save-mduc-in-interrupts -Specifies that interrupt handler functions should preserve the -MDUC registers. This is only necessary if normal code might use -the MDUC registers, for example because it performs multiplication -and division operations. The default is to ignore the MDUC registers -as this makes the interrupt handlers faster. The target option -mg13 -needs to be passed for this to work as this feature is only available -on the G13 target (S2 core). The MDUC registers will only be saved -if the interrupt handler performs a multiplication or division -operation or it calls another function. - -@end table - -@node RS/6000 and PowerPC Options -@subsection IBM RS/6000 and PowerPC Options -@cindex RS/6000 and PowerPC Options -@cindex IBM RS/6000 and PowerPC Options - -These @samp{-m} options are defined for the IBM RS/6000 and PowerPC: -@table @gcctabopt -@item -mpowerpc-gpopt -@itemx -mno-powerpc-gpopt -@itemx -mpowerpc-gfxopt -@itemx -mno-powerpc-gfxopt -@need 800 -@itemx -mpowerpc64 -@itemx -mno-powerpc64 -@itemx -mmfcrf +@node PowerPC SPE Options +@subsection PowerPC SPE Options +@cindex PowerPC SPE options + +These @samp{-m} options are defined for PowerPC SPE: +@table @gcctabopt +@item -mmfcrf @itemx -mno-mfcrf @itemx -mpopcntb @itemx -mno-popcntb -@itemx -mpopcntd -@itemx -mno-popcntd -@itemx -mfprnd -@itemx -mno-fprnd -@need 800 -@itemx -mcmpb -@itemx -mno-cmpb -@itemx -mmfpgpr -@itemx -mno-mfpgpr -@itemx -mhard-dfp -@itemx -mno-hard-dfp -@opindex mpowerpc-gpopt -@opindex mno-powerpc-gpopt -@opindex mpowerpc-gfxopt -@opindex mno-powerpc-gfxopt -@opindex mpowerpc64 -@opindex mno-powerpc64 @opindex mmfcrf @opindex mno-mfcrf @opindex mpopcntb @opindex mno-popcntb -@opindex mpopcntd -@opindex mno-popcntd -@opindex mfprnd -@opindex mno-fprnd -@opindex mcmpb -@opindex mno-cmpb -@opindex mmfpgpr -@opindex mno-mfpgpr -@opindex mhard-dfp -@opindex mno-hard-dfp You use these options to specify which instructions are available on the processor you are using. The default value of these options is determined when configuring GCC@. Specifying the @@ -21906,13 +22833,6 @@ options. We recommend you use the @option{-mcpu=@var{cpu_type}} option rather than the options listed above. -Specifying @option{-mpowerpc-gpopt} allows -GCC to use the optional PowerPC architecture instructions in the -General Purpose group, including floating-point square root. Specifying -@option{-mpowerpc-gfxopt} allows GCC to -use the optional PowerPC architecture instructions in the Graphics -group, including floating-point select. - The @option{-mmfcrf} option allows GCC to generate the move from condition register field instruction implemented on the POWER4 processor and other processors that support the PowerPC V2.01 @@ -21921,49 +22841,23 @@ double-precision FP reciprocal estimate instruction implemented on the POWER5 processor and other processors that support the PowerPC V2.02 architecture. -The @option{-mpopcntd} option allows GCC to generate the popcount -instruction implemented on the POWER7 processor and other processors -that support the PowerPC V2.06 architecture. -The @option{-mfprnd} option allows GCC to generate the FP round to -integer instructions implemented on the POWER5+ processor and other -processors that support the PowerPC V2.03 architecture. -The @option{-mcmpb} option allows GCC to generate the compare bytes -instruction implemented on the POWER6 processor and other processors -that support the PowerPC V2.05 architecture. -The @option{-mmfpgpr} option allows GCC to generate the FP move to/from -general-purpose register instructions implemented on the POWER6X -processor and other processors that support the extended PowerPC V2.05 -architecture. -The @option{-mhard-dfp} option allows GCC to generate the decimal -floating-point instructions implemented on some POWER processors. - -The @option{-mpowerpc64} option allows GCC to generate the additional -64-bit instructions that are found in the full PowerPC64 architecture -and to treat GPRs as 64-bit, doubleword quantities. GCC defaults to -@option{-mno-powerpc64}. @item -mcpu=@var{cpu_type} @opindex mcpu Set architecture type, register usage, and instruction scheduling parameters for machine type @var{cpu_type}. -Supported values for @var{cpu_type} are @samp{401}, @samp{403}, -@samp{405}, @samp{405fp}, @samp{440}, @samp{440fp}, @samp{464}, @samp{464fp}, -@samp{476}, @samp{476fp}, @samp{505}, @samp{601}, @samp{602}, @samp{603}, -@samp{603e}, @samp{604}, @samp{604e}, @samp{620}, @samp{630}, @samp{740}, -@samp{7400}, @samp{7450}, @samp{750}, @samp{801}, @samp{821}, @samp{823}, -@samp{860}, @samp{970}, @samp{8540}, @samp{a2}, @samp{e300c2}, -@samp{e300c3}, @samp{e500mc}, @samp{e500mc64}, @samp{e5500}, -@samp{e6500}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5}, -@samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+}, -@samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8}, -@samp{power9}, @samp{powerpc}, @samp{powerpc64}, @samp{powerpc64le}, -and @samp{rs64}. - -@option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and -@option{-mcpu=powerpc64le} specify pure 32-bit PowerPC (either -endian), 64-bit big endian PowerPC and 64-bit little endian PowerPC -architecture machine types, with an appropriate, generic processor -model assumed for scheduling purposes. +Supported values for @var{cpu_type} are @samp{8540}, @samp{8548}, +and @samp{native}. + +@option{-mcpu=powerpc} specifies pure 32-bit PowerPC (either +endian), with an appropriate, generic processor model assumed for +scheduling purposes. + +Specifying @samp{native} as cpu type detects and selects the +architecture option that corresponds to the host processor of the +system performing the compilation. +@option{-mcpu=native} has no effect if GCC does not recognize the +processor. The other options specify a specific processor. Code generated under those options runs best on that processor, and may not run at all on @@ -21972,25 +22866,17 @@ The @option{-mcpu} options automatically enable or disable the following options: -@gccoptlist{-maltivec -mfprnd -mhard-float -mmfcrf -mmultiple @gol --mpopcntb -mpopcntd -mpowerpc64 @gol --mpowerpc-gpopt -mpowerpc-gfxopt -msingle-float -mdouble-float @gol --msimple-fpu -mstring -mmulhw -mdlmzb -mmfpgpr -mvsx @gol --mcrypto -mdirect-move -mhtm -mpower8-fusion -mpower8-vector @gol --mquad-memory -mquad-memory-atomic -mfloat128 -mfloat128-hardware} +@gccoptlist{-mhard-float -mmfcrf -mmultiple @gol +-mpopcntb -mpopcntd @gol +-msingle-float -mdouble-float @gol +-mfloat128} The particular options set for any particular CPU varies between compiler versions, depending on what setting seems to produce optimal code for that CPU; it doesn't necessarily reflect the actual hardware's capabilities. If you wish to set an individual option to a particular value, you may specify it after the @option{-mcpu} option, like -@option{-mcpu=970 -mno-altivec}. - -On AIX, the @option{-maltivec} and @option{-mpowerpc64} options are -not enabled or disabled by the @option{-mcpu} option at present because -AIX does not have full support for these options. You may still -enable or disable them individually if you're sure it'll work in your -environment. +@option{-mcpu=8548}. @item -mtune=@var{cpu_type} @opindex mtune @@ -22002,71 +22888,6 @@ architecture and registers set by @option{-mcpu}, but the scheduling parameters set by @option{-mtune}. -@item -mcmodel=small -@opindex mcmodel=small -Generate PowerPC64 code for the small model: The TOC is limited to -64k. - -@item -mcmodel=medium -@opindex mcmodel=medium -Generate PowerPC64 code for the medium model: The TOC and other static -data may be up to a total of 4G in size. This is the default for 64-bit -Linux. - -@item -mcmodel=large -@opindex mcmodel=large -Generate PowerPC64 code for the large model: The TOC may be up to 4G -in size. Other data and code is only limited by the 64-bit address -space. - -@item -maltivec -@itemx -mno-altivec -@opindex maltivec -@opindex mno-altivec -Generate code that uses (does not use) AltiVec instructions, and also -enable the use of built-in functions that allow more direct access to -the AltiVec instruction set. You may also need to set -@option{-mabi=altivec} to adjust the current ABI with AltiVec ABI -enhancements. - -When @option{-maltivec} is used, rather than @option{-maltivec=le} or -@option{-maltivec=be}, the element order for AltiVec intrinsics such -as @code{vec_splat}, @code{vec_extract}, and @code{vec_insert} -match array element order corresponding to the endianness of the -target. That is, element zero identifies the leftmost element in a -vector register when targeting a big-endian platform, and identifies -the rightmost element in a vector register when targeting a -little-endian platform. - -@item -maltivec=be -@opindex maltivec=be -Generate AltiVec instructions using big-endian element order, -regardless of whether the target is big- or little-endian. This is -the default when targeting a big-endian platform. - -The element order is used to interpret element numbers in AltiVec -intrinsics such as @code{vec_splat}, @code{vec_extract}, and -@code{vec_insert}. By default, these match array element order -corresponding to the endianness for the target. - -@item -maltivec=le -@opindex maltivec=le -Generate AltiVec instructions using little-endian element order, -regardless of whether the target is big- or little-endian. This is -the default when targeting a little-endian platform. This option is -currently ignored when targeting a big-endian platform. - -The element order is used to interpret element numbers in AltiVec -intrinsics such as @code{vec_splat}, @code{vec_extract}, and -@code{vec_insert}. By default, these match array element order -corresponding to the endianness for the target. - -@item -mvrsave -@itemx -mno-vrsave -@opindex mvrsave -@opindex mno-vrsave -Generate VRSAVE instructions when generating AltiVec code. - @item -msecure-plt @opindex msecure-plt Generate code that allows @command{ld} and @command{ld.so} @@ -22100,82 +22921,10 @@ This switch enables or disables the generation of SPE simd instructions. -@item -mpaired -@itemx -mno-paired -@opindex mpaired -@opindex mno-paired -This switch enables or disables the generation of PAIRED simd -instructions. - @item -mspe=@var{yes/no} This option has been deprecated. Use @option{-mspe} and @option{-mno-spe} instead. -@item -mvsx -@itemx -mno-vsx -@opindex mvsx -@opindex mno-vsx -Generate code that uses (does not use) vector/scalar (VSX) -instructions, and also enable the use of built-in functions that allow -more direct access to the VSX instruction set. - -@item -mcrypto -@itemx -mno-crypto -@opindex mcrypto -@opindex mno-crypto -Enable the use (disable) of the built-in functions that allow direct -access to the cryptographic instructions that were added in version -2.07 of the PowerPC ISA. - -@item -mdirect-move -@itemx -mno-direct-move -@opindex mdirect-move -@opindex mno-direct-move -Generate code that uses (does not use) the instructions to move data -between the general purpose registers and the vector/scalar (VSX) -registers that were added in version 2.07 of the PowerPC ISA. - -@item -mhtm -@itemx -mno-htm -@opindex mhtm -@opindex mno-htm -Enable (disable) the use of the built-in functions that allow direct -access to the Hardware Transactional Memory (HTM) instructions that -were added in version 2.07 of the PowerPC ISA. - -@item -mpower8-fusion -@itemx -mno-power8-fusion -@opindex mpower8-fusion -@opindex mno-power8-fusion -Generate code that keeps (does not keeps) some integer operations -adjacent so that the instructions can be fused together on power8 and -later processors. - -@item -mpower8-vector -@itemx -mno-power8-vector -@opindex mpower8-vector -@opindex mno-power8-vector -Generate code that uses (does not use) the vector and scalar -instructions that were added in version 2.07 of the PowerPC ISA. Also -enable the use of built-in functions that allow more direct access to -the vector instructions. - -@item -mquad-memory -@itemx -mno-quad-memory -@opindex mquad-memory -@opindex mno-quad-memory -Generate code that uses (does not use) the non-atomic quad word memory -instructions. The @option{-mquad-memory} option requires use of -64-bit mode. - -@item -mquad-memory-atomic -@itemx -mno-quad-memory-atomic -@opindex mquad-memory-atomic -@opindex mno-quad-memory-atomic -Generate code that uses (does not use) the atomic quad word memory -instructions. The @option{-mquad-memory-atomic} option requires use of -64-bit mode. - @item -mfloat128 @itemx -mno-float128 @opindex mfloat128 @@ -22184,33 +22933,6 @@ and use either software emulation for IEEE 128-bit floating point or hardware instructions. -The VSX instruction set (@option{-mvsx}, @option{-mcpu=power7}, -@option{-mcpu=power8}), or @option{-mcpu=power9} must be enabled to -use the IEEE 128-bit floating point support. The IEEE 128-bit -floating point support only works on PowerPC Linux systems. - -The default for @option{-mfloat128} is enabled on PowerPC Linux -systems using the VSX instruction set, and disabled on other systems. - -If you use the ISA 3.0 instruction set (@option{-mpower9-vector} or -@option{-mcpu=power9}) on a 64-bit system, the IEEE 128-bit floating -point support will also enable the generation of ISA 3.0 IEEE 128-bit -floating point instructions. Otherwise, if you do not specify to -generate ISA 3.0 instructions or you are targeting a 32-bit big endian -system, IEEE 128-bit floating point will be done with software -emulation. - -@item -mfloat128-hardware -@itemx -mno-float128-hardware -@opindex mfloat128-hardware -@opindex mno-float128-hardware -Enable/disable using ISA 3.0 hardware instructions to support the -@var{__float128} data type. - -The default for @option{-mfloat128-hardware} is enabled on PowerPC -Linux systems using the ISA 3.0 instruction set, and disabled on other -systems. - @item -mfloat-gprs=@var{yes/single/double/no} @itemx -mfloat-gprs @opindex mfloat-gprs @@ -22229,17 +22951,6 @@ This option is currently only available on the MPC854x. -@item -m32 -@itemx -m64 -@opindex m32 -@opindex m64 -Generate code for 32-bit or 64-bit environments of Darwin and SVR4 -targets (including GNU/Linux). The 32-bit environment sets int, long -and pointer to 32 bits and generates code that runs on any PowerPC -variant. The 64-bit environment sets int to 32 bits and long and -pointer to 64 bits, and generates code for PowerPC64, as for -@option{-mpowerpc64}. - @item -mfull-toc @itemx -mno-fp-in-toc @itemx -mno-sum-in-toc @@ -22272,15 +22983,9 @@ uses extremely little TOC space. You may wish to use this option only on files that contain less frequently-executed code. -@item -maix64 -@itemx -maix32 -@opindex maix64 +@item -maix32 @opindex maix32 -Enable 64-bit AIX ABI and calling convention: 64-bit pointers, 64-bit -@code{long} type, and the infrastructure needed to support them. -Specifying @option{-maix64} implies @option{-mpowerpc64}, -while @option{-maix32} disables the 64-bit ABI and -implies @option{-mno-powerpc64}. GCC defaults to @option{-maix32}. +Disables the 64-bit ABI. GCC defaults to @option{-maix32}. @item -mxl-compat @itemx -mno-xl-compat @@ -22304,17 +23009,6 @@ default and only is necessary when calling subroutines compiled by IBM XL compilers without optimization. -@item -mpe -@opindex mpe -Support @dfn{IBM RS/6000 SP} @dfn{Parallel Environment} (PE)@. Link an -application written to use message passing with special startup code to -enable the application to run. The system must have PE installed in the -standard location (@file{/usr/lpp/ppe.poe/}), or the @file{specs} file -must be overridden with the @option{-specs=} option to specify the -appropriate directory location. The Parallel Environment does not -support threads, so the @option{-mpe} option and the @option{-pthread} -option are incompatible. - @item -malign-natural @itemx -malign-power @opindex malign-natural @@ -22343,23 +23037,6 @@ Generate code for single- or double-precision floating-point operations. @option{-mdouble-float} implies @option{-msingle-float}. -@item -msimple-fpu -@opindex msimple-fpu -Do not generate @code{sqrt} and @code{div} instructions for hardware -floating-point unit. - -@item -mfpu=@var{name} -@opindex mfpu -Specify type of floating-point unit. Valid values for @var{name} are -@samp{sp_lite} (equivalent to @option{-msingle-float -msimple-fpu}), -@samp{dp_lite} (equivalent to @option{-mdouble-float -msimple-fpu}), -@samp{sp_full} (equivalent to @option{-msingle-float}), -and @samp{dp_full} (equivalent to @option{-mdouble-float}). - -@item -mxilinx-fpu -@opindex mxilinx-fpu -Perform optimizations for the floating-point unit on Xilinx PPC 405/440. - @item -mmultiple @itemx -mno-multiple @opindex mmultiple @@ -22372,19 +23049,6 @@ processor is in little-endian mode. The exceptions are PPC740 and PPC750 which permit these instructions in little-endian mode. -@item -mstring -@itemx -mno-string -@opindex mstring -@opindex mno-string -Generate code that uses (does not use) the load string instructions -and the store string word instructions to save multiple registers and -do small block moves. These instructions are generated by default on -POWER systems, and not generated on PowerPC systems. Do not use -@option{-mstring} on little-endian PowerPC systems, since those -instructions do not work when the processor is in little-endian mode. -The exceptions are PPC740 and PPC750 which permit these instructions -in little-endian mode. - @item -mupdate @itemx -mno-update @opindex mupdate @@ -22418,37 +23082,6 @@ @option{-ffp-contract=fast} option, and @option{-mno-fused-madd} is mapped to @option{-ffp-contract=off}. -@item -mmulhw -@itemx -mno-mulhw -@opindex mmulhw -@opindex mno-mulhw -Generate code that uses (does not use) the half-word multiply and -multiply-accumulate instructions on the IBM 405, 440, 464 and 476 processors. -These instructions are generated by default when targeting those -processors. - -@item -mdlmzb -@itemx -mno-dlmzb -@opindex mdlmzb -@opindex mno-dlmzb -Generate code that uses (does not use) the string-search @samp{dlmzb} -instruction on the IBM 405, 440, 464 and 476 processors. This instruction is -generated by default when targeting those processors. - -@item -mno-bit-align -@itemx -mbit-align -@opindex mno-bit-align -@opindex mbit-align -On System V.4 and embedded PowerPC systems do not (do) force structures -and unions that contain bit-fields to be aligned to the base type of the -bit-field. - -For example, by default a structure containing nothing but 8 -@code{unsigned} bit-fields of length 1 is aligned to a 4-byte -boundary and has a size of 4 bytes. By using @option{-mno-bit-align}, -the structure is aligned to a 1-byte boundary and is 1 byte in -size. - @item -mno-strict-align @itemx -mstrict-align @opindex mno-strict-align @@ -22523,7 +23156,7 @@ This option controls the priority that is assigned to dispatch-slot restricted instructions during the second scheduling pass. The argument @var{priority} takes the value @samp{0}, @samp{1}, -or @samp{2} to assign no, highest, or second-highest (respectively) +or @samp{2} to assign no, highest, or second-highest (respectively) priority to dispatch-slot restricted instructions. @@ -22547,7 +23180,7 @@ Any dependence from store to load is costly. @item @var{number} -Any dependence for which the latency is greater than or equal to +Any dependence for which the latency is greater than or equal to @var{number} is costly. @end table @@ -22833,6 +23466,1304 @@ as can the GNU linker for PowerPC/64. It is planned to add this feature to the GNU linker for 32-bit PowerPC systems as well. +In the future, GCC may ignore all longcall specifications +when the linker is known to generate glue. + +@item -mtls-markers +@itemx -mno-tls-markers +@opindex mtls-markers +@opindex mno-tls-markers +Mark (do not mark) calls to @code{__tls_get_addr} with a relocation +specifying the function argument. The relocation allows the linker to +reliably associate function call with argument setup instructions for +TLS optimization, which in turn allows GCC to better schedule the +sequence. + +@item -mrecip +@itemx -mno-recip +@opindex mrecip +This option enables use of the reciprocal estimate and +reciprocal square root estimate instructions with additional +Newton-Raphson steps to increase precision instead of doing a divide or +square root and divide for floating-point arguments. You should use +the @option{-ffast-math} option when using @option{-mrecip} (or at +least @option{-funsafe-math-optimizations}, +@option{-ffinite-math-only}, @option{-freciprocal-math} and +@option{-fno-trapping-math}). Note that while the throughput of the +sequence is generally higher than the throughput of the non-reciprocal +instruction, the precision of the sequence can be decreased by up to 2 +ulp (i.e.@: the inverse of 1.0 equals 0.99999994) for reciprocal square +roots. + +@item -mrecip=@var{opt} +@opindex mrecip=opt +This option controls which reciprocal estimate instructions +may be used. @var{opt} is a comma-separated list of options, which may +be preceded by a @code{!} to invert the option: + +@table @samp + +@item all +Enable all estimate instructions. + +@item default +Enable the default instructions, equivalent to @option{-mrecip}. + +@item none +Disable all estimate instructions, equivalent to @option{-mno-recip}. + +@item div +Enable the reciprocal approximation instructions for both +single and double precision. + +@item divf +Enable the single-precision reciprocal approximation instructions. + +@item divd +Enable the double-precision reciprocal approximation instructions. + +@item rsqrt +Enable the reciprocal square root approximation instructions for both +single and double precision. + +@item rsqrtf +Enable the single-precision reciprocal square root approximation instructions. + +@item rsqrtd +Enable the double-precision reciprocal square root approximation instructions. + +@end table + +So, for example, @option{-mrecip=all,!rsqrtd} enables +all of the reciprocal estimate instructions, except for the +@code{FRSQRTE}, @code{XSRSQRTEDP}, and @code{XVRSQRTEDP} instructions +which handle the double-precision reciprocal square root calculations. + +@item -mrecip-precision +@itemx -mno-recip-precision +@opindex mrecip-precision +Assume (do not assume) that the reciprocal estimate instructions +provide higher-precision estimates than is mandated by the PowerPC +ABI. Selecting @option{-mcpu=power6}, @option{-mcpu=power7} or +@option{-mcpu=power8} automatically selects @option{-mrecip-precision}. +The double-precision square root estimate instructions are not generated by +default on low-precision machines, since they do not provide an +estimate that converges after three steps. + +@item -mpointers-to-nested-functions +@itemx -mno-pointers-to-nested-functions +@opindex mpointers-to-nested-functions +Generate (do not generate) code to load up the static chain register +(@code{r11}) when calling through a pointer on AIX and 64-bit Linux +systems where a function pointer points to a 3-word descriptor giving +the function address, TOC value to be loaded in register @code{r2}, and +static chain value to be loaded in register @code{r11}. The +@option{-mpointers-to-nested-functions} is on by default. You cannot +call through pointers to nested functions or pointers +to functions compiled in other languages that use the static chain if +you use @option{-mno-pointers-to-nested-functions}. + +@item -msave-toc-indirect +@itemx -mno-save-toc-indirect +@opindex msave-toc-indirect +Generate (do not generate) code to save the TOC value in the reserved +stack location in the function prologue if the function calls through +a pointer on AIX and 64-bit Linux systems. If the TOC value is not +saved in the prologue, it is saved just before the call through the +pointer. The @option{-mno-save-toc-indirect} option is the default. + +@item -mcompat-align-parm +@itemx -mno-compat-align-parm +@opindex mcompat-align-parm +Generate (do not generate) code to pass structure parameters with a +maximum alignment of 64 bits, for compatibility with older versions +of GCC. + +Older versions of GCC (prior to 4.9.0) incorrectly did not align a +structure parameter on a 128-bit boundary when that structure contained +a member requiring 128-bit alignment. This is corrected in more +recent versions of GCC. This option may be used to generate code +that is compatible with functions compiled with older versions of +GCC. + +The @option{-mno-compat-align-parm} option is the default. + +@item -mstack-protector-guard=@var{guard} +@itemx -mstack-protector-guard-reg=@var{reg} +@itemx -mstack-protector-guard-offset=@var{offset} +@itemx -mstack-protector-guard-symbol=@var{symbol} +@opindex mstack-protector-guard +@opindex mstack-protector-guard-reg +@opindex mstack-protector-guard-offset +@opindex mstack-protector-guard-symbol +Generate stack protection code using canary at @var{guard}. Supported +locations are @samp{global} for global canary or @samp{tls} for per-thread +canary in the TLS block (the default with GNU libc version 2.4 or later). + +With the latter choice the options +@option{-mstack-protector-guard-reg=@var{reg}} and +@option{-mstack-protector-guard-offset=@var{offset}} furthermore specify +which register to use as base register for reading the canary, and from what +offset from that base register. The default for those is as specified in the +relevant ABI. @option{-mstack-protector-guard-symbol=@var{symbol}} overrides +the offset with a symbol reference to a canary in the TLS block. +@end table + + +@node RISC-V Options +@subsection RISC-V Options +@cindex RISC-V Options + +These command-line options are defined for RISC-V targets: + +@table @gcctabopt +@item -mbranch-cost=@var{n} +@opindex mbranch-cost +Set the cost of branches to roughly @var{n} instructions. + +@item -mplt +@itemx -mno-plt +@opindex plt +When generating PIC code, do or don't allow the use of PLTs. Ignored for +non-PIC. The default is @option{-mplt}. + +@item -mabi=@var{ABI-string} +@opindex mabi +Specify integer and floating-point calling convention. @var{ABI-string} +contains two parts: the size of integer types and the registers used for +floating-point types. For example @samp{-march=rv64ifd -mabi=lp64d} means that +@samp{long} and pointers are 64-bit (implicitly defining @samp{int} to be +32-bit), and that floating-point values up to 64 bits wide are passed in F +registers. Contrast this with @samp{-march=rv64ifd -mabi=lp64f}, which still +allows the compiler to generate code that uses the F and D extensions but only +allows floating-point values up to 32 bits long to be passed in registers; or +@samp{-march=rv64ifd -mabi=lp64}, in which no floating-point arguments will be +passed in registers. + +The default for this argument is system dependent, users who want a specific +calling convention should specify one explicitly. The valid calling +conventions are: @samp{ilp32}, @samp{ilp32f}, @samp{ilp32d}, @samp{lp64}, +@samp{lp64f}, and @samp{lp64d}. Some calling conventions are impossible to +implement on some ISAs: for example, @samp{-march=rv32if -mabi=ilp32d} is +invalid because the ABI requires 64-bit values be passed in F registers, but F +registers are only 32 bits wide. There is also the @samp{ilp32e} ABI that can +only be used with the @samp{rv32e} architecture. This ABI is not well +specified at present, and is subject to change. + +@item -mfdiv +@itemx -mno-fdiv +@opindex mfdiv +Do or don't use hardware floating-point divide and square root instructions. +This requires the F or D extensions for floating-point registers. The default +is to use them if the specified architecture has these instructions. + +@item -mdiv +@itemx -mno-div +@opindex mdiv +Do or don't use hardware instructions for integer division. This requires the +M extension. The default is to use them if the specified architecture has +these instructions. + +@item -march=@var{ISA-string} +@opindex march +Generate code for given RISC-V ISA (e.g.@ @samp{rv64im}). ISA strings must be +lower-case. Examples include @samp{rv64i}, @samp{rv32g}, @samp{rv32e}, and +@samp{rv32imaf}. + +@item -mtune=@var{processor-string} +@opindex mtune +Optimize the output for the given processor, specified by microarchitecture +name. + +@item -mpreferred-stack-boundary=@var{num} +@opindex mpreferred-stack-boundary +Attempt to keep the stack boundary aligned to a 2 raised to @var{num} +byte boundary. If @option{-mpreferred-stack-boundary} is not specified, +the default is 4 (16 bytes or 128-bits). + +@strong{Warning:} If you use this switch, then you must build all modules with +the same value, including any libraries. This includes the system libraries +and startup modules. + +@item -msmall-data-limit=@var{n} +@opindex msmall-data-limit +Put global and static data smaller than @var{n} bytes into a special section +(on some targets). + +@item -msave-restore +@itemx -mno-save-restore +@opindex msave-restore +Do or don't use smaller but slower prologue and epilogue code that uses +library function calls. The default is to use fast inline prologues and +epilogues. + +@item -mstrict-align +@itemx -mno-strict-align +@opindex mstrict-align +Do not or do generate unaligned memory accesses. The default is set depending +on whether the processor we are optimizing for supports fast unaligned access +or not. + +@item -mcmodel=medlow +@opindex mcmodel=medlow +Generate code for the medium-low code model. The program and its statically +defined symbols must lie within a single 2 GiB address range and must lie +between absolute addresses @minus{}2 GiB and +2 GiB. Programs can be +statically or dynamically linked. This is the default code model. + +@item -mcmodel=medany +@opindex mcmodel=medany +Generate code for the medium-any code model. The program and its statically +defined symbols must be within any single 2 GiB address range. Programs can be +statically or dynamically linked. + +@item -mexplicit-relocs +@itemx -mno-exlicit-relocs +Use or do not use assembler relocation operators when dealing with symbolic +addresses. The alternative is to use assembler macros instead, which may +limit optimization. + +@item -mrelax +@itemx -mno-relax +Take advantage of linker relaxations to reduce the number of instructions +required to materialize symbol addresses. The default is to take advantage of +linker relaxations. + +@end table + +@node RL78 Options +@subsection RL78 Options +@cindex RL78 Options + +@table @gcctabopt + +@item -msim +@opindex msim +Links in additional target libraries to support operation within a +simulator. + +@item -mmul=none +@itemx -mmul=g10 +@itemx -mmul=g13 +@itemx -mmul=g14 +@itemx -mmul=rl78 +@opindex mmul +Specifies the type of hardware multiplication and division support to +be used. The simplest is @code{none}, which uses software for both +multiplication and division. This is the default. The @code{g13} +value is for the hardware multiply/divide peripheral found on the +RL78/G13 (S2 core) targets. The @code{g14} value selects the use of +the multiplication and division instructions supported by the RL78/G14 +(S3 core) parts. The value @code{rl78} is an alias for @code{g14} and +the value @code{mg10} is an alias for @code{none}. + +In addition a C preprocessor macro is defined, based upon the setting +of this option. Possible values are: @code{__RL78_MUL_NONE__}, +@code{__RL78_MUL_G13__} or @code{__RL78_MUL_G14__}. + +@item -mcpu=g10 +@itemx -mcpu=g13 +@itemx -mcpu=g14 +@itemx -mcpu=rl78 +@opindex mcpu +Specifies the RL78 core to target. The default is the G14 core, also +known as an S3 core or just RL78. The G13 or S2 core does not have +multiply or divide instructions, instead it uses a hardware peripheral +for these operations. The G10 or S1 core does not have register +banks, so it uses a different calling convention. + +If this option is set it also selects the type of hardware multiply +support to use, unless this is overridden by an explicit +@option{-mmul=none} option on the command line. Thus specifying +@option{-mcpu=g13} enables the use of the G13 hardware multiply +peripheral and specifying @option{-mcpu=g10} disables the use of +hardware multiplications altogether. + +Note, although the RL78/G14 core is the default target, specifying +@option{-mcpu=g14} or @option{-mcpu=rl78} on the command line does +change the behavior of the toolchain since it also enables G14 +hardware multiply support. If these options are not specified on the +command line then software multiplication routines will be used even +though the code targets the RL78 core. This is for backwards +compatibility with older toolchains which did not have hardware +multiply and divide support. + +In addition a C preprocessor macro is defined, based upon the setting +of this option. Possible values are: @code{__RL78_G10__}, +@code{__RL78_G13__} or @code{__RL78_G14__}. + +@item -mg10 +@itemx -mg13 +@itemx -mg14 +@itemx -mrl78 +@opindex mg10 +@opindex mg13 +@opindex mg14 +@opindex mrl78 +These are aliases for the corresponding @option{-mcpu=} option. They +are provided for backwards compatibility. + +@item -mallregs +@opindex mallregs +Allow the compiler to use all of the available registers. By default +registers @code{r24..r31} are reserved for use in interrupt handlers. +With this option enabled these registers can be used in ordinary +functions as well. + +@item -m64bit-doubles +@itemx -m32bit-doubles +@opindex m64bit-doubles +@opindex m32bit-doubles +Make the @code{double} data type be 64 bits (@option{-m64bit-doubles}) +or 32 bits (@option{-m32bit-doubles}) in size. The default is +@option{-m32bit-doubles}. + +@item -msave-mduc-in-interrupts +@itemx -mno-save-mduc-in-interrupts +@opindex msave-mduc-in-interrupts +@opindex mno-save-mduc-in-interrupts +Specifies that interrupt handler functions should preserve the +MDUC registers. This is only necessary if normal code might use +the MDUC registers, for example because it performs multiplication +and division operations. The default is to ignore the MDUC registers +as this makes the interrupt handlers faster. The target option -mg13 +needs to be passed for this to work as this feature is only available +on the G13 target (S2 core). The MDUC registers will only be saved +if the interrupt handler performs a multiplication or division +operation or it calls another function. + +@end table + +@node RS/6000 and PowerPC Options +@subsection IBM RS/6000 and PowerPC Options +@cindex RS/6000 and PowerPC Options +@cindex IBM RS/6000 and PowerPC Options + +These @samp{-m} options are defined for the IBM RS/6000 and PowerPC: +@table @gcctabopt +@item -mpowerpc-gpopt +@itemx -mno-powerpc-gpopt +@itemx -mpowerpc-gfxopt +@itemx -mno-powerpc-gfxopt +@need 800 +@itemx -mpowerpc64 +@itemx -mno-powerpc64 +@itemx -mmfcrf +@itemx -mno-mfcrf +@itemx -mpopcntb +@itemx -mno-popcntb +@itemx -mpopcntd +@itemx -mno-popcntd +@itemx -mfprnd +@itemx -mno-fprnd +@need 800 +@itemx -mcmpb +@itemx -mno-cmpb +@itemx -mmfpgpr +@itemx -mno-mfpgpr +@itemx -mhard-dfp +@itemx -mno-hard-dfp +@opindex mpowerpc-gpopt +@opindex mno-powerpc-gpopt +@opindex mpowerpc-gfxopt +@opindex mno-powerpc-gfxopt +@opindex mpowerpc64 +@opindex mno-powerpc64 +@opindex mmfcrf +@opindex mno-mfcrf +@opindex mpopcntb +@opindex mno-popcntb +@opindex mpopcntd +@opindex mno-popcntd +@opindex mfprnd +@opindex mno-fprnd +@opindex mcmpb +@opindex mno-cmpb +@opindex mmfpgpr +@opindex mno-mfpgpr +@opindex mhard-dfp +@opindex mno-hard-dfp +You use these options to specify which instructions are available on the +processor you are using. The default value of these options is +determined when configuring GCC@. Specifying the +@option{-mcpu=@var{cpu_type}} overrides the specification of these +options. We recommend you use the @option{-mcpu=@var{cpu_type}} option +rather than the options listed above. + +Specifying @option{-mpowerpc-gpopt} allows +GCC to use the optional PowerPC architecture instructions in the +General Purpose group, including floating-point square root. Specifying +@option{-mpowerpc-gfxopt} allows GCC to +use the optional PowerPC architecture instructions in the Graphics +group, including floating-point select. + +The @option{-mmfcrf} option allows GCC to generate the move from +condition register field instruction implemented on the POWER4 +processor and other processors that support the PowerPC V2.01 +architecture. +The @option{-mpopcntb} option allows GCC to generate the popcount and +double-precision FP reciprocal estimate instruction implemented on the +POWER5 processor and other processors that support the PowerPC V2.02 +architecture. +The @option{-mpopcntd} option allows GCC to generate the popcount +instruction implemented on the POWER7 processor and other processors +that support the PowerPC V2.06 architecture. +The @option{-mfprnd} option allows GCC to generate the FP round to +integer instructions implemented on the POWER5+ processor and other +processors that support the PowerPC V2.03 architecture. +The @option{-mcmpb} option allows GCC to generate the compare bytes +instruction implemented on the POWER6 processor and other processors +that support the PowerPC V2.05 architecture. +The @option{-mmfpgpr} option allows GCC to generate the FP move to/from +general-purpose register instructions implemented on the POWER6X +processor and other processors that support the extended PowerPC V2.05 +architecture. +The @option{-mhard-dfp} option allows GCC to generate the decimal +floating-point instructions implemented on some POWER processors. + +The @option{-mpowerpc64} option allows GCC to generate the additional +64-bit instructions that are found in the full PowerPC64 architecture +and to treat GPRs as 64-bit, doubleword quantities. GCC defaults to +@option{-mno-powerpc64}. + +@item -mcpu=@var{cpu_type} +@opindex mcpu +Set architecture type, register usage, and +instruction scheduling parameters for machine type @var{cpu_type}. +Supported values for @var{cpu_type} are @samp{401}, @samp{403}, +@samp{405}, @samp{405fp}, @samp{440}, @samp{440fp}, @samp{464}, @samp{464fp}, +@samp{476}, @samp{476fp}, @samp{505}, @samp{601}, @samp{602}, @samp{603}, +@samp{603e}, @samp{604}, @samp{604e}, @samp{620}, @samp{630}, @samp{740}, +@samp{7400}, @samp{7450}, @samp{750}, @samp{801}, @samp{821}, @samp{823}, +@samp{860}, @samp{970}, @samp{8540}, @samp{a2}, @samp{e300c2}, +@samp{e300c3}, @samp{e500mc}, @samp{e500mc64}, @samp{e5500}, +@samp{e6500}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5}, +@samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+}, +@samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8}, +@samp{power9}, @samp{powerpc}, @samp{powerpc64}, @samp{powerpc64le}, +@samp{rs64}, and @samp{native}. + +@option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and +@option{-mcpu=powerpc64le} specify pure 32-bit PowerPC (either +endian), 64-bit big endian PowerPC and 64-bit little endian PowerPC +architecture machine types, with an appropriate, generic processor +model assumed for scheduling purposes. + +Specifying @samp{native} as cpu type detects and selects the +architecture option that corresponds to the host processor of the +system performing the compilation. +@option{-mcpu=native} has no effect if GCC does not recognize the +processor. + +The other options specify a specific processor. Code generated under +those options runs best on that processor, and may not run at all on +others. + +The @option{-mcpu} options automatically enable or disable the +following options: + +@gccoptlist{-maltivec -mfprnd -mhard-float -mmfcrf -mmultiple @gol +-mpopcntb -mpopcntd -mpowerpc64 @gol +-mpowerpc-gpopt -mpowerpc-gfxopt @gol +-mmulhw -mdlmzb -mmfpgpr -mvsx @gol +-mcrypto -mhtm -mpower8-fusion -mpower8-vector @gol +-mquad-memory -mquad-memory-atomic -mfloat128 -mfloat128-hardware} + +The particular options set for any particular CPU varies between +compiler versions, depending on what setting seems to produce optimal +code for that CPU; it doesn't necessarily reflect the actual hardware's +capabilities. If you wish to set an individual option to a particular +value, you may specify it after the @option{-mcpu} option, like +@option{-mcpu=970 -mno-altivec}. + +On AIX, the @option{-maltivec} and @option{-mpowerpc64} options are +not enabled or disabled by the @option{-mcpu} option at present because +AIX does not have full support for these options. You may still +enable or disable them individually if you're sure it'll work in your +environment. + +@item -mtune=@var{cpu_type} +@opindex mtune +Set the instruction scheduling parameters for machine type +@var{cpu_type}, but do not set the architecture type or register usage, +as @option{-mcpu=@var{cpu_type}} does. The same +values for @var{cpu_type} are used for @option{-mtune} as for +@option{-mcpu}. If both are specified, the code generated uses the +architecture and registers set by @option{-mcpu}, but the +scheduling parameters set by @option{-mtune}. + +@item -mcmodel=small +@opindex mcmodel=small +Generate PowerPC64 code for the small model: The TOC is limited to +64k. + +@item -mcmodel=medium +@opindex mcmodel=medium +Generate PowerPC64 code for the medium model: The TOC and other static +data may be up to a total of 4G in size. This is the default for 64-bit +Linux. + +@item -mcmodel=large +@opindex mcmodel=large +Generate PowerPC64 code for the large model: The TOC may be up to 4G +in size. Other data and code is only limited by the 64-bit address +space. + +@item -maltivec +@itemx -mno-altivec +@opindex maltivec +@opindex mno-altivec +Generate code that uses (does not use) AltiVec instructions, and also +enable the use of built-in functions that allow more direct access to +the AltiVec instruction set. You may also need to set +@option{-mabi=altivec} to adjust the current ABI with AltiVec ABI +enhancements. + +When @option{-maltivec} is used, rather than @option{-maltivec=le} or +@option{-maltivec=be}, the element order for AltiVec intrinsics such +as @code{vec_splat}, @code{vec_extract}, and @code{vec_insert} +match array element order corresponding to the endianness of the +target. That is, element zero identifies the leftmost element in a +vector register when targeting a big-endian platform, and identifies +the rightmost element in a vector register when targeting a +little-endian platform. + +@item -maltivec=be +@opindex maltivec=be +Generate AltiVec instructions using big-endian element order, +regardless of whether the target is big- or little-endian. This is +the default when targeting a big-endian platform. Using this option +is currently deprecated. Support for this feature will be removed in +GCC 9. + +The element order is used to interpret element numbers in AltiVec +intrinsics such as @code{vec_splat}, @code{vec_extract}, and +@code{vec_insert}. By default, these match array element order +corresponding to the endianness for the target. + +@item -maltivec=le +@opindex maltivec=le +Generate AltiVec instructions using little-endian element order, +regardless of whether the target is big- or little-endian. This is +the default when targeting a little-endian platform. This option is +currently ignored when targeting a big-endian platform. + +The element order is used to interpret element numbers in AltiVec +intrinsics such as @code{vec_splat}, @code{vec_extract}, and +@code{vec_insert}. By default, these match array element order +corresponding to the endianness for the target. + +@item -mvrsave +@itemx -mno-vrsave +@opindex mvrsave +@opindex mno-vrsave +Generate VRSAVE instructions when generating AltiVec code. + +@item -msecure-plt +@opindex msecure-plt +Generate code that allows @command{ld} and @command{ld.so} +to build executables and shared +libraries with non-executable @code{.plt} and @code{.got} sections. +This is a PowerPC +32-bit SYSV ABI option. + +@item -mbss-plt +@opindex mbss-plt +Generate code that uses a BSS @code{.plt} section that @command{ld.so} +fills in, and +requires @code{.plt} and @code{.got} +sections that are both writable and executable. +This is a PowerPC 32-bit SYSV ABI option. + +@item -misel +@itemx -mno-isel +@opindex misel +@opindex mno-isel +This switch enables or disables the generation of ISEL instructions. + +@item -mvsx +@itemx -mno-vsx +@opindex mvsx +@opindex mno-vsx +Generate code that uses (does not use) vector/scalar (VSX) +instructions, and also enable the use of built-in functions that allow +more direct access to the VSX instruction set. + +@item -mcrypto +@itemx -mno-crypto +@opindex mcrypto +@opindex mno-crypto +Enable the use (disable) of the built-in functions that allow direct +access to the cryptographic instructions that were added in version +2.07 of the PowerPC ISA. + +@item -mhtm +@itemx -mno-htm +@opindex mhtm +@opindex mno-htm +Enable (disable) the use of the built-in functions that allow direct +access to the Hardware Transactional Memory (HTM) instructions that +were added in version 2.07 of the PowerPC ISA. + +@item -mpower8-fusion +@itemx -mno-power8-fusion +@opindex mpower8-fusion +@opindex mno-power8-fusion +Generate code that keeps (does not keeps) some integer operations +adjacent so that the instructions can be fused together on power8 and +later processors. + +@item -mpower8-vector +@itemx -mno-power8-vector +@opindex mpower8-vector +@opindex mno-power8-vector +Generate code that uses (does not use) the vector and scalar +instructions that were added in version 2.07 of the PowerPC ISA. Also +enable the use of built-in functions that allow more direct access to +the vector instructions. + +@item -mquad-memory +@itemx -mno-quad-memory +@opindex mquad-memory +@opindex mno-quad-memory +Generate code that uses (does not use) the non-atomic quad word memory +instructions. The @option{-mquad-memory} option requires use of +64-bit mode. + +@item -mquad-memory-atomic +@itemx -mno-quad-memory-atomic +@opindex mquad-memory-atomic +@opindex mno-quad-memory-atomic +Generate code that uses (does not use) the atomic quad word memory +instructions. The @option{-mquad-memory-atomic} option requires use of +64-bit mode. + +@item -mfloat128 +@itemx -mno-float128 +@opindex mfloat128 +@opindex mno-float128 +Enable/disable the @var{__float128} keyword for IEEE 128-bit floating point +and use either software emulation for IEEE 128-bit floating point or +hardware instructions. + +The VSX instruction set (@option{-mvsx}, @option{-mcpu=power7}, +@option{-mcpu=power8}), or @option{-mcpu=power9} must be enabled to +use the IEEE 128-bit floating point support. The IEEE 128-bit +floating point support only works on PowerPC Linux systems. + +The default for @option{-mfloat128} is enabled on PowerPC Linux +systems using the VSX instruction set, and disabled on other systems. + +If you use the ISA 3.0 instruction set (@option{-mpower9-vector} or +@option{-mcpu=power9}) on a 64-bit system, the IEEE 128-bit floating +point support will also enable the generation of ISA 3.0 IEEE 128-bit +floating point instructions. Otherwise, if you do not specify to +generate ISA 3.0 instructions or you are targeting a 32-bit big endian +system, IEEE 128-bit floating point will be done with software +emulation. + +@item -mfloat128-hardware +@itemx -mno-float128-hardware +@opindex mfloat128-hardware +@opindex mno-float128-hardware +Enable/disable using ISA 3.0 hardware instructions to support the +@var{__float128} data type. + +The default for @option{-mfloat128-hardware} is enabled on PowerPC +Linux systems using the ISA 3.0 instruction set, and disabled on other +systems. + +@item -m32 +@itemx -m64 +@opindex m32 +@opindex m64 +Generate code for 32-bit or 64-bit environments of Darwin and SVR4 +targets (including GNU/Linux). The 32-bit environment sets int, long +and pointer to 32 bits and generates code that runs on any PowerPC +variant. The 64-bit environment sets int to 32 bits and long and +pointer to 64 bits, and generates code for PowerPC64, as for +@option{-mpowerpc64}. + +@item -mfull-toc +@itemx -mno-fp-in-toc +@itemx -mno-sum-in-toc +@itemx -mminimal-toc +@opindex mfull-toc +@opindex mno-fp-in-toc +@opindex mno-sum-in-toc +@opindex mminimal-toc +Modify generation of the TOC (Table Of Contents), which is created for +every executable file. The @option{-mfull-toc} option is selected by +default. In that case, GCC allocates at least one TOC entry for +each unique non-automatic variable reference in your program. GCC +also places floating-point constants in the TOC@. However, only +16,384 entries are available in the TOC@. + +If you receive a linker error message that saying you have overflowed +the available TOC space, you can reduce the amount of TOC space used +with the @option{-mno-fp-in-toc} and @option{-mno-sum-in-toc} options. +@option{-mno-fp-in-toc} prevents GCC from putting floating-point +constants in the TOC and @option{-mno-sum-in-toc} forces GCC to +generate code to calculate the sum of an address and a constant at +run time instead of putting that sum into the TOC@. You may specify one +or both of these options. Each causes GCC to produce very slightly +slower and larger code at the expense of conserving TOC space. + +If you still run out of space in the TOC even when you specify both of +these options, specify @option{-mminimal-toc} instead. This option causes +GCC to make only one TOC entry for every file. When you specify this +option, GCC produces code that is slower and larger but which +uses extremely little TOC space. You may wish to use this option +only on files that contain less frequently-executed code. + +@item -maix64 +@itemx -maix32 +@opindex maix64 +@opindex maix32 +Enable 64-bit AIX ABI and calling convention: 64-bit pointers, 64-bit +@code{long} type, and the infrastructure needed to support them. +Specifying @option{-maix64} implies @option{-mpowerpc64}, +while @option{-maix32} disables the 64-bit ABI and +implies @option{-mno-powerpc64}. GCC defaults to @option{-maix32}. + +@item -mxl-compat +@itemx -mno-xl-compat +@opindex mxl-compat +@opindex mno-xl-compat +Produce code that conforms more closely to IBM XL compiler semantics +when using AIX-compatible ABI@. Pass floating-point arguments to +prototyped functions beyond the register save area (RSA) on the stack +in addition to argument FPRs. Do not assume that most significant +double in 128-bit long double value is properly rounded when comparing +values and converting to double. Use XL symbol names for long double +support routines. + +The AIX calling convention was extended but not initially documented to +handle an obscure K&R C case of calling a function that takes the +address of its arguments with fewer arguments than declared. IBM XL +compilers access floating-point arguments that do not fit in the +RSA from the stack when a subroutine is compiled without +optimization. Because always storing floating-point arguments on the +stack is inefficient and rarely needed, this option is not enabled by +default and only is necessary when calling subroutines compiled by IBM +XL compilers without optimization. + +@item -mpe +@opindex mpe +Support @dfn{IBM RS/6000 SP} @dfn{Parallel Environment} (PE)@. Link an +application written to use message passing with special startup code to +enable the application to run. The system must have PE installed in the +standard location (@file{/usr/lpp/ppe.poe/}), or the @file{specs} file +must be overridden with the @option{-specs=} option to specify the +appropriate directory location. The Parallel Environment does not +support threads, so the @option{-mpe} option and the @option{-pthread} +option are incompatible. + +@item -malign-natural +@itemx -malign-power +@opindex malign-natural +@opindex malign-power +On AIX, 32-bit Darwin, and 64-bit PowerPC GNU/Linux, the option +@option{-malign-natural} overrides the ABI-defined alignment of larger +types, such as floating-point doubles, on their natural size-based boundary. +The option @option{-malign-power} instructs GCC to follow the ABI-specified +alignment rules. GCC defaults to the standard alignment defined in the ABI@. + +On 64-bit Darwin, natural alignment is the default, and @option{-malign-power} +is not supported. + +@item -msoft-float +@itemx -mhard-float +@opindex msoft-float +@opindex mhard-float +Generate code that does not use (uses) the floating-point register set. +Software floating-point emulation is provided if you use the +@option{-msoft-float} option, and pass the option to GCC when linking. + +@item -mmultiple +@itemx -mno-multiple +@opindex mmultiple +@opindex mno-multiple +Generate code that uses (does not use) the load multiple word +instructions and the store multiple word instructions. These +instructions are generated by default on POWER systems, and not +generated on PowerPC systems. Do not use @option{-mmultiple} on little-endian +PowerPC systems, since those instructions do not work when the +processor is in little-endian mode. The exceptions are PPC740 and +PPC750 which permit these instructions in little-endian mode. + +@item -mupdate +@itemx -mno-update +@opindex mupdate +@opindex mno-update +Generate code that uses (does not use) the load or store instructions +that update the base register to the address of the calculated memory +location. These instructions are generated by default. If you use +@option{-mno-update}, there is a small window between the time that the +stack pointer is updated and the address of the previous frame is +stored, which means code that walks the stack frame across interrupts or +signals may get corrupted data. + +@item -mavoid-indexed-addresses +@itemx -mno-avoid-indexed-addresses +@opindex mavoid-indexed-addresses +@opindex mno-avoid-indexed-addresses +Generate code that tries to avoid (not avoid) the use of indexed load +or store instructions. These instructions can incur a performance +penalty on Power6 processors in certain situations, such as when +stepping through large arrays that cross a 16M boundary. This option +is enabled by default when targeting Power6 and disabled otherwise. + +@item -mfused-madd +@itemx -mno-fused-madd +@opindex mfused-madd +@opindex mno-fused-madd +Generate code that uses (does not use) the floating-point multiply and +accumulate instructions. These instructions are generated by default +if hardware floating point is used. The machine-dependent +@option{-mfused-madd} option is now mapped to the machine-independent +@option{-ffp-contract=fast} option, and @option{-mno-fused-madd} is +mapped to @option{-ffp-contract=off}. + +@item -mmulhw +@itemx -mno-mulhw +@opindex mmulhw +@opindex mno-mulhw +Generate code that uses (does not use) the half-word multiply and +multiply-accumulate instructions on the IBM 405, 440, 464 and 476 processors. +These instructions are generated by default when targeting those +processors. + +@item -mdlmzb +@itemx -mno-dlmzb +@opindex mdlmzb +@opindex mno-dlmzb +Generate code that uses (does not use) the string-search @samp{dlmzb} +instruction on the IBM 405, 440, 464 and 476 processors. This instruction is +generated by default when targeting those processors. + +@item -mno-bit-align +@itemx -mbit-align +@opindex mno-bit-align +@opindex mbit-align +On System V.4 and embedded PowerPC systems do not (do) force structures +and unions that contain bit-fields to be aligned to the base type of the +bit-field. + +For example, by default a structure containing nothing but 8 +@code{unsigned} bit-fields of length 1 is aligned to a 4-byte +boundary and has a size of 4 bytes. By using @option{-mno-bit-align}, +the structure is aligned to a 1-byte boundary and is 1 byte in +size. + +@item -mno-strict-align +@itemx -mstrict-align +@opindex mno-strict-align +@opindex mstrict-align +On System V.4 and embedded PowerPC systems do not (do) assume that +unaligned memory references are handled by the system. + +@item -mrelocatable +@itemx -mno-relocatable +@opindex mrelocatable +@opindex mno-relocatable +Generate code that allows (does not allow) a static executable to be +relocated to a different address at run time. A simple embedded +PowerPC system loader should relocate the entire contents of +@code{.got2} and 4-byte locations listed in the @code{.fixup} section, +a table of 32-bit addresses generated by this option. For this to +work, all objects linked together must be compiled with +@option{-mrelocatable} or @option{-mrelocatable-lib}. +@option{-mrelocatable} code aligns the stack to an 8-byte boundary. + +@item -mrelocatable-lib +@itemx -mno-relocatable-lib +@opindex mrelocatable-lib +@opindex mno-relocatable-lib +Like @option{-mrelocatable}, @option{-mrelocatable-lib} generates a +@code{.fixup} section to allow static executables to be relocated at +run time, but @option{-mrelocatable-lib} does not use the smaller stack +alignment of @option{-mrelocatable}. Objects compiled with +@option{-mrelocatable-lib} may be linked with objects compiled with +any combination of the @option{-mrelocatable} options. + +@item -mno-toc +@itemx -mtoc +@opindex mno-toc +@opindex mtoc +On System V.4 and embedded PowerPC systems do not (do) assume that +register 2 contains a pointer to a global area pointing to the addresses +used in the program. + +@item -mlittle +@itemx -mlittle-endian +@opindex mlittle +@opindex mlittle-endian +On System V.4 and embedded PowerPC systems compile code for the +processor in little-endian mode. The @option{-mlittle-endian} option is +the same as @option{-mlittle}. + +@item -mbig +@itemx -mbig-endian +@opindex mbig +@opindex mbig-endian +On System V.4 and embedded PowerPC systems compile code for the +processor in big-endian mode. The @option{-mbig-endian} option is +the same as @option{-mbig}. + +@item -mdynamic-no-pic +@opindex mdynamic-no-pic +On Darwin and Mac OS X systems, compile code so that it is not +relocatable, but that its external references are relocatable. The +resulting code is suitable for applications, but not shared +libraries. + +@item -msingle-pic-base +@opindex msingle-pic-base +Treat the register used for PIC addressing as read-only, rather than +loading it in the prologue for each function. The runtime system is +responsible for initializing this register with an appropriate value +before execution begins. + +@item -mprioritize-restricted-insns=@var{priority} +@opindex mprioritize-restricted-insns +This option controls the priority that is assigned to +dispatch-slot restricted instructions during the second scheduling +pass. The argument @var{priority} takes the value @samp{0}, @samp{1}, +or @samp{2} to assign no, highest, or second-highest (respectively) +priority to dispatch-slot restricted +instructions. + +@item -msched-costly-dep=@var{dependence_type} +@opindex msched-costly-dep +This option controls which dependences are considered costly +by the target during instruction scheduling. The argument +@var{dependence_type} takes one of the following values: + +@table @asis +@item @samp{no} +No dependence is costly. + +@item @samp{all} +All dependences are costly. + +@item @samp{true_store_to_load} +A true dependence from store to load is costly. + +@item @samp{store_to_load} +Any dependence from store to load is costly. + +@item @var{number} +Any dependence for which the latency is greater than or equal to +@var{number} is costly. +@end table + +@item -minsert-sched-nops=@var{scheme} +@opindex minsert-sched-nops +This option controls which NOP insertion scheme is used during +the second scheduling pass. The argument @var{scheme} takes one of the +following values: + +@table @asis +@item @samp{no} +Don't insert NOPs. + +@item @samp{pad} +Pad with NOPs any dispatch group that has vacant issue slots, +according to the scheduler's grouping. + +@item @samp{regroup_exact} +Insert NOPs to force costly dependent insns into +separate groups. Insert exactly as many NOPs as needed to force an insn +to a new group, according to the estimated processor grouping. + +@item @var{number} +Insert NOPs to force costly dependent insns into +separate groups. Insert @var{number} NOPs to force an insn to a new group. +@end table + +@item -mcall-sysv +@opindex mcall-sysv +On System V.4 and embedded PowerPC systems compile code using calling +conventions that adhere to the March 1995 draft of the System V +Application Binary Interface, PowerPC processor supplement. This is the +default unless you configured GCC using @samp{powerpc-*-eabiaix}. + +@item -mcall-sysv-eabi +@itemx -mcall-eabi +@opindex mcall-sysv-eabi +@opindex mcall-eabi +Specify both @option{-mcall-sysv} and @option{-meabi} options. + +@item -mcall-sysv-noeabi +@opindex mcall-sysv-noeabi +Specify both @option{-mcall-sysv} and @option{-mno-eabi} options. + +@item -mcall-aixdesc +@opindex m +On System V.4 and embedded PowerPC systems compile code for the AIX +operating system. + +@item -mcall-linux +@opindex mcall-linux +On System V.4 and embedded PowerPC systems compile code for the +Linux-based GNU system. + +@item -mcall-freebsd +@opindex mcall-freebsd +On System V.4 and embedded PowerPC systems compile code for the +FreeBSD operating system. + +@item -mcall-netbsd +@opindex mcall-netbsd +On System V.4 and embedded PowerPC systems compile code for the +NetBSD operating system. + +@item -mcall-openbsd +@opindex mcall-netbsd +On System V.4 and embedded PowerPC systems compile code for the +OpenBSD operating system. + +@item -mtraceback=@var{traceback_type} +@opindex mtraceback +Select the type of traceback table. Valid values for @var{traceback_type} +are @samp{full}, @samp{part}, and @samp{no}. + +@item -maix-struct-return +@opindex maix-struct-return +Return all structures in memory (as specified by the AIX ABI)@. + +@item -msvr4-struct-return +@opindex msvr4-struct-return +Return structures smaller than 8 bytes in registers (as specified by the +SVR4 ABI)@. + +@item -mabi=@var{abi-type} +@opindex mabi +Extend the current ABI with a particular extension, or remove such extension. +Valid values are @samp{altivec}, @samp{no-altivec}, +@samp{ibmlongdouble}, @samp{ieeelongdouble}, +@samp{elfv1}, @samp{elfv2}@. + +@item -mabi=ibmlongdouble +@opindex mabi=ibmlongdouble +Change the current ABI to use IBM extended-precision long double. +This is not likely to work if your system defaults to using IEEE +extended-precision long double. If you change the long double type +from IEEE extended-precision, the compiler will issue a warning unless +you use the @option{-Wno-psabi} option. + +@item -mabi=ieeelongdouble +@opindex mabi=ieeelongdouble +Change the current ABI to use IEEE extended-precision long double. +This is not likely to work if your system defaults to using IBM +extended-precision long double. If you change the long double type +from IBM extended-precision, the compiler will issue a warning unless +you use the @option{-Wno-psabi} option. + +@item -mabi=elfv1 +@opindex mabi=elfv1 +Change the current ABI to use the ELFv1 ABI. +This is the default ABI for big-endian PowerPC 64-bit Linux. +Overriding the default ABI requires special system support and is +likely to fail in spectacular ways. + +@item -mabi=elfv2 +@opindex mabi=elfv2 +Change the current ABI to use the ELFv2 ABI. +This is the default ABI for little-endian PowerPC 64-bit Linux. +Overriding the default ABI requires special system support and is +likely to fail in spectacular ways. + +@item -mgnu-attribute +@itemx -mno-gnu-attribute +@opindex mgnu-attribute +@opindex mno-gnu-attribute +Emit .gnu_attribute assembly directives to set tag/value pairs in a +.gnu.attributes section that specify ABI variations in function +parameters or return values. + +@item -mprototype +@itemx -mno-prototype +@opindex mprototype +@opindex mno-prototype +On System V.4 and embedded PowerPC systems assume that all calls to +variable argument functions are properly prototyped. Otherwise, the +compiler must insert an instruction before every non-prototyped call to +set or clear bit 6 of the condition code register (@code{CR}) to +indicate whether floating-point values are passed in the floating-point +registers in case the function takes variable arguments. With +@option{-mprototype}, only calls to prototyped variable argument functions +set or clear the bit. + +@item -msim +@opindex msim +On embedded PowerPC systems, assume that the startup module is called +@file{sim-crt0.o} and that the standard C libraries are @file{libsim.a} and +@file{libc.a}. This is the default for @samp{powerpc-*-eabisim} +configurations. + +@item -mmvme +@opindex mmvme +On embedded PowerPC systems, assume that the startup module is called +@file{crt0.o} and the standard C libraries are @file{libmvme.a} and +@file{libc.a}. + +@item -mads +@opindex mads +On embedded PowerPC systems, assume that the startup module is called +@file{crt0.o} and the standard C libraries are @file{libads.a} and +@file{libc.a}. + +@item -myellowknife +@opindex myellowknife +On embedded PowerPC systems, assume that the startup module is called +@file{crt0.o} and the standard C libraries are @file{libyk.a} and +@file{libc.a}. + +@item -mvxworks +@opindex mvxworks +On System V.4 and embedded PowerPC systems, specify that you are +compiling for a VxWorks system. + +@item -memb +@opindex memb +On embedded PowerPC systems, set the @code{PPC_EMB} bit in the ELF flags +header to indicate that @samp{eabi} extended relocations are used. + +@item -meabi +@itemx -mno-eabi +@opindex meabi +@opindex mno-eabi +On System V.4 and embedded PowerPC systems do (do not) adhere to the +Embedded Applications Binary Interface (EABI), which is a set of +modifications to the System V.4 specifications. Selecting @option{-meabi} +means that the stack is aligned to an 8-byte boundary, a function +@code{__eabi} is called from @code{main} to set up the EABI +environment, and the @option{-msdata} option can use both @code{r2} and +@code{r13} to point to two separate small data areas. Selecting +@option{-mno-eabi} means that the stack is aligned to a 16-byte boundary, +no EABI initialization function is called from @code{main}, and the +@option{-msdata} option only uses @code{r13} to point to a single +small data area. The @option{-meabi} option is on by default if you +configured GCC using one of the @samp{powerpc*-*-eabi*} options. + +@item -msdata=eabi +@opindex msdata=eabi +On System V.4 and embedded PowerPC systems, put small initialized +@code{const} global and static data in the @code{.sdata2} section, which +is pointed to by register @code{r2}. Put small initialized +non-@code{const} global and static data in the @code{.sdata} section, +which is pointed to by register @code{r13}. Put small uninitialized +global and static data in the @code{.sbss} section, which is adjacent to +the @code{.sdata} section. The @option{-msdata=eabi} option is +incompatible with the @option{-mrelocatable} option. The +@option{-msdata=eabi} option also sets the @option{-memb} option. + +@item -msdata=sysv +@opindex msdata=sysv +On System V.4 and embedded PowerPC systems, put small global and static +data in the @code{.sdata} section, which is pointed to by register +@code{r13}. Put small uninitialized global and static data in the +@code{.sbss} section, which is adjacent to the @code{.sdata} section. +The @option{-msdata=sysv} option is incompatible with the +@option{-mrelocatable} option. + +@item -msdata=default +@itemx -msdata +@opindex msdata=default +@opindex msdata +On System V.4 and embedded PowerPC systems, if @option{-meabi} is used, +compile code the same as @option{-msdata=eabi}, otherwise compile code the +same as @option{-msdata=sysv}. + +@item -msdata=data +@opindex msdata=data +On System V.4 and embedded PowerPC systems, put small global +data in the @code{.sdata} section. Put small uninitialized global +data in the @code{.sbss} section. Do not use register @code{r13} +to address small data however. This is the default behavior unless +other @option{-msdata} options are used. + +@item -msdata=none +@itemx -mno-sdata +@opindex msdata=none +@opindex mno-sdata +On embedded PowerPC systems, put all initialized global and static data +in the @code{.data} section, and all uninitialized data in the +@code{.bss} section. + +@item -mreadonly-in-sdata +@opindex mreadonly-in-sdata +@opindex mno-readonly-in-sdata +Put read-only objects in the @code{.sdata} section as well. This is the +default. + +@item -mblock-move-inline-limit=@var{num} +@opindex mblock-move-inline-limit +Inline all block moves (such as calls to @code{memcpy} or structure +copies) less than or equal to @var{num} bytes. The minimum value for +@var{num} is 32 bytes on 32-bit targets and 64 bytes on 64-bit +targets. The default value is target-specific. + +@item -mblock-compare-inline-limit=@var{num} +@opindex mblock-compare-inline-limit +Generate non-looping inline code for all block compares (such as calls +to @code{memcmp} or structure compares) less than or equal to @var{num} +bytes. If @var{num} is 0, all inline expansion (non-loop and loop) of +block compare is disabled. The default value is target-specific. + +@item -mblock-compare-inline-loop-limit=@var{num} +@opindex mblock-compare-inline-loop-limit +Generate an inline expansion using loop code for all block compares that +are less than or equal to @var{num} bytes, but greater than the limit +for non-loop inline block compare expansion. If the block length is not +constant, at most @var{num} bytes will be compared before @code{memcmp} +is called to compare the remainder of the block. The default value is +target-specific. + +@item -mstring-compare-inline-limit=@var{num} +@opindex mstring-compare-inline-limit +Compare at most @var{num} string bytes with inline code. +If the difference or end of string is not found at the +end of the inline compare a call to @code{strcmp} or @code{strncmp} will +take care of the rest of the comparison. The default is 64 bytes. + +@item -G @var{num} +@opindex G +@cindex smaller data references (PowerPC) +@cindex .sdata/.sdata2 references (PowerPC) +On embedded PowerPC systems, put global and static items less than or +equal to @var{num} bytes into the small data or BSS sections instead of +the normal data or BSS section. By default, @var{num} is 8. The +@option{-G @var{num}} switch is also passed to the linker. +All modules should be compiled with the same @option{-G @var{num}} value. + +@item -mregnames +@itemx -mno-regnames +@opindex mregnames +@opindex mno-regnames +On System V.4 and embedded PowerPC systems do (do not) emit register +names in the assembly language output using symbolic forms. + +@item -mlongcall +@itemx -mno-longcall +@opindex mlongcall +@opindex mno-longcall +By default assume that all calls are far away so that a longer and more +expensive calling sequence is required. This is required for calls +farther than 32 megabytes (33,554,432 bytes) from the current location. +A short call is generated if the compiler knows +the call cannot be that far away. This setting can be overridden by +the @code{shortcall} function attribute, or by @code{#pragma +longcall(0)}. + +Some linkers are capable of detecting out-of-range calls and generating +glue code on the fly. On these systems, long calls are unnecessary and +generate slower code. As of this writing, the AIX linker can do this, +as can the GNU linker for PowerPC/64. It is planned to add this feature +to the GNU linker for 32-bit PowerPC systems as well. + On Darwin/PPC systems, @code{#pragma longcall} generates @code{jbsr callee, L42}, plus a @dfn{branch island} (glue code). The two target addresses represent the callee and the branch island. The @@ -23416,8 +25347,7 @@ @samp{z196}/@samp{arch9}, @samp{zEC12}, @samp{z13}/@samp{arch11}, and @samp{native}. -The default is @option{-march=z900}. @samp{g5}/@samp{arch3} and -@samp{g6} are deprecated and will be removed with future releases. +The default is @option{-march=z900}. Specifying @samp{native} as cpu type can be used to select the best architecture option for the host processor. @@ -25103,6 +27033,9 @@ produces code optimized for the local machine under the constraints of the selected instruction set. +@item x86-64 +A generic CPU with 64-bit extensions. + @item i386 Original Intel i386 CPU@. @@ -25197,6 +27130,21 @@ Intel Silvermont CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PCLMUL and RDRND instruction set support. +@item goldmont +Intel Goldmont CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, +SSE4.1, SSE4.2, POPCNT, AES, PCLMUL, RDRND, XSAVE, XSAVEOPT and FSGSBASE +instruction set support. + +@item goldmont-plus +Intel Goldmont Plus CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, +SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PCLMUL, RDRND, XSAVE, XSAVEOPT, FSGSBASE, +PTWRITE, RDPID, SGX and UMIP instruction set support. + +@item tremont +Intel Tremont CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, +SSE4.1, SSE4.2, POPCNT, AES, PCLMUL, RDRND, XSAVE, XSAVEOPT, FSGSBASE, PTWRITE, +RDPID, SGX, UMIP, GFNI-SSE, CLWB and ENCLV instruction set support. + @item knl Intel Knight's Landing CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA, @@ -25213,7 +27161,31 @@ Intel Skylake Server CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA, BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC, XSAVES, AVX512F, -AVX512VL, AVX512BW, AVX512DQ and AVX512CD instruction set support. +CLWB, AVX512VL, AVX512BW, AVX512DQ and AVX512CD instruction set support. + +@item cannonlake +Intel Cannonlake Server CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, +SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL, FSGSBASE, +RDRND, FMA, BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC, +XSAVES, AVX512F, AVX512VL, AVX512BW, AVX512DQ, AVX512CD, AVX512VBMI, +AVX512IFMA, SHA and UMIP instruction set support. + +@item icelake-client +Intel Icelake Client CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, +SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL, FSGSBASE, +RDRND, FMA, BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC, +XSAVES, AVX512F, AVX512VL, AVX512BW, AVX512DQ, AVX512CD, AVX512VBMI, +AVX512IFMA, SHA, CLWB, UMIP, RDPID, GFNI, AVX512VBMI2, AVX512VPOPCNTDQ, +AVX512BITALG, AVX512VNNI, VPCLMULQDQ, VAES instruction set support. + +@item icelake-server +Intel Icelake Server CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, +SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL, FSGSBASE, +RDRND, FMA, BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC, +XSAVES, AVX512F, AVX512VL, AVX512BW, AVX512DQ, AVX512CD, AVX512VBMI, +AVX512IFMA, SHA, CLWB, UMIP, RDPID, GFNI, AVX512VBMI2, AVX512VPOPCNTDQ, +AVX512BITALG, AVX512VNNI, VPCLMULQDQ, VAES, PCONFIG and WBNOINVD instruction +set support. @item k6 AMD K6 CPU with MMX instruction set support. @@ -25489,13 +27461,13 @@ comparison is unordered. @item -m80387 -@item -mhard-float +@itemx -mhard-float @opindex 80387 @opindex mhard-float Generate output containing 80387 instructions for floating point. @item -mno-80387 -@item -msoft-float +@itemx -msoft-float @opindex no-80387 @opindex msoft-float Generate output containing library calls for floating point. @@ -25526,8 +27498,8 @@ @opindex mno-fancy-math-387 Some 387 emulators do not support the @code{sin}, @code{cos} and @code{sqrt} instructions for the 387. Specify this option to avoid -generating those instructions. This option is the default on -OpenBSD and NetBSD@. This option is overridden when @option{-march} +generating those instructions. +This option is overridden when @option{-march} indicates that the target CPU always has an FPU and so the instruction does not need emulation. These instructions are not generated unless you also use the @@ -25821,8 +27793,8 @@ @itemx -mpclmul @opindex mpclmul @need 200 -@itemx -mclfushopt -@opindex mclfushopt +@itemx -mclflushopt +@opindex mclflushopt @need 200 @itemx -mfsgsbase @opindex mfsgsbase @@ -25836,6 +27808,12 @@ @itemx -mfma @opindex mfma @need 200 +@itemx -mpconfig +@opindex mpconfig +@need 200 +@itemx -mwbnoinvd +@opindex mwbnoinvd +@need 200 @itemx -mfma4 @opindex mfma4 @need 200 @@ -25889,9 +27867,6 @@ @itemx -mtbm @opindex mtbm @need 200 -@itemx -mmpx -@opindex mmpx -@need 200 @itemx -mmwaitx @opindex mmwaitx @need 200 @@ -25901,15 +27876,44 @@ @itemx -mpku @opindex mpku @need 200 -@itemx -mcet -@opindex mcet +@itemx -mavx512vbmi2 +@opindex mavx512vbmi2 +@need 200 +@itemx -mgfni +@opindex mgfni +@need 200 +@itemx -mvaes +@opindex mvaes +@need 200 +@itemx -mwaitpkg +@opindex -mwaitpkg +@need 200 +@itemx -mvpclmulqdq +@opindex mvpclmulqdq +@need 200 +@itemx -mavx512bitalg +@opindex mavx512bitalg +@need 200 +@itemx -mmovdiri +@opindex mmovdiri +@need 200 +@itemx -mmovdir64b +@opindex mmovdir64b +@need 200 +@itemx -mavx512vpopcntdq +@opindex mavx512vpopcntdq +@need 200 +@itemx -mcldemote +@opindex mcldemote These switches enable the use of instructions in the MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, AVX, AVX2, AVX512F, AVX512PF, AVX512ER, AVX512CD, SHA, AES, PCLMUL, FSGSBASE, RDRND, F16C, FMA, SSE4A, FMA4, XOP, LWP, ABM, -AVX512VL, AVX512BW, AVX512DQ, AVX512IFMA AVX512VBMI, BMI, BMI2, FXSR, -XSAVE, XSAVEOPT, LZCNT, RTM, MPX, MWAITX, PKU, IBT, SHSTK, -3DNow!@: or enhanced 3DNow!@: extended instruction sets. Each has a -corresponding @option{-mno-} option to disable use of these instructions. +AVX512VL, AVX512BW, AVX512DQ, AVX512IFMA, AVX512VBMI, BMI, BMI2, VAES, WAITPKG, +FXSR, XSAVE, XSAVEOPT, LZCNT, RTM, MWAITX, PKU, IBT, SHSTK, AVX512VBMI2, +GFNI, VPCLMULQDQ, AVX512BITALG, MOVDIRI, MOVDIR64B, +AVX512VPOPCNTDQ, CLDEMOTE, 3DNow!@: or enhanced 3DNow!@: extended instruction +sets. Each has a corresponding @option{-mno-} option to disable use of these +instructions. These extensions are also available as built-in functions: see @ref{x86 Built-in Functions}, for details of the functions enabled and @@ -25929,13 +27933,6 @@ the file containing the CPU detection code should be compiled without these options. -The @option{-mcet} option turns on the @option{-mibt} and @option{-mshstk} -options. The @option{-mibt} option enables indirect branch tracking support -and the @option{-mshstk} option enables shadow stack support from -Intel Control-flow Enforcement Technology (CET). The compiler also provides -a number of built-in functions for fine-grained control in a CET-based -application. See @xref{x86 Built-in Functions}, for more information. - @item -mdump-tune-features @opindex mdump-tune-features This option instructs GCC to dump the names of the x86 performance @@ -25983,10 +27980,24 @@ This option instructs GCC to use 128-bit AVX instructions instead of 256-bit AVX instructions in the auto-vectorizer. -@item -mprefer-avx256 -@opindex mprefer-avx256 -This option instructs GCC to use 256-bit AVX instructions instead of -512-bit AVX instructions in the auto-vectorizer. +@item -mprefer-vector-width=@var{opt} +@opindex mprefer-vector-width +This option instructs GCC to use @var{opt}-bit vector width in instructions +instead of default on the selected platform. + +@table @samp +@item none +No extra limitations applied to GCC other than defined by the selected platform. + +@item 128 +Prefer 128-bit vector width for instructions. + +@item 256 +Prefer 256-bit vector width for instructions. + +@item 512 +Prefer 512-bit vector width for instructions. +@end table @item -mcx16 @opindex mcx16 @@ -26014,23 +28025,10 @@ This option enables use of the @code{movbe} instruction to implement @code{__builtin_bswap32} and @code{__builtin_bswap64}. -@item -mibt -@opindex mibt -This option tells the compiler to use indirect branch tracking support -(for indirect calls and jumps) from x86 Control-flow Enforcement -Technology (CET). The option has effect only if the -@option{-fcf-protection=full} or @option{-fcf-protection=branch} option -is specified. The option @option{-mibt} is on by default when the -@code{-mcet} option is specified. - @item -mshstk @opindex mshstk -This option tells the compiler to use shadow stack support (return -address tracking) from x86 Control-flow Enforcement Technology (CET). -The option has effect only if the @option{-fcf-protection=full} or -@option{-fcf-protection=return} option is specified. The option -@option{-mshstk} is on by default when the @option{-mcet} option is -specified. +The @option{-mshstk} option enables shadow stack built-in functions +from x86 Control-flow Enforcement Technology (CET). @item -mcrc32 @opindex mcrc32 @@ -26104,11 +28102,11 @@ ABI-compatible library must be specified at link time. GCC currently emits calls to @code{vmldExp2}, -@code{vmldLn2}, @code{vmldLog102}, @code{vmldLog102}, @code{vmldPow2}, +@code{vmldLn2}, @code{vmldLog102}, @code{vmldPow2}, @code{vmldTanh2}, @code{vmldTan2}, @code{vmldAtan2}, @code{vmldAtanh2}, @code{vmldCbrt2}, @code{vmldSinh2}, @code{vmldSin2}, @code{vmldAsinh2}, @code{vmldAsin2}, @code{vmldCosh2}, @code{vmldCos2}, @code{vmldAcosh2}, -@code{vmldAcos2}, @code{vmlsExp4}, @code{vmlsLn4}, @code{vmlsLog104}, +@code{vmldAcos2}, @code{vmlsExp4}, @code{vmlsLn4}, @code{vmlsLog104}, @code{vmlsPow4}, @code{vmlsTanh4}, @code{vmlsTan4}, @code{vmlsAtan4}, @code{vmlsAtanh4}, @code{vmlsCbrt4}, @code{vmlsSinh4}, @code{vmlsSin4}, @code{vmlsAsinh4}, @code{vmlsAsin4}, @code{vmlsCosh4}, @@ -26130,6 +28128,12 @@ using the function attributes @code{ms_abi} and @code{sysv_abi}. @xref{Function Attributes}. +@item -mforce-indirect-call +@opindex mforce-indirect-call +Force all calls to functions to be indirect. This is useful +when using Intel Processor Trace where it generates more precise timing +information for function calls. + @item -mcall-ms2sysv-xlogues @opindex mcall-ms2sysv-xlogues @opindex mno-call-ms2sysv-xlogues @@ -26461,19 +28465,53 @@ for reading the canary, and from what offset from that base register. The default for those is as specified in the relevant ABI. -@item -mmitigate-rop -@opindex mmitigate-rop -Try to avoid generating code sequences that contain unintended return -opcodes, to mitigate against certain forms of attack. At the moment, -this option is limited in what it can do and should not be relied -on to provide serious protection. - @item -mgeneral-regs-only @opindex mgeneral-regs-only Generate code that uses only the general-purpose registers. This prevents the compiler from using floating-point, vector, mask and bound registers. +@item -mindirect-branch=@var{choice} +@opindex -mindirect-branch +Convert indirect call and jump with @var{choice}. The default is +@samp{keep}, which keeps indirect call and jump unmodified. +@samp{thunk} converts indirect call and jump to call and return thunk. +@samp{thunk-inline} converts indirect call and jump to inlined call +and return thunk. @samp{thunk-extern} converts indirect call and jump +to external call and return thunk provided in a separate object file. +You can control this behavior for a specific function by using the +function attribute @code{indirect_branch}. @xref{Function Attributes}. + +Note that @option{-mcmodel=large} is incompatible with +@option{-mindirect-branch=thunk} and +@option{-mindirect-branch=thunk-extern} since the thunk function may +not be reachable in the large code model. + +Note that @option{-mindirect-branch=thunk-extern} is incompatible with +@option{-fcf-protection=branch} since the external thunk can not be modified +to disable control-flow check. + +@item -mfunction-return=@var{choice} +@opindex -mfunction-return +Convert function return with @var{choice}. The default is @samp{keep}, +which keeps function return unmodified. @samp{thunk} converts function +return to call and return thunk. @samp{thunk-inline} converts function +return to inlined call and return thunk. @samp{thunk-extern} converts +function return to external call and return thunk provided in a separate +object file. You can control this behavior for a specific function by +using the function attribute @code{function_return}. +@xref{Function Attributes}. + +Note that @option{-mcmodel=large} is incompatible with +@option{-mfunction-return=thunk} and +@option{-mfunction-return=thunk-extern} since the thunk function may +not be reachable in the large code model. + + +@item -mindirect-branch-register +@opindex -mindirect-branch-register +Force indirect call and jump via register. + @end table These @samp{-m} switches are supported in addition to the above