Mercurial > hg > CbC > CbC_gcc
diff gcc/config/h8300/h8300.md @ 63:b7f97abdc517 gcc-4.6-20100522
update gcc from gcc-4.5.0 to gcc-4.6
author | ryoma <e075725@ie.u-ryukyu.ac.jp> |
---|---|
date | Mon, 24 May 2010 12:47:05 +0900 |
parents | 77e2b8dfacca |
children | f6334be47118 |
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--- a/gcc/config/h8300/h8300.md Fri Feb 12 23:41:23 2010 +0900 +++ b/gcc/config/h8300/h8300.md Mon May 24 12:47:05 2010 +0900 @@ -1,6 +1,6 @@ ;; GCC machine description for Renesas H8/300 ;; Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, -;; 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 +;; 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010 ;; Free Software Foundation, Inc. ;; Contributed by Steve Chamberlain (sac@cygnus.com), @@ -153,7 +153,7 @@ (define_attr "can_delay" "no,yes" (cond [(eq_attr "type" "branch,bitbranch,call") (const_string "no") - (ne (symbol_ref "get_attr_length (insn)") (const_int 2)) + (geu (symbol_ref "get_attr_length (insn)") (const_int 2)) (const_string "no")] (const_string "yes"))) @@ -222,7 +222,7 @@ (match_operand:QI 1 "general_operand_src" "P4>X,rQi"))] "TARGET_H8300SX" "@ - mov.b %X1,%X0 + mov.b %X1:4,%X0 mov.b %X1,%X0" [(set_attr "length_table" "mov_imm4,movb") (set_attr "cc" "set_znv")]) @@ -300,8 +300,8 @@ "TARGET_H8300SX" "@ sub.w %T0,%T0 - mov.w %T1,%T0 - mov.w %T1,%T0 + mov.w %T1:3,%T0 + mov.w %T1:4,%T0 mov.w %T1,%T0 mov.w %T1,%T0" [(set_attr "length_table" "*,*,mov_imm4,short_immediate,movw") @@ -511,7 +511,7 @@ "TARGET_H8300SX" "@ sub.l %S0,%S0 - mov.l %S1,%S0 + mov.l %S1:3,%S0 mov.l %S1,%S0 mov.l %S1,%S0 clrmac @@ -1143,7 +1143,21 @@ (compare (match_operand:HI 0 "h8300_dst_operand" "rU,rQ") (match_operand:HI 1 "h8300_src_operand" "P3>X,rQi")))] "TARGET_H8300H || TARGET_H8300S" - "cmp.w %T1,%T0" + "* +{ + switch (which_alternative) + { + case 0: + if (!TARGET_H8300SX) + return \"cmp.w %T1,%T0\"; + else + return \"cmp.w %T1:3,%T0\"; + case 1: + return \"cmp.w %T1,%T0\"; + default: + gcc_unreachable (); + } +}" [(set_attr "length_table" "short_immediate,addw") (set_attr "cc" "compare,compare")]) @@ -1152,7 +1166,21 @@ (compare (match_operand:SI 0 "h8300_dst_operand" "r,rQ") (match_operand:SI 1 "h8300_src_operand" "P3>X,rQi")))] "TARGET_H8300H || TARGET_H8300S" - "cmp.l %S1,%S0" + "* +{ + switch (which_alternative) + { + case 0: + if (!TARGET_H8300SX) + return \"cmp.l %S1,%S0\"; + else + return \"cmp.l %S1:3,%S0\"; + case 1: + return \"cmp.l %S1,%S0\"; + default: + gcc_unreachable (); + } +}" [(set_attr "length" "2,*") (set_attr "length_table" "*,addl") (set_attr "cc" "compare,compare")]) @@ -1259,8 +1287,8 @@ (match_operand:HI 2 "h8300_src_operand" "P3>X,P3<X,J,rQi")))] "TARGET_H8300SX && h8300_operands_match_p (operands)" "@ - add.w %T2,%T0 - sub.w %G2,%T0 + add.w %T2:3,%T0 + sub.w %G2:3,%T0 add.b %t2,%t0 add.w %T2,%T0" [(set_attr "length_table" "short_immediate,short_immediate,*,addw") @@ -1734,7 +1762,34 @@ ;; ---------------------------------------------------------------------- ;; AND INSTRUCTIONS ;; ---------------------------------------------------------------------- - +(define_insn "bclrqi_msx" + [(set (match_operand:QI 0 "bit_register_indirect_operand" "=WU") + (and:QI (match_operand:QI 1 "bit_register_indirect_operand" "%0") + (match_operand:QI 2 "single_zero_operand" "Y0")))] + "TARGET_H8300SX" + "bclr\\t%W2,%0" + [(set_attr "length" "8")]) + +(define_split + [(set (match_operand:HI 0 "bit_register_indirect_operand" "=U") + (and:HI (match_operand:HI 1 "bit_register_indirect_operand" "%0") + (match_operand:HI 2 "single_zero_operand" "Y0")))] + "TARGET_H8300SX" + [(set (match_dup 0) + (and:QI (match_dup 1) + (match_dup 2)))] +{ + operands[0] = adjust_address (operands[0], QImode, 1); + operands[1] = adjust_address (operands[1], QImode, 1); +}) + +(define_insn "bclrhi_msx" + [(set (match_operand:HI 0 "bit_register_indirect_operand" "=m") + (and:HI (match_operand:HI 1 "bit_register_indirect_operand" "%0") + (match_operand:HI 2 "single_zero_operand" "Y0")))] + "TARGET_H8300SX" + "bclr\\t%W2,%0" + [(set_attr "length" "8")]) (define_insn "*andqi3_2" [(set (match_operand:QI 0 "bit_operand" "=rQ,r") (and:QI (match_operand:QI 1 "bit_operand" "%0,WU") @@ -1838,6 +1893,34 @@ ;; ---------------------------------------------------------------------- ;; OR INSTRUCTIONS ;; ---------------------------------------------------------------------- +(define_insn "bsetqi_msx" + [(set (match_operand:QI 0 "bit_register_indirect_operand" "=WU") + (ior:QI (match_operand:QI 1 "bit_register_indirect_operand" "%0") + (match_operand:QI 2 "single_one_operand" "Y2")))] + "TARGET_H8300SX" + "bset\\t%V2,%0" + [(set_attr "length" "8")]) + +(define_split + [(set (match_operand:HI 0 "bit_register_indirect_operand" "=U") + (ior:HI (match_operand:HI 1 "bit_register_indirect_operand" "%0") + (match_operand:HI 2 "single_one_operand" "Y2")))] + "TARGET_H8300SX" + [(set (match_dup 0) + (ior:QI (match_dup 1) + (match_dup 2)))] +{ + operands[0] = adjust_address (operands[0], QImode, 1); + operands[1] = adjust_address (operands[1], QImode, 1); +}) + +(define_insn "bsethi_msx" + [(set (match_operand:HI 0 "bit_register_indirect_operand" "=m") + (ior:HI (match_operand:HI 1 "bit_register_indirect_operand" "%0") + (match_operand:HI 2 "single_one_operand" "Y2")))] + "TARGET_H8300SX" + "bset\\t%V2,%0" + [(set_attr "length" "8")]) (define_insn "iorqi3_1" [(set (match_operand:QI 0 "bit_operand" "=rQ,U") @@ -1876,6 +1959,34 @@ ;; ---------------------------------------------------------------------- ;; XOR INSTRUCTIONS ;; ---------------------------------------------------------------------- +(define_insn "bnotqi_msx" + [(set (match_operand:QI 0 "bit_register_indirect_operand" "=WU") + (xor:QI (match_operand:QI 1 "bit_register_indirect_operand" "%0") + (match_operand:QI 2 "single_one_operand" "Y2")))] + "TARGET_H8300SX" + "bnot\\t%V2,%0" + [(set_attr "length" "8")]) + +(define_split + [(set (match_operand:HI 0 "bit_register_indirect_operand" "=U") + (xor:HI (match_operand:HI 1 "bit_register_indirect_operand" "%0") + (match_operand:HI 2 "single_one_operand" "Y2")))] + "TARGET_H8300SX" + [(set (match_dup 0) + (xor:QI (match_dup 1) + (match_dup 2)))] +{ + operands[0] = adjust_address (operands[0], QImode, 1); + operands[1] = adjust_address (operands[1], QImode, 1); +}) + +(define_insn "bnothi_msx" + [(set (match_operand:HI 0 "bit_register_indirect_operand" "=m") + (xor:HI (match_operand:HI 1 "bit_register_indirect_operand" "%0") + (match_operand:HI 2 "single_one_operand" "Y2")))] + "TARGET_H8300SX" + "bnot\\t%V2,%0" + [(set_attr "length" "8")]) (define_insn "xorqi3_1" [(set (match_operand:QI 0 "bit_operand" "=r,U") @@ -3145,7 +3256,7 @@ (match_operand:HI 3 "const_int_operand" "n")) (const_int 1) (match_operand:HI 2 "const_int_operand" "n")))] - "TARGET_H8300 + "(TARGET_H8300 || TARGET_H8300SX) && (1 << INTVAL (operands[2])) == INTVAL (operands[3])" "sub.w %0,%0\;bild %Z2,%Y1\;bst #0,%X0" [(set_attr "length" "8")])