diff gcc/config/ia64/ia64.c @ 63:b7f97abdc517 gcc-4.6-20100522

update gcc from gcc-4.5.0 to gcc-4.6
author ryoma <e075725@ie.u-ryukyu.ac.jp>
date Mon, 24 May 2010 12:47:05 +0900
parents 77e2b8dfacca
children f6334be47118
line wrap: on
line diff
--- a/gcc/config/ia64/ia64.c	Fri Feb 12 23:41:23 2010 +0900
+++ b/gcc/config/ia64/ia64.c	Mon May 24 12:47:05 2010 +0900
@@ -1,6 +1,6 @@
 /* Definitions of target machine for GNU compiler.
    Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
-   2009
+   2009, 2010
    Free Software Foundation, Inc.
    Contributed by James E. Wilson <wilson@cygnus.com> and
 		  David Mosberger <davidm@hpl.hp.com>.
@@ -29,7 +29,6 @@
 #include "tree.h"
 #include "regs.h"
 #include "hard-reg-set.h"
-#include "real.h"
 #include "insn-config.h"
 #include "conditions.h"
 #include "output.h"
@@ -537,6 +536,9 @@
 #undef TARGET_TRAMPOLINE_INIT
 #define TARGET_TRAMPOLINE_INIT ia64_trampoline_init
 
+#undef TARGET_INVALID_WITHIN_DOLOOP
+#define TARGET_INVALID_WITHIN_DOLOOP hook_constcharptr_const_rtx_null
+
 #undef TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE
 #define TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE ia64_override_options_after_change
 
@@ -1733,25 +1735,18 @@
 	  {
 	    rtx t1, t2, mask;
 
-	    /* Perform a parallel modulo subtraction.  */
-	    t1 = gen_reg_rtx (V2SImode);
-	    emit_insn (gen_subv2si3 (t1, op0, op1));
-
-	    /* Extract the original sign bit of op0.  */
-	    mask = GEN_INT (-0x80000000);
+	    /* Subtract (-(INT MAX) - 1) from both operands to make
+	       them signed.  */
+	    mask = GEN_INT (0x80000000);
 	    mask = gen_rtx_CONST_VECTOR (V2SImode, gen_rtvec (2, mask, mask));
-	    mask = force_reg (V2SImode, mask);
-	    t2 = gen_reg_rtx (V2SImode);
-	    emit_insn (gen_andv2si3 (t2, op0, mask));
-
-	    /* XOR it back into the result of the subtraction.  This results
-	       in the sign bit set iff we saw unsigned underflow.  */
-	    x = gen_reg_rtx (V2SImode);
-	    emit_insn (gen_xorv2si3 (x, t1, t2));
-
+	    mask = force_reg (mode, mask);
+	    t1 = gen_reg_rtx (mode);
+	    emit_insn (gen_subv2si3 (t1, op0, mask));
+	    t2 = gen_reg_rtx (mode);
+	    emit_insn (gen_subv2si3 (t2, op1, mask));
+	    op0 = t1;
+	    op1 = t2;
 	    code = GT;
-	    op0 = x;
-	    op1 = CONST0_RTX (mode);
 	  }
 	  break;
 
@@ -7082,8 +7077,6 @@
 ia64_dfa_new_cycle (FILE *dump, int verbose, rtx insn, int last_clock,
 		    int clock, int *sort_p)
 {
-  int setup_clocks_p = FALSE;
-
   gcc_assert (insn && INSN_P (insn));
 
   if (DEBUG_INSN_P (insn))
@@ -7125,8 +7118,6 @@
 	    *sort_p = 0;
 	  return 1;
 	}
-      else if (reload_completed)
-	setup_clocks_p = TRUE;
 
       if (last_scheduled_insn)
 	{
@@ -7142,9 +7133,6 @@
 	    }
 	}
     }
-  else if (reload_completed)
-    setup_clocks_p = TRUE;
-
   return 0;
 }
 
@@ -8899,7 +8887,6 @@
   rtx insn;
   int need_barrier_p = 0;
   int seen_good_insn = 0;
-  rtx prev_insn = NULL_RTX;
 
   init_insn_group_barriers ();
 
@@ -8922,7 +8909,6 @@
 	  init_insn_group_barriers ();
 	  seen_good_insn = 0;
 	  need_barrier_p = 0;
-	  prev_insn = NULL_RTX;
 	}
       else if (NONDEBUG_INSN_P (insn))
 	{
@@ -8931,7 +8917,6 @@
 	      init_insn_group_barriers ();
 	      seen_good_insn = 0;
 	      need_barrier_p = 0;
-	      prev_insn = NULL_RTX;
 	    }
 	  else if (need_barrier_p || group_barrier_needed (insn)
 		   || (mflag_sched_stop_bits_after_every_cycle
@@ -8978,14 +8963,10 @@
 	      if (recog_memoized (insn) >= 0
 		  && important_for_bundling_p (insn))
 		seen_good_insn = 1;
-	      prev_insn = NULL_RTX;
 	    }
 	  else if (recog_memoized (insn) >= 0
 		   && important_for_bundling_p (insn))
-	    {
-	      prev_insn = insn;
-	      seen_good_insn = 1;
-	    }
+	    seen_good_insn = 1;
 	  need_barrier_p = (GET_CODE (insn) == CALL_INSN
 			    || GET_CODE (PATTERN (insn)) == ASM_INPUT
 			    || asm_noperands (PATTERN (insn)) >= 0);