Mercurial > hg > CbC > CbC_gcc
diff gcc/config/sh/sh.md @ 63:b7f97abdc517 gcc-4.6-20100522
update gcc from gcc-4.5.0 to gcc-4.6
author | ryoma <e075725@ie.u-ryukyu.ac.jp> |
---|---|
date | Mon, 24 May 2010 12:47:05 +0900 |
parents | 77e2b8dfacca |
children | f6334be47118 |
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--- a/gcc/config/sh/sh.md Fri Feb 12 23:41:23 2010 +0900 +++ b/gcc/config/sh/sh.md Mon May 24 12:47:05 2010 +0900 @@ -1,6 +1,7 @@ ;;- Machine description for Renesas / SuperH SH. ;; Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, -;; 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. +;; 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 +;; Free Software Foundation, Inc. ;; Contributed by Steve Chamberlain (sac@cygnus.com). ;; Improved by Jim Wilson (wilson@cygnus.com). @@ -4836,6 +4837,21 @@ "TARGET_SH1" "sett") +;; Define additional pop for SH1 and SH2 so it does not get +;; placed in the delay slot. +(define_insn "*movsi_pop" + [(set (match_operand:SI 0 "register_operand" "=r,x,l") + (match_operand:SI 1 "sh_no_delay_pop_operand" ">,>,>"))] + "(TARGET_SH1 || TARGET_SH2E || TARGET_SH2A) + && ! TARGET_SH3" + "@ + mov.l %1,%0 + lds.l %1,%0 + lds.l %1,%0" + [(set_attr "type" "load_si,mem_mac,pload") + (set_attr "length" "2,2,2") + (set_attr "in_delay_slot" "no,no,no")]) + ;; t/r must come after r/r, lest reload will try to reload stuff like ;; (set (subreg:SI (mem:QI (plus:SI (reg:SI SP_REG) (const_int 12)) 0) 0) ;; (made from (set (subreg:SI (reg:QI ###) 0) ) into T. @@ -7034,22 +7050,21 @@ (define_insn_and_split "doloop_end_split" [(set (pc) - (if_then_else (ne:SI (match_operand:SI 0 "arith_reg_dest" "+r") + (if_then_else (ne:SI (match_operand:SI 2 "arith_reg_dest" "0") (const_int 1)) (label_ref (match_operand 1 "" "")) (pc))) - (set (match_dup 0) - (plus (match_dup 0) (const_int -1))) + (set (match_operand:SI 0 "arith_reg_dest" "=r") + (plus (match_dup 2) (const_int -1))) (clobber (reg:SI T_REG))] "TARGET_SH2" "#" "" [(parallel [(set (reg:SI T_REG) - (eq:SI (match_operand:SI 0 "arith_reg_dest" "+r") - (const_int 1))) - (set (match_dup 0) (plus:SI (match_dup 0) (const_int -1)))]) + (eq:SI (match_dup 2) (const_int 1))) + (set (match_dup 0) (plus:SI (match_dup 2) (const_int -1)))]) (set (pc) (if_then_else (eq (reg:SI T_REG) (const_int 0)) - (label_ref (match_operand 1 "" "")) + (label_ref (match_dup 1)) (pc)))] "" [(set_attr "type" "cbranch")]) @@ -8292,8 +8307,9 @@ (define_insn "dect" [(set (reg:SI T_REG) - (eq:SI (match_operand:SI 0 "arith_reg_dest" "+r") (const_int 1))) - (set (match_dup 0) (plus:SI (match_dup 0) (const_int -1)))] + (eq:SI (match_operand:SI 1 "arith_reg_dest" "0") (const_int 1))) + (set (match_operand:SI 0 "arith_reg_dest" "=r") + (plus:SI (match_dup 1) (const_int -1)))] "TARGET_SH2" "dt %0" [(set_attr "type" "arith")])