Mercurial > hg > CbC > CbC_gcc
diff gcc/ira-lives.c @ 63:b7f97abdc517 gcc-4.6-20100522
update gcc from gcc-4.5.0 to gcc-4.6
author | ryoma <e075725@ie.u-ryukyu.ac.jp> |
---|---|
date | Mon, 24 May 2010 12:47:05 +0900 |
parents | 77e2b8dfacca |
children | f6334be47118 |
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--- a/gcc/ira-lives.c Fri Feb 12 23:41:23 2010 +0900 +++ b/gcc/ira-lives.c Mon May 24 12:47:05 2010 +0900 @@ -1,5 +1,5 @@ /* IRA processing allocno lives to build allocno live ranges. - Copyright (C) 2006, 2007, 2008, 2009 + Copyright (C) 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. Contributed by Vladimir Makarov <vmakarov@redhat.com>. @@ -456,7 +456,7 @@ different. (Indeed, if the constraints for the two operands are the same for all alternatives, there's no point marking them as commutative.) */ - if (use < recog_data.n_operands + 1 + if (use < recog_data.n_operands - 1 && recog_data.constraints[use][0] == '%') advance_p = make_pseudo_conflict (recog_data.operand[use + 1], @@ -499,6 +499,8 @@ for (use = 0; use < recog_data.n_operands; use++) { + int alt1; + if (use == def || recog_data.operand_type[use] == OP_OUT) continue; @@ -507,6 +509,22 @@ else use_cl = recog_op_alt[use][alt].cl; + /* If there's any alternative that allows USE to match DEF, do not + record a conflict. If that causes us to create an invalid + instruction due to the earlyclobber, reload must fix it up. */ + for (alt1 = 0; alt1 < recog_data.n_alternatives; alt1++) + if (recog_op_alt[use][alt1].matches == def + || (use < recog_data.n_operands - 1 + && recog_data.constraints[use][0] == '%' + && recog_op_alt[use + 1][alt1].matches == def) + || (use >= 1 + && recog_data.constraints[use - 1][0] == '%' + && recog_op_alt[use - 1][alt1].matches == def)) + break; + + if (alt1 < recog_data.n_alternatives) + continue; + advance_p = check_and_make_def_use_conflict (dreg, def_cl, use, use_cl, advance_p); @@ -787,6 +805,9 @@ ? GENERAL_REGS : REG_CLASS_FROM_CONSTRAINT (c, p)); if (cl != NO_REGS + /* There is no register pressure problem if all of the + regs in this class are fixed. */ + && ira_available_class_regs[cl] != 0 && (ira_available_class_regs[cl] <= ira_reg_class_nregs[cl][mode])) IOR_HARD_REG_SET (*set, reg_class_contents[cl]);