Mercurial > hg > CbC > CbC_gcc
diff gcc/config/avr/avr.md @ 67:f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
author | nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp> |
---|---|
date | Tue, 22 Mar 2011 17:18:12 +0900 |
parents | b7f97abdc517 |
children | 04ced10e8804 |
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--- a/gcc/config/avr/avr.md Tue May 25 18:58:51 2010 +0900 +++ b/gcc/config/avr/avr.md Tue Mar 22 17:18:12 2011 +0900 @@ -1,4 +1,3 @@ -;; -*- Mode: Scheme -*- ;; Machine description for GNU compiler, ;; for ATMEL AVR micro controllers. ;; Copyright (C) 1998, 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, @@ -170,7 +169,7 @@ emit_clobber (gen_rtx_MEM (BLKmode, hard_frame_pointer_rtx)); emit_move_insn (hard_frame_pointer_rtx, r_fp); - emit_stack_restore (SAVE_NONLOCAL, r_sp, NULL_RTX); + emit_stack_restore (SAVE_NONLOCAL, r_sp); emit_use (hard_frame_pointer_rtx); emit_use (stack_pointer_rtx); @@ -2077,12 +2076,13 @@ "reload_completed" [(set (match_dup 2) (match_dup 1)) (set (match_dup 3) (const_int 0))] - "unsigned int low_off = subreg_lowpart_offset (QImode, HImode); - unsigned int high_off = subreg_highpart_offset (QImode, HImode); - - operands[2] = simplify_gen_subreg (QImode, operands[0], HImode, low_off); - operands[3] = simplify_gen_subreg (QImode, operands[0], HImode, high_off); - ") +{ + unsigned int low_off = subreg_lowpart_offset (QImode, HImode); + unsigned int high_off = subreg_highpart_offset (QImode, HImode); + + operands[2] = simplify_gen_subreg (QImode, operands[0], HImode, low_off); + operands[3] = simplify_gen_subreg (QImode, operands[0], HImode, high_off); +}) (define_insn_and_split "zero_extendqisi2" [(set (match_operand:SI 0 "register_operand" "=r") @@ -2092,12 +2092,13 @@ "reload_completed" [(set (match_dup 2) (zero_extend:HI (match_dup 1))) (set (match_dup 3) (const_int 0))] - "unsigned int low_off = subreg_lowpart_offset (HImode, SImode); - unsigned int high_off = subreg_highpart_offset (HImode, SImode); - - operands[2] = simplify_gen_subreg (HImode, operands[0], SImode, low_off); - operands[3] = simplify_gen_subreg (HImode, operands[0], SImode, high_off); - ") +{ + unsigned int low_off = subreg_lowpart_offset (HImode, SImode); + unsigned int high_off = subreg_highpart_offset (HImode, SImode); + + operands[2] = simplify_gen_subreg (HImode, operands[0], SImode, low_off); + operands[3] = simplify_gen_subreg (HImode, operands[0], SImode, high_off); +}) (define_insn_and_split "zero_extendhisi2" [(set (match_operand:SI 0 "register_operand" "=r") @@ -2107,12 +2108,13 @@ "reload_completed" [(set (match_dup 2) (match_dup 1)) (set (match_dup 3) (const_int 0))] - "unsigned int low_off = subreg_lowpart_offset (HImode, SImode); - unsigned int high_off = subreg_highpart_offset (HImode, SImode); - - operands[2] = simplify_gen_subreg (HImode, operands[0], SImode, low_off); - operands[3] = simplify_gen_subreg (HImode, operands[0], SImode, high_off); - ") +{ + unsigned int low_off = subreg_lowpart_offset (HImode, SImode); + unsigned int high_off = subreg_highpart_offset (HImode, SImode); + + operands[2] = simplify_gen_subreg (HImode, operands[0], SImode, low_off); + operands[3] = simplify_gen_subreg (HImode, operands[0], SImode, high_off); +}) (define_insn_and_split "zero_extendqidi2" [(set (match_operand:DI 0 "register_operand" "=r") @@ -2122,12 +2124,13 @@ "reload_completed" [(set (match_dup 2) (zero_extend:SI (match_dup 1))) (set (match_dup 3) (const_int 0))] - "unsigned int low_off = subreg_lowpart_offset (SImode, DImode); - unsigned int high_off = subreg_highpart_offset (SImode, DImode); - - operands[2] = simplify_gen_subreg (SImode, operands[0], DImode, low_off); - operands[3] = simplify_gen_subreg (SImode, operands[0], DImode, high_off); - ") +{ + unsigned int low_off = subreg_lowpart_offset (SImode, DImode); + unsigned int high_off = subreg_highpart_offset (SImode, DImode); + + operands[2] = simplify_gen_subreg (SImode, operands[0], DImode, low_off); + operands[3] = simplify_gen_subreg (SImode, operands[0], DImode, high_off); +}) (define_insn_and_split "zero_extendhidi2" [(set (match_operand:DI 0 "register_operand" "=r") @@ -2137,12 +2140,13 @@ "reload_completed" [(set (match_dup 2) (zero_extend:SI (match_dup 1))) (set (match_dup 3) (const_int 0))] - "unsigned int low_off = subreg_lowpart_offset (SImode, DImode); - unsigned int high_off = subreg_highpart_offset (SImode, DImode); - - operands[2] = simplify_gen_subreg (SImode, operands[0], DImode, low_off); - operands[3] = simplify_gen_subreg (SImode, operands[0], DImode, high_off); - ") +{ + unsigned int low_off = subreg_lowpart_offset (SImode, DImode); + unsigned int high_off = subreg_highpart_offset (SImode, DImode); + + operands[2] = simplify_gen_subreg (SImode, operands[0], DImode, low_off); + operands[3] = simplify_gen_subreg (SImode, operands[0], DImode, high_off); +}) (define_insn_and_split "zero_extendsidi2" [(set (match_operand:DI 0 "register_operand" "=r") @@ -2152,12 +2156,13 @@ "reload_completed" [(set (match_dup 2) (match_dup 1)) (set (match_dup 3) (const_int 0))] - "unsigned int low_off = subreg_lowpart_offset (SImode, DImode); - unsigned int high_off = subreg_highpart_offset (SImode, DImode); - - operands[2] = simplify_gen_subreg (SImode, operands[0], DImode, low_off); - operands[3] = simplify_gen_subreg (SImode, operands[0], DImode, high_off); - ") +{ + unsigned int low_off = subreg_lowpart_offset (SImode, DImode); + unsigned int high_off = subreg_highpart_offset (SImode, DImode); + + operands[2] = simplify_gen_subreg (SImode, operands[0], DImode, low_off); + operands[3] = simplify_gen_subreg (SImode, operands[0], DImode, high_off); +}) ;;<=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=> ;; compare