--- a/gcc/config/spu/spu.h	Tue May 25 18:58:51 2010 +0900
+++ b/gcc/config/spu/spu.h	Tue Mar 22 17:18:12 2011 +0900
@@ -1,4 +1,4 @@
-/* Copyright (C) 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+/* Copyright (C) 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
 
    This file is free software; you can redistribute it and/or modify it under
    the terms of the GNU General Public License as published by the Free
@@ -20,17 +20,10 @@
 
 #define TARGET_VERSION fprintf (stderr, " (spu %s)", __DATE__);
 
-#define OVERRIDE_OPTIONS spu_override_options()
 #define C_COMMON_OVERRIDE_OPTIONS spu_c_common_override_options()
 
-#define OPTIMIZATION_OPTIONS(level,size) \
-	  spu_optimization_options(level,size)
-
 #define INIT_EXPANDERS spu_init_expanders()
 
-extern int target_flags;
-extern const char *spu_fixed_range_string;
-
 /* Which processor to generate code or schedule for.  */
 enum processor_type
 {
@@ -72,9 +65,16 @@
 
 #define UNITS_PER_WORD (BITS_PER_WORD/BITS_PER_UNIT)
 
-/* We never actually change UNITS_PER_WORD, but defining this causes
-   libgcc to use some different sizes of types when compiling. */
-#define MIN_UNITS_PER_WORD 4
+/* When building libgcc, we need to assume 4 words per units even
+   though UNITS_PER_WORD is 16, because the SPU has basically a 32-bit
+   instruction set although register size is 128 bits.  In particular,
+   this causes libgcc to contain __divdi3 instead of __divti3 etc.
+   However, we allow this default to be re-defined on the command
+   line, so that we can use the LIB2_SIDITI_CONV_FUNCS mechanism
+   to get (in addition) TImode versions of some routines.  */
+#ifndef LIBGCC2_UNITS_PER_WORD
+#define LIBGCC2_UNITS_PER_WORD 4
+#endif
 
 #define POINTER_SIZE 32
 
@@ -174,9 +174,6 @@
     1, 1, 1 \
 }
 
-#define CONDITIONAL_REGISTER_USAGE \
-	spu_conditional_register_usage()
-
 
 /* Values in Registers */
 
@@ -232,8 +229,6 @@
 #define INT_REG_OK_FOR_BASE_P(X,STRICT) \
 	((!(STRICT) || REGNO_OK_FOR_BASE_P (REGNO (X))))
 
-#define PREFERRED_RELOAD_CLASS(X,CLASS)  (CLASS)
-
 #define CLASS_MAX_NREGS(CLASS, MODE)	\
 	((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 
@@ -245,6 +240,7 @@
 	 && GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO))
 
 #define REGISTER_TARGET_PRAGMAS() do {					\
+c_register_addr_space ("__ea", ADDR_SPACE_EA);				\
 targetm.resolve_overloaded_builtin = spu_resolve_overloaded_builtin;	\
 }while (0);
 
@@ -333,27 +329,14 @@
 
 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
 
-#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) (0)
-
 
 /* Register Arguments */
 
-#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
-        (spu_function_arg((CUM),(MODE),(TYPE),(NAMED)))
-
 #define CUMULATIVE_ARGS int
 
 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,FNDECL,N_NAMED_ARGS) \
 		((CUM) = 0)
 
-#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)	\
-        ((CUM) += \
-	 (TYPE) && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST ? 1 \
-	 : (MODE) == BLKmode ? ((int_size_in_bytes(TYPE)+15) / 16) \
-         : (MODE) == VOIDmode ? 1 \
-	 : HARD_REGNO_NREGS(CUM,MODE))
-
-
 /* The SPU ABI wants 32/64-bit types at offset 0 in the quad-word on the
    stack.  8/16-bit types should be at offsets 3/2 respectively.  */
 #define FUNCTION_ARG_OFFSET(MODE, TYPE)					\
@@ -423,7 +406,7 @@
 
 #define SLOW_BYTE_ACCESS 0
 
-#define MOVE_RATIO(speed) 32
+#define MOVE_RATIO(speed) ((speed)? 32 : 4)
 
 #define NO_FUNCTION_CSE
 
@@ -447,12 +430,6 @@
 
 #define ASM_APP_OFF ""
 
-#define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
-  do {	fprintf (STREAM, "\t.file\t");			\
-	output_quoted_string (STREAM, NAME);		\
-	fprintf (STREAM, "\n");				\
-  } while (0)
-
 
 /* Uninitialized Data */
 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED)  \
@@ -507,6 +484,8 @@
 
 #define USER_LABEL_PREFIX ""
 
+#define ASM_COMMENT_START "#"
+
 
 /* Dispatch Tables */
 
@@ -523,57 +502,6 @@
   do { if (LOG!=0) fprintf (FILE, "\t.align\t%d\n", (LOG)); } while (0)
 
 
-/* Model costs for the vectorizer.  */
-
-/* Cost of conditional branch.  */
-#ifndef TARG_COND_BRANCH_COST
-#define TARG_COND_BRANCH_COST        6
-#endif
-
-/* Cost of any scalar operation, excluding load and store.  */
-#ifndef TARG_SCALAR_STMT_COST
-#define TARG_SCALAR_STMT_COST        1
-#endif
-
-/* Cost of scalar load. */
-#undef TARG_SCALAR_LOAD_COST
-#define TARG_SCALAR_LOAD_COST        2 /* load + rotate */
-
-/* Cost of scalar store.  */
-#undef TARG_SCALAR_STORE_COST
-#define TARG_SCALAR_STORE_COST       10
-
-/* Cost of any vector operation, excluding load, store,
-   or vector to scalar operation.  */
-#undef TARG_VEC_STMT_COST
-#define TARG_VEC_STMT_COST           1
-
-/* Cost of vector to scalar operation.  */
-#undef TARG_VEC_TO_SCALAR_COST
-#define TARG_VEC_TO_SCALAR_COST      1
-
-/* Cost of scalar to vector operation.  */
-#undef TARG_SCALAR_TO_VEC_COST
-#define TARG_SCALAR_TO_VEC_COST      1
-
-/* Cost of aligned vector load.  */
-#undef TARG_VEC_LOAD_COST
-#define TARG_VEC_LOAD_COST           1
-
-/* Cost of misaligned vector load.  */
-#undef TARG_VEC_UNALIGNED_LOAD_COST
-#define TARG_VEC_UNALIGNED_LOAD_COST 2
-
-/* Cost of vector store.  */
-#undef TARG_VEC_STORE_COST
-#define TARG_VEC_STORE_COST          1
-
-/* Cost of vector permutation.  */
-#ifndef TARG_VEC_PERMUTE_COST
-#define TARG_VEC_PERMUTE_COST        1 
-#endif
-
-
 /* Misc */
 
 #define CASE_VECTOR_MODE SImode
@@ -590,8 +518,6 @@
 
 #define NO_IMPLICIT_EXTERN_C 1
 
-#define HANDLE_PRAGMA_PACK_PUSH_POP 1
-
 /* Canonicalize a comparison from one we don't have to one we do have.  */
 #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \
   do {                                                                    \
@@ -608,9 +534,6 @@
 /* Address spaces.  */
 #define ADDR_SPACE_EA	1
 
-/* Named address space keywords.  */
-#define TARGET_ADDR_SPACE_KEYWORDS ADDR_SPACE_KEYWORD ("__ea", ADDR_SPACE_EA)
-
 
 /* Builtins.  */
 
@@ -625,7 +548,7 @@
   B_INTERNAL
 };
 
-struct GTY(()) spu_builtin_description
+struct spu_builtin_description
 {
   int fcode;
   int icode;
@@ -635,8 +558,6 @@
   /* The first element of parm is always the return type.  The rest
      are a zero terminated list of parameters.  */
   int parm[5];
-
-  tree fndecl;
 };
 
 extern struct spu_builtin_description spu_builtins[];