Mercurial > hg > CbC > CbC_gcc
diff gcc/config/xtensa/xtensa.h @ 67:f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
author | nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp> |
---|---|
date | Tue, 22 Mar 2011 17:18:12 +0900 |
parents | b7f97abdc517 |
children | 04ced10e8804 |
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--- a/gcc/config/xtensa/xtensa.h Tue May 25 18:58:51 2010 +0900 +++ b/gcc/config/xtensa/xtensa.h Tue Mar 22 17:18:12 2011 +0900 @@ -1,5 +1,5 @@ /* Definitions of Tensilica's Xtensa target machine for GNU compiler. - Copyright 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 + Copyright 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica. @@ -22,9 +22,6 @@ /* Get Xtensa configuration settings */ #include "xtensa-config.h" -/* Standard GCC variables that we reference. */ -extern int optimize; - /* External variables defined in xtensa.c. */ extern unsigned xtensa_current_frame_size; @@ -74,20 +71,6 @@ #define HAVE_AS_TLS 0 #endif -#define OVERRIDE_OPTIONS override_options () - -/* Reordering blocks for Xtensa is not a good idea unless the compiler - understands the range of conditional branches. Currently all branch - relaxation for Xtensa is handled in the assembler, so GCC cannot do a - good job of reordering blocks. Do not enable reordering unless it is - explicitly requested. */ -#define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \ - do \ - { \ - flag_reorder_blocks = 0; \ - } \ - while (0) - /* Target CPU builtins. */ #define TARGET_CPU_CPP_BUILTINS() \ @@ -111,16 +94,6 @@ #define EXTRA_SPECS \ { "subtarget_cpp_spec", SUBTARGET_CPP_SPEC }, -#ifdef __XTENSA_EB__ -#define LIBGCC2_WORDS_BIG_ENDIAN 1 -#else -#define LIBGCC2_WORDS_BIG_ENDIAN 0 -#endif - -/* Show we can debug even without a frame pointer. */ -#define CAN_DEBUG_WITHOUT_FP - - /* Target machine storage layout */ /* Define this if most significant bit is lowest numbered @@ -482,12 +455,6 @@ the RTL, as either incoming or outgoing arguments. */ #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true -#define PREFERRED_RELOAD_CLASS(X, CLASS) \ - xtensa_preferred_reload_class (X, CLASS, 0) - -#define PREFERRED_OUTPUT_RELOAD_CLASS(X, CLASS) \ - xtensa_preferred_reload_class (X, CLASS, 1) - /* Return the maximum number of consecutive registers needed to represent mode MODE in a register of class CLASS. */ #define CLASS_UNITS(mode, size) \ @@ -547,9 +514,6 @@ 128-bit datatypes defined in TIE (e.g., for Vectra). */ #define STACK_BOUNDARY 128 -/* Functions do not pop arguments off the stack. */ -#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0 - /* Use a fixed register window size of 8. */ #define WINDOW_SIZE 8 @@ -569,33 +533,6 @@ /* Don't worry about compatibility with PCC. */ #define DEFAULT_PCC_STRUCT_RETURN 0 -/* Define how to find the value returned by a library function - assuming the value has mode MODE. Because we have defined - TARGET_PROMOTE_FUNCTION_MODE to promote everything, we have to - perform the same promotions as PROMOTE_MODE. */ -#define XTENSA_LIBCALL_VALUE(MODE, OUTGOINGP) \ - gen_rtx_REG ((GET_MODE_CLASS (MODE) == MODE_INT \ - && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ - ? SImode : (MODE), \ - OUTGOINGP ? GP_OUTGOING_RETURN : GP_RETURN) - -#define LIBCALL_VALUE(MODE) \ - XTENSA_LIBCALL_VALUE ((MODE), 0) - -#define LIBCALL_OUTGOING_VALUE(MODE) \ - XTENSA_LIBCALL_VALUE ((MODE), 1) - -/* A C expression that is nonzero if REGNO is the number of a hard - register in which the values of called function may come back. A - register whose use for returning values is limited to serving as - the second of a pair (for a value of type 'double', say) need not - be recognized by this macro. If the machine has register windows, - so that the caller and the called function use different registers - for the return value, this macro should recognize only the caller's - register numbers. */ -#define FUNCTION_VALUE_REGNO_P(N) \ - ((N) == GP_RETURN) - /* A C expression that is nonzero if REGNO is the number of a hard register in which function arguments are sometimes passed. This does *not* include implicit arguments such as the static chain and @@ -621,20 +558,6 @@ #define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME) \ init_cumulative_args (&CUM, 1) -/* Update the data in CUM to advance over an argument - of mode MODE and data type TYPE. - (TYPE is null for libcalls where that information may not be available.) */ -#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ - function_arg_advance (&CUM, MODE, TYPE) - -#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ - function_arg (&CUM, MODE, TYPE, FALSE) - -#define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \ - function_arg (&CUM, MODE, TYPE, TRUE) - -#define FUNCTION_ARG_BOUNDARY function_arg_boundary - /* Profiling Xtensa code is typically done with the built-in profiling feature of Tensilica's instruction set simulator, which does not require any compiler support. Profiling code on a real (i.e., @@ -766,20 +689,6 @@ && GET_CODE (X) != LABEL_REF \ && GET_CODE (X) != CONST) -/* Treat constant-pool references as "mode dependent" since they can - only be accessed with SImode loads. This works around a bug in the - combiner where a constant pool reference is temporarily converted - to an HImode load, which is then assumed to zero-extend based on - our definition of LOAD_EXTEND_OP. This is wrong because the high - bits of a 16-bit value in the constant pool are now sign-extended - by default. */ - -#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \ - do { \ - if (constantpool_address_p (ADDR)) \ - goto LABEL; \ - } while (0) - /* Specify the machine mode that this machine uses for the index in the tablejump instruction. */ #define CASE_VECTOR_MODE (SImode) @@ -814,26 +723,6 @@ indexing purposes) so give the MEM rtx a words's mode. */ #define FUNCTION_MODE SImode -/* A C expression for the cost of moving data from a register in - class FROM to one in class TO. The classes are expressed using - the enumeration values such as 'GENERAL_REGS'. A value of 2 is - the default; other values are interpreted relative to that. */ -#define REGISTER_MOVE_COST(MODE, FROM, TO) \ - (((FROM) == (TO) && (FROM) != BR_REGS && (TO) != BR_REGS) \ - ? 2 \ - : (reg_class_subset_p ((FROM), AR_REGS) \ - && reg_class_subset_p ((TO), AR_REGS) \ - ? 2 \ - : (reg_class_subset_p ((FROM), AR_REGS) \ - && (TO) == ACC_REG \ - ? 3 \ - : ((FROM) == ACC_REG \ - && reg_class_subset_p ((TO), AR_REGS) \ - ? 3 \ - : 10)))) - -#define MEMORY_MOVE_COST(MODE, CLASS, IN) 4 - #define BRANCH_COST(speed_p, predictable_p) 3 /* How to refer to registers in assembler output. @@ -860,14 +749,6 @@ #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) -/* Recognize machine-specific patterns that may appear within - constants. Used for PIC-specific UNSPECs. */ -#define OUTPUT_ADDR_CONST_EXTRA(STREAM, X, FAIL) \ - do { \ - if (xtensa_output_addr_const_extra (STREAM, X) == FALSE) \ - goto FAIL; \ - } while (0) - /* Globalizing directive for a label. */ #define GLOBAL_ASM_OP "\t.global\t"