view gcc/testsuite/gcc.target/riscv/shift-shift-4.c @ 152:2b5abeee2509

update gcc11
author anatofuz
date Mon, 25 May 2020 07:50:57 +0900
parents 1830386684a0
children
line wrap: on
line source

/* { dg-do compile } */
/* { dg-options "-march=rv32i -mabi=ilp32 -O2" } */

/* One zero-extend shift can be eliminated by modifying the constant in the
   greater than test.  Started working after modifying the splitter
   lshrsi3_zero_extend_3+1 to use a temporary reg for the first split dest.  */
int
sub (int i)
{
  i &= 0x7fffffff;
  return i > 0x7f800000;
}
/* { dg-final { scan-assembler-not "srli" } } */