Mercurial > hg > CbC > CbC_gcc
view gcc/config/mep/intrinsics.md @ 55:77e2b8dfacca gcc-4.4.5
update it from 4.4.3 to 4.5.0
| author | ryoma <e075725@ie.u-ryukyu.ac.jp> |
|---|---|
| date | Fri, 12 Feb 2010 23:39:51 +0900 |
| parents | |
| children |
line wrap: on
line source
;; DO NOT EDIT: This file is automatically generated by CGEN. ;; Any changes you make will be discarded when it is next regenerated. (define_predicate "cgen_h_sint_12a1_immediate" (and (match_code "const_int") (match_test "(INTVAL (op) & 0) == 0 && INTVAL (op) >= -2048 && INTVAL (op) < 2048"))) (define_predicate "cgen_h_uint_20a1_immediate" (and (match_code "const_int") (match_test "(INTVAL (op) & 0) == 0 && INTVAL (op) >= 0 && INTVAL (op) < 1048576"))) (define_predicate "cgen_h_uint_7a1_immediate" (and (match_code "const_int") (match_test "(INTVAL (op) & 0) == 0 && INTVAL (op) >= 0 && INTVAL (op) < 128"))) (define_predicate "cgen_h_uint_6a2_immediate" (and (match_code "const_int") (match_test "(INTVAL (op) & 1) == 0 && INTVAL (op) >= 0 && INTVAL (op) < 128"))) (define_predicate "cgen_h_uint_22a4_immediate" (and (match_code "const_int") (match_test "(INTVAL (op) & 3) == 0 && INTVAL (op) >= 0 && INTVAL (op) < 33554432"))) (define_predicate "cgen_h_sint_2a1_immediate" (and (match_code "const_int") (match_test "(INTVAL (op) & 0) == 0 && INTVAL (op) >= -2 && INTVAL (op) < 2"))) (define_predicate "cgen_h_uint_24a1_immediate" (and (match_code "const_int") (match_test "(INTVAL (op) & 0) == 0 && INTVAL (op) >= 0 && INTVAL (op) < 16777216"))) (define_predicate "cgen_h_sint_6a1_immediate" (and (match_code "const_int") (match_test "(INTVAL (op) & 0) == 0 && INTVAL (op) >= -32 && INTVAL (op) < 32"))) (define_predicate "cgen_h_uint_5a4_immediate" (and (match_code "const_int") (match_test "(INTVAL (op) & 3) == 0 && INTVAL (op) >= 0 && INTVAL (op) < 256"))) (define_predicate "cgen_h_uint_2a1_immediate" (and (match_code "const_int") (match_test "(INTVAL (op) & 0) == 0 && INTVAL (op) >= 0 && INTVAL (op) < 4"))) (define_predicate "cgen_h_sint_10a1_immediate" (and (match_code "const_int") (match_test "(INTVAL (op) & 0) == 0 && INTVAL (op) >= -512 && INTVAL (op) < 512"))) (define_predicate "cgen_h_uint_4a1_immediate" (and (match_code "const_int") (match_test "(INTVAL (op) & 0) == 0 && INTVAL (op) >= 0 && INTVAL (op) < 16"))) (define_predicate "cgen_h_uint_6a1_immediate" (and (match_code "const_int") (match_test "(INTVAL (op) & 0) == 0 && INTVAL (op) >= 0 && INTVAL (op) < 64"))) (define_predicate "cgen_h_uint_16a1_immediate" (and (match_code "const_int") (match_test "(INTVAL (op) & 0) == 0 && INTVAL (op) >= 0 && INTVAL (op) < 65536"))) (define_predicate "cgen_h_uint_8a1_immediate" (and (match_code "const_int") (match_test "(INTVAL (op) & 0) == 0 && INTVAL (op) >= 0 && INTVAL (op) < 256"))) (define_predicate "cgen_h_sint_16a1_immediate" (and (match_code "const_int") (match_test "(INTVAL (op) & 0) == 0 && INTVAL (op) >= -32768 && INTVAL (op) < 32768"))) (define_predicate "cgen_h_uint_5a1_immediate" (and (match_code "const_int") (match_test "(INTVAL (op) & 0) == 0 && INTVAL (op) >= 0 && INTVAL (op) < 32"))) (define_predicate "cgen_h_sint_8a1_immediate" (and (match_code "const_int") (match_test "(INTVAL (op) & 0) == 0 && INTVAL (op) >= -128 && INTVAL (op) < 128"))) (define_predicate "cgen_h_uint_3a1_immediate" (and (match_code "const_int") (match_test "(INTVAL (op) & 0) == 0 && INTVAL (op) >= 0 && INTVAL (op) < 8"))) (define_insn "cgen_intrinsic_cpsmsbslla1_w_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2198)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2200)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2202)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2204)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2206))] "CGEN_ENABLE_INSN_P (0)" "cpsmsbslla1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmsbslla1_w_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2198)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2200)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2202)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2204)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2206))] "CGEN_ENABLE_INSN_P (1)" "cpsmsbslla1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmsbslua1_w_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2208)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2210)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2212)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2214)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2216))] "CGEN_ENABLE_INSN_P (2)" "cpsmsbslua1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmsbslua1_w_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2208)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2210)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2212)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2214)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2216))] "CGEN_ENABLE_INSN_P (3)" "cpsmsbslua1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmsbslla1_h_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2218)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2220)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2222)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2224)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2226))] "CGEN_ENABLE_INSN_P (4)" "cpsmsbslla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmsbslla1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2218)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2220)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2222)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2224)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2226))] "CGEN_ENABLE_INSN_P (5)" "cpsmsbslla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmsbslua1_h_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2228)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2230)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2232)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2234)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2236))] "CGEN_ENABLE_INSN_P (6)" "cpsmsbslua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmsbslua1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2228)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2230)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2232)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2234)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2236))] "CGEN_ENABLE_INSN_P (7)" "cpsmsbslua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmadslla1_w_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2238)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2240)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2242)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2244)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2246))] "CGEN_ENABLE_INSN_P (8)" "cpsmadslla1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmadslla1_w_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2238)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2240)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2242)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2244)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2246))] "CGEN_ENABLE_INSN_P (9)" "cpsmadslla1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmadslua1_w_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2248)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2250)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2252)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2254)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2256))] "CGEN_ENABLE_INSN_P (10)" "cpsmadslua1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmadslua1_w_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2248)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2250)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2252)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2254)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2256))] "CGEN_ENABLE_INSN_P (11)" "cpsmadslua1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmadslla1_h_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2258)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2260)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2262)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2264)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2266))] "CGEN_ENABLE_INSN_P (12)" "cpsmadslla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmadslla1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2258)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2260)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2262)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2264)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2266))] "CGEN_ENABLE_INSN_P (13)" "cpsmadslla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmadslua1_h_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2268)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2270)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2272)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2274)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2276))] "CGEN_ENABLE_INSN_P (14)" "cpsmadslua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmadslua1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2268)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2270)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2272)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2274)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2276))] "CGEN_ENABLE_INSN_P (15)" "cpsmadslua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmulslla1_w_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2278)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2280)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2282)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2284)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2286))] "CGEN_ENABLE_INSN_P (16)" "cpmulslla1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmulslla1_w_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2278)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2280)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2282)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2284)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2286))] "CGEN_ENABLE_INSN_P (17)" "cpmulslla1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmulslua1_w_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2288)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2290)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2292)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2294)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2296))] "CGEN_ENABLE_INSN_P (18)" "cpmulslua1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmulslua1_w_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2288)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2290)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2292)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2294)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2296))] "CGEN_ENABLE_INSN_P (19)" "cpmulslua1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmulslla1_h_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2298)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2300)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2302)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2304)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2306))] "CGEN_ENABLE_INSN_P (20)" "cpmulslla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmulslla1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2298)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2300)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2302)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2304)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2306))] "CGEN_ENABLE_INSN_P (21)" "cpmulslla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmulslua1_h_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2308)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2310)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2312)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2314)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2316))] "CGEN_ENABLE_INSN_P (22)" "cpmulslua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmulslua1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2308)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2310)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2312)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2314)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2316))] "CGEN_ENABLE_INSN_P (23)" "cpmulslua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmsbla1_w_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2318)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2320)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2322)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2324)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2326))] "CGEN_ENABLE_INSN_P (24)" "cpsmsbla1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmsbla1_w_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2318)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2320)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2322)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2324)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2326))] "CGEN_ENABLE_INSN_P (25)" "cpsmsbla1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmsbua1_w_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2328)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2330)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2332)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2334)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2336))] "CGEN_ENABLE_INSN_P (26)" "cpsmsbua1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmsbua1_w_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2328)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2330)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2332)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2334)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2336))] "CGEN_ENABLE_INSN_P (27)" "cpsmsbua1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmsbla1_h_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2338)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2340)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2342)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2344)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2346))] "CGEN_ENABLE_INSN_P (28)" "cpsmsbla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmsbla1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2338)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2340)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2342)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2344)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2346))] "CGEN_ENABLE_INSN_P (29)" "cpsmsbla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmsbua1_h_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2348)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2350)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2352)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2354)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2356))] "CGEN_ENABLE_INSN_P (30)" "cpsmsbua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmsbua1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2348)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2350)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2352)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2354)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2356))] "CGEN_ENABLE_INSN_P (31)" "cpsmsbua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmadla1_w_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2358)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2360)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2362)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2364)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2366))] "CGEN_ENABLE_INSN_P (32)" "cpsmadla1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmadla1_w_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2358)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2360)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2362)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2364)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2366))] "CGEN_ENABLE_INSN_P (33)" "cpsmadla1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmadua1_w_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2368)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2370)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2372)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2374)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2376))] "CGEN_ENABLE_INSN_P (34)" "cpsmadua1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmadua1_w_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2368)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2370)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2372)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2374)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2376))] "CGEN_ENABLE_INSN_P (35)" "cpsmadua1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmadla1_h_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2378)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2380)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2382)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2384)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2386))] "CGEN_ENABLE_INSN_P (36)" "cpsmadla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmadla1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2378)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2380)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2382)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2384)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2386))] "CGEN_ENABLE_INSN_P (37)" "cpsmadla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmadua1_h_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2388)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2390)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2392)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2394)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2396))] "CGEN_ENABLE_INSN_P (38)" "cpsmadua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsmadua1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2388)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2390)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2392)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2394)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2396))] "CGEN_ENABLE_INSN_P (39)" "cpsmadua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmsbla1_w_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2398)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2400)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2402)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2404)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2406))] "CGEN_ENABLE_INSN_P (40)" "cpmsbla1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmsbla1_w_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2398)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2400)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2402)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2404)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2406))] "CGEN_ENABLE_INSN_P (41)" "cpmsbla1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmsbua1_w_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2408)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2410)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2412)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2414)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2416))] "CGEN_ENABLE_INSN_P (42)" "cpmsbua1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmsbua1_w_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2408)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2410)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2412)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2414)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2416))] "CGEN_ENABLE_INSN_P (43)" "cpmsbua1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmsbla1u_w_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2418)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2420)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2422)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2424)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2426))] "CGEN_ENABLE_INSN_P (44)" "cpmsbla1u.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmsbla1u_w_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2418)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2420)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2422)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2424)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2426))] "CGEN_ENABLE_INSN_P (45)" "cpmsbla1u.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmsbua1u_w_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2428)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2430)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2432)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2434)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2436))] "CGEN_ENABLE_INSN_P (46)" "cpmsbua1u.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmsbua1u_w_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2428)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2430)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2432)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2434)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2436))] "CGEN_ENABLE_INSN_P (47)" "cpmsbua1u.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmsbla1_h_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2438)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2440)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2442)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2444)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2446))] "CGEN_ENABLE_INSN_P (48)" "cpmsbla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmsbla1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2438)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2440)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2442)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2444)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2446))] "CGEN_ENABLE_INSN_P (49)" "cpmsbla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmsbua1_h_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2448)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2450)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2452)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2454)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2456))] "CGEN_ENABLE_INSN_P (50)" "cpmsbua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmsbua1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2448)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2450)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2452)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2454)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2456))] "CGEN_ENABLE_INSN_P (51)" "cpmsbua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmadla1_w_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2458)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2460)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2462)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2464)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2466))] "CGEN_ENABLE_INSN_P (52)" "cpmadla1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmadla1_w_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2458)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2460)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2462)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2464)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2466))] "CGEN_ENABLE_INSN_P (53)" "cpmadla1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmadua1_w_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2468)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2470)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2472)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2474)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2476))] "CGEN_ENABLE_INSN_P (54)" "cpmadua1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmadua1_w_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2468)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2470)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2472)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2474)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2476))] "CGEN_ENABLE_INSN_P (55)" "cpmadua1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmadla1u_w_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2478)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2480)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2482)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2484)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2486))] "CGEN_ENABLE_INSN_P (56)" "cpmadla1u.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmadla1u_w_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2478)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2480)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2482)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2484)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2486))] "CGEN_ENABLE_INSN_P (57)" "cpmadla1u.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmadua1u_w_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2488)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2490)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2492)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2494)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2496))] "CGEN_ENABLE_INSN_P (58)" "cpmadua1u.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmadua1u_w_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2488)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2490)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2492)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2494)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2496))] "CGEN_ENABLE_INSN_P (59)" "cpmadua1u.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmadla1_h_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2498)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2500)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2502)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2504)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2506))] "CGEN_ENABLE_INSN_P (60)" "cpmadla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmadla1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2498)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2500)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2502)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2504)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2506))] "CGEN_ENABLE_INSN_P (61)" "cpmadla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmadua1_h_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2508)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2510)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2512)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2514)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2516))] "CGEN_ENABLE_INSN_P (62)" "cpmadua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmadua1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2508)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2510)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2512)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2514)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2516))] "CGEN_ENABLE_INSN_P (63)" "cpmadua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmada1_b_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2518)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2520)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2522)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2524)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2526)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2528)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2530)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2532)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2534))] "CGEN_ENABLE_INSN_P (64)" "cpmada1.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmada1_b_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2518)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2520)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2522)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2524)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2526)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2528)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2530)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2532)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2534))] "CGEN_ENABLE_INSN_P (65)" "cpmada1.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmada1u_b_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2536)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2538)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2540)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2542)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2544)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2546)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2548)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2550)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2552))] "CGEN_ENABLE_INSN_P (66)" "cpmada1u.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmada1u_b_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2536)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2538)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2540)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2542)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2544)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2546)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2548)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2550)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2552))] "CGEN_ENABLE_INSN_P (67)" "cpmada1u.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmulla1_w_C3" [(set (reg:SI 107) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2554)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2556)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2558)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2560))] "CGEN_ENABLE_INSN_P (68)" "cpmulla1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmulla1_w_P1" [(set (reg:SI 107) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2554)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2556)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2558)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2560))] "CGEN_ENABLE_INSN_P (69)" "cpmulla1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmulua1_w_C3" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2562)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2564)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2566)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2568))] "CGEN_ENABLE_INSN_P (70)" "cpmulua1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmulua1_w_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2562)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2564)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2566)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2568))] "CGEN_ENABLE_INSN_P (71)" "cpmulua1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmulla1u_w_C3" [(set (reg:SI 107) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2570)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2572)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2574)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2576))] "CGEN_ENABLE_INSN_P (72)" "cpmulla1u.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmulla1u_w_P1" [(set (reg:SI 107) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2570)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2572)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2574)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2576))] "CGEN_ENABLE_INSN_P (73)" "cpmulla1u.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmulua1u_w_C3" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2578)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2580)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2582)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2584))] "CGEN_ENABLE_INSN_P (74)" "cpmulua1u.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmulua1u_w_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2578)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2580)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2582)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2584))] "CGEN_ENABLE_INSN_P (75)" "cpmulua1u.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmulla1_h_C3" [(set (reg:SI 107) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2586)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2588)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2590)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2592))] "CGEN_ENABLE_INSN_P (76)" "cpmulla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmulla1_h_P1" [(set (reg:SI 107) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2586)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2588)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2590)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2592))] "CGEN_ENABLE_INSN_P (77)" "cpmulla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmulua1_h_C3" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2594)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2596)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2598)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2600))] "CGEN_ENABLE_INSN_P (78)" "cpmulua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmulua1_h_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2594)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2596)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2598)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2600))] "CGEN_ENABLE_INSN_P (79)" "cpmulua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmula1_b_C3" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2602)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2604)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2606)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2608)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2610)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2612)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2614)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2616))] "CGEN_ENABLE_INSN_P (80)" "cpmula1.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmula1_b_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2602)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2604)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2606)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2608)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2610)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2612)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2614)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2616))] "CGEN_ENABLE_INSN_P (81)" "cpmula1.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmula1u_b_C3" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2618)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2620)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2622)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2624)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2626)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2628)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2630)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2632))] "CGEN_ENABLE_INSN_P (82)" "cpmula1u.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmula1u_b_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2618)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2620)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2622)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2624)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2626)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2628)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2630)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2632))] "CGEN_ENABLE_INSN_P (83)" "cpmula1u.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssda1_b_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2634)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2636)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2638)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2640)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2642)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2644)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2646)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2648)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2650))] "CGEN_ENABLE_INSN_P (84)" "cpssda1.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssda1_b_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2634)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2636)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2638)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2640)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2642)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2644)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2646)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2648))] "CGEN_ENABLE_INSN_P (85)" "cpssda1.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssda1u_b_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2650)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2652)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2654)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2656)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2658)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2660)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2662)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2664)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2666))] "CGEN_ENABLE_INSN_P (86)" "cpssda1u.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssda1u_b_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2650)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2652)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2654)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2656)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2658)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2660)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2662)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2664))] "CGEN_ENABLE_INSN_P (87)" "cpssda1u.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssqa1_b_C3" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2666)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2668)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2670)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2672)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2674)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2676)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2678)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2680))] "CGEN_ENABLE_INSN_P (88)" "cpssqa1.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssqa1_b_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2666)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2668)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2670)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2672)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2674)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2676)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2678)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2680))] "CGEN_ENABLE_INSN_P (89)" "cpssqa1.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssqa1u_b_C3" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2682)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2684)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2686)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2688)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2690)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2692)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2694)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2696))] "CGEN_ENABLE_INSN_P (90)" "cpssqa1u.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssqa1u_b_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2682)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2684)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2686)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2688)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2690)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2692)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2694)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2696))] "CGEN_ENABLE_INSN_P (91)" "cpssqa1u.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmadila1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_uint_3a1_immediate" "") (match_operand:SI 3 "cgen_h_sint_8a1_immediate" "") ] 1000)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1002)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1004)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1006)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1008))] "CGEN_ENABLE_INSN_P (92)" "cpfmadila1.h\\t%0,%1,%2,%3" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmadiua1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_uint_3a1_immediate" "") (match_operand:SI 3 "cgen_h_sint_8a1_immediate" "") ] 1010)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1012)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1014)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1016)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1018))] "CGEN_ENABLE_INSN_P (93)" "cpfmadiua1.h\\t%0,%1,%2,%3" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmadia1_b_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_uint_3a1_immediate" "") (match_operand:SI 3 "cgen_h_sint_8a1_immediate" "") ] 1020)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1022)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1024)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1026)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1028)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1030)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1032)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1034)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1036))] "CGEN_ENABLE_INSN_P (94)" "cpfmadia1.b\\t%0,%1,%2,%3" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmadia1u_b_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_uint_3a1_immediate" "") (match_operand:SI 3 "cgen_h_sint_8a1_immediate" "") ] 1038)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1040)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1042)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1044)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1046)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1048)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1050)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1052)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1054))] "CGEN_ENABLE_INSN_P (95)" "cpfmadia1u.b\\t%0,%1,%2,%3" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmulila1_h_P1" [(set (reg:SI 107) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_uint_3a1_immediate" "") (match_operand:SI 3 "cgen_h_sint_8a1_immediate" "") ] 1056)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1058)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1060)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1062))] "CGEN_ENABLE_INSN_P (96)" "cpfmulila1.h\\t%0,%1,%2,%3" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmuliua1_h_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_uint_3a1_immediate" "") (match_operand:SI 3 "cgen_h_sint_8a1_immediate" "") ] 1064)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1066)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1068)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1070))] "CGEN_ENABLE_INSN_P (97)" "cpfmuliua1.h\\t%0,%1,%2,%3" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmulia1_b_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_uint_3a1_immediate" "") (match_operand:SI 3 "cgen_h_sint_8a1_immediate" "") ] 1072)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1074)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1076)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1078)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1080)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1082)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1084)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1086))] "CGEN_ENABLE_INSN_P (98)" "cpfmulia1.b\\t%0,%1,%2,%3" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmulia1u_b_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_uint_3a1_immediate" "") (match_operand:SI 3 "cgen_h_sint_8a1_immediate" "") ] 1088)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1090)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1092)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1094)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1096)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1098)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1100)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1102))] "CGEN_ENABLE_INSN_P (99)" "cpfmulia1u.b\\t%0,%1,%2,%3" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpamadila1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1104)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1106)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1108)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1110)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1112))] "CGEN_ENABLE_INSN_P (100)" "cpamadila1.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpamadiua1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1114)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1116)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1118)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1120)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1122))] "CGEN_ENABLE_INSN_P (101)" "cpamadiua1.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpamadia1_b_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1124)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1126)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1128)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1130)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1132)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1134)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1136)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1138)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1140))] "CGEN_ENABLE_INSN_P (102)" "cpamadia1.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpamadia1u_b_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1142)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1144)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1146)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1148)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1150)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1152)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1154)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1156)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1158))] "CGEN_ENABLE_INSN_P (103)" "cpamadia1u.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpamulila1_h_P1" [(set (reg:SI 107) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1160)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1162)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1164)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1166))] "CGEN_ENABLE_INSN_P (104)" "cpamulila1.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpamuliua1_h_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1168)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1170)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1172)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1174))] "CGEN_ENABLE_INSN_P (105)" "cpamuliua1.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpamulia1_b_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1176)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1178)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1180)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1182)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1184)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1186)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1188)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1190))] "CGEN_ENABLE_INSN_P (106)" "cpamulia1.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpamulia1u_b_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1192)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1194)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1196)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1198)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1200)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1202)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1204)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1206))] "CGEN_ENABLE_INSN_P (107)" "cpamulia1u.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmadila1s1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1208)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1210)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1212)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1214)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1216))] "CGEN_ENABLE_INSN_P (108)" "cpfmadila1s1.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmadiua1s1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1218)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1220)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1222)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1224)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1226))] "CGEN_ENABLE_INSN_P (109)" "cpfmadiua1s1.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmadia1s1_b_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1228)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1230)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1232)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1234)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1236)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1238)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1240)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1242)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1244))] "CGEN_ENABLE_INSN_P (110)" "cpfmadia1s1.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmadia1s1u_b_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1246)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1248)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1250)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1252)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1254)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1256)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1258)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1260)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1262))] "CGEN_ENABLE_INSN_P (111)" "cpfmadia1s1u.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmulila1s1_h_P1" [(set (reg:SI 107) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1264)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1266)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1268)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1270))] "CGEN_ENABLE_INSN_P (112)" "cpfmulila1s1.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmuliua1s1_h_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1272)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1274)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1276)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1278))] "CGEN_ENABLE_INSN_P (113)" "cpfmuliua1s1.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmulia1s1_b_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1280)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1282)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1284)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1286)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1288)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1290)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1292)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1294))] "CGEN_ENABLE_INSN_P (114)" "cpfmulia1s1.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmulia1s1u_b_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1296)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1298)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1300)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1302)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1304)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1306)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1308)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1310))] "CGEN_ENABLE_INSN_P (115)" "cpfmulia1s1u.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmadila1s0_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1312)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1314)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1316)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1318)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1320))] "CGEN_ENABLE_INSN_P (116)" "cpfmadila1s0.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmadiua1s0_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1322)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1324)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1326)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1328)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1330))] "CGEN_ENABLE_INSN_P (117)" "cpfmadiua1s0.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmadia1s0_b_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1332)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1334)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1336)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1338)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1340)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1342)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1344)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1346)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1348))] "CGEN_ENABLE_INSN_P (118)" "cpfmadia1s0.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmadia1s0u_b_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1350)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1352)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1354)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1356)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1358)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1360)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1362)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1364)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1366))] "CGEN_ENABLE_INSN_P (119)" "cpfmadia1s0u.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmulila1s0_h_P1" [(set (reg:SI 107) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1368)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1370)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1372)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1374))] "CGEN_ENABLE_INSN_P (120)" "cpfmulila1s0.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmuliua1s0_h_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1376)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1378)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1380)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1382))] "CGEN_ENABLE_INSN_P (121)" "cpfmuliua1s0.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmulia1s0_b_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1384)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1386)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1388)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1390)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1392)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1394)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1396)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1398))] "CGEN_ENABLE_INSN_P (122)" "cpfmulia1s0.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfmulia1s0u_b_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1400)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1402)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1404)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1406)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1408)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1410)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1412)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1414))] "CGEN_ENABLE_INSN_P (123)" "cpfmulia1s0u.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsllia1_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:SI 0 "cgen_h_uint_5a1_immediate" "") ] 2698)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) ] 2700)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) ] 2702)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) ] 2704)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) ] 2706)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) ] 2708)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) ] 2710)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) ] 2712))] "CGEN_ENABLE_INSN_P (124)" "cpsllia1\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsllia1_1_p1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:SI 0 "cgen_h_uint_5a1_immediate" "") ] 2698)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) ] 2700)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) ] 2702)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) ] 2704)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) ] 2706)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) ] 2708)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) ] 2710)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) ] 2712))] "CGEN_ENABLE_INSN_P (125)" "cpsllia1\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsraia1_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:SI 0 "cgen_h_uint_5a1_immediate" "") ] 2714)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) ] 2716)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) ] 2718)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) ] 2720)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) ] 2722)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) ] 2724)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) ] 2726)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) ] 2728))] "CGEN_ENABLE_INSN_P (126)" "cpsraia1\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsraia1_1_p1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:SI 0 "cgen_h_uint_5a1_immediate" "") ] 2714)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) ] 2716)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) ] 2718)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) ] 2720)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) ] 2722)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) ] 2724)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) ] 2726)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) ] 2728))] "CGEN_ENABLE_INSN_P (127)" "cpsraia1\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsrlia1_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:SI 0 "cgen_h_uint_5a1_immediate" "") ] 2730)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) ] 2732)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) ] 2734)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) ] 2736)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) ] 2738)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) ] 2740)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) ] 2742)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) ] 2744))] "CGEN_ENABLE_INSN_P (128)" "cpsrlia1\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsrlia1_1_p1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:SI 0 "cgen_h_uint_5a1_immediate" "") ] 2730)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) ] 2732)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) ] 2734)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) ] 2736)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) ] 2738)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) ] 2740)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) ] 2742)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) ] 2744))] "CGEN_ENABLE_INSN_P (129)" "cpsrlia1\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpslla1_C3" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") ] 2746)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) ] 2748)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) ] 2750)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) ] 2752)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) ] 2754)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) ] 2756)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) ] 2758)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) ] 2760))] "CGEN_ENABLE_INSN_P (130)" "cpslla1\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpslla1_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") ] 2746)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) ] 2748)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) ] 2750)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) ] 2752)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) ] 2754)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) ] 2756)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) ] 2758)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) ] 2760))] "CGEN_ENABLE_INSN_P (131)" "cpslla1\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsraa1_C3" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") ] 2762)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) ] 2764)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) ] 2766)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) ] 2768)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) ] 2770)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) ] 2772)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) ] 2774)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) ] 2776))] "CGEN_ENABLE_INSN_P (132)" "cpsraa1\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsraa1_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") ] 2762)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) ] 2764)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) ] 2766)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) ] 2768)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) ] 2770)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) ] 2772)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) ] 2774)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) ] 2776))] "CGEN_ENABLE_INSN_P (133)" "cpsraa1\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsrla1_C3" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") ] 2778)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) ] 2780)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) ] 2782)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) ] 2784)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) ] 2786)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) ] 2788)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) ] 2790)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) ] 2792))] "CGEN_ENABLE_INSN_P (134)" "cpsrla1\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsrla1_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") ] 2778)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) ] 2780)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) ] 2782)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) ] 2784)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) ] 2786)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) ] 2788)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) ] 2790)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) ] 2792))] "CGEN_ENABLE_INSN_P (135)" "cpsrla1\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacswp_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (const_int 0) ] 1416)) (set (reg:SI 110) (unspec_volatile:SI [ (const_int 0) ] 1418)) (set (reg:SI 109) (unspec_volatile:SI [ (const_int 0) ] 1420)) (set (reg:SI 108) (unspec_volatile:SI [ (const_int 0) ] 1422)) (set (reg:SI 107) (unspec_volatile:SI [ (const_int 0) ] 1424)) (set (reg:SI 106) (unspec_volatile:SI [ (const_int 0) ] 1426)) (set (reg:SI 105) (unspec_volatile:SI [ (const_int 0) ] 1428)) (set (reg:SI 104) (unspec_volatile:SI [ (const_int 0) ] 1430)) (set (reg:SI 103) (unspec_volatile:SI [ (const_int 0) ] 1432)) (set (reg:SI 102) (unspec_volatile:SI [ (const_int 0) ] 1434)) (set (reg:SI 101) (unspec_volatile:SI [ (const_int 0) ] 1436)) (set (reg:SI 100) (unspec_volatile:SI [ (const_int 0) ] 1438)) (set (reg:SI 99) (unspec_volatile:SI [ (const_int 0) ] 1440)) (set (reg:SI 98) (unspec_volatile:SI [ (const_int 0) ] 1442)) (set (reg:SI 97) (unspec_volatile:SI [ (const_int 0) ] 1444)) (set (reg:SI 96) (unspec_volatile:SI [ (const_int 0) ] 1446))] "CGEN_ENABLE_INSN_P (136)" "cpacswp" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaccpa1_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (const_int 0) ] 1448)) (set (reg:SI 110) (unspec_volatile:SI [ (const_int 0) ] 1450)) (set (reg:SI 109) (unspec_volatile:SI [ (const_int 0) ] 1452)) (set (reg:SI 108) (unspec_volatile:SI [ (const_int 0) ] 1454)) (set (reg:SI 107) (unspec_volatile:SI [ (const_int 0) ] 1456)) (set (reg:SI 106) (unspec_volatile:SI [ (const_int 0) ] 1458)) (set (reg:SI 105) (unspec_volatile:SI [ (const_int 0) ] 1460)) (set (reg:SI 104) (unspec_volatile:SI [ (const_int 0) ] 1462))] "CGEN_ENABLE_INSN_P (137)" "cpaccpa1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacsuma1_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (const_int 0) ] 1464)) (set (reg:SI 111) (unspec_volatile:SI [ (const_int 0) ] 1466)) (set (reg:SI 110) (unspec_volatile:SI [ (const_int 0) ] 1468)) (set (reg:SI 109) (unspec_volatile:SI [ (const_int 0) ] 1470)) (set (reg:SI 108) (unspec_volatile:SI [ (const_int 0) ] 1472)) (set (reg:SI 107) (unspec_volatile:SI [ (const_int 0) ] 1474)) (set (reg:SI 106) (unspec_volatile:SI [ (const_int 0) ] 1476)) (set (reg:SI 105) (unspec_volatile:SI [ (const_int 0) ] 1478)) (set (reg:SI 104) (unspec_volatile:SI [ (const_int 0) ] 1480))] "CGEN_ENABLE_INSN_P (138)" "cpacsuma1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmovhla1_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2794))] "CGEN_ENABLE_INSN_P (139)" "cpmovhla1.w\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmovhla1_w_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2794))] "CGEN_ENABLE_INSN_P (140)" "cpmovhla1.w\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmovhua1_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2796))] "CGEN_ENABLE_INSN_P (141)" "cpmovhua1.w\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmovhua1_w_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2796))] "CGEN_ENABLE_INSN_P (142)" "cpmovhua1.w\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cppackla1_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2798))] "CGEN_ENABLE_INSN_P (143)" "cppackla1.w\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cppackla1_w_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2798))] "CGEN_ENABLE_INSN_P (144)" "cppackla1.w\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cppackua1_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2800))] "CGEN_ENABLE_INSN_P (145)" "cppackua1.w\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cppackua1_w_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2800))] "CGEN_ENABLE_INSN_P (146)" "cppackua1.w\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cppackla1_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2802))] "CGEN_ENABLE_INSN_P (147)" "cppackla1.h\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cppackla1_h_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2802))] "CGEN_ENABLE_INSN_P (148)" "cppackla1.h\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cppackua1_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2804))] "CGEN_ENABLE_INSN_P (149)" "cppackua1.h\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cppackua1_h_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2804))] "CGEN_ENABLE_INSN_P (150)" "cppackua1.h\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cppacka1_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2806))] "CGEN_ENABLE_INSN_P (151)" "cppacka1.b\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cppacka1_b_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2806))] "CGEN_ENABLE_INSN_P (152)" "cppacka1.b\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cppacka1u_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2808))] "CGEN_ENABLE_INSN_P (153)" "cppacka1u.b\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cppacka1u_b_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2808))] "CGEN_ENABLE_INSN_P (154)" "cppacka1u.b\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmovlla1_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2810))] "CGEN_ENABLE_INSN_P (155)" "cpmovlla1.w\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmovlla1_w_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2810))] "CGEN_ENABLE_INSN_P (156)" "cpmovlla1.w\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmovlua1_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2812))] "CGEN_ENABLE_INSN_P (157)" "cpmovlua1.w\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmovlua1_w_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2812))] "CGEN_ENABLE_INSN_P (158)" "cpmovlua1.w\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmovula1_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2814))] "CGEN_ENABLE_INSN_P (159)" "cpmovula1.w\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmovula1_w_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2814))] "CGEN_ENABLE_INSN_P (160)" "cpmovula1.w\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmovuua1_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2816))] "CGEN_ENABLE_INSN_P (161)" "cpmovuua1.w\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmovuua1_w_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2816))] "CGEN_ENABLE_INSN_P (162)" "cpmovuua1.w\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmovla1_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2818))] "CGEN_ENABLE_INSN_P (163)" "cpmovla1.h\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmovla1_h_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2818))] "CGEN_ENABLE_INSN_P (164)" "cpmovla1.h\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmovua1_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2820))] "CGEN_ENABLE_INSN_P (165)" "cpmovua1.h\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmovua1_h_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2820))] "CGEN_ENABLE_INSN_P (166)" "cpmovua1.h\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmova1_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2822))] "CGEN_ENABLE_INSN_P (167)" "cpmova1.b\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmova1_b_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (const_int 0) ] 2822))] "CGEN_ENABLE_INSN_P (168)" "cpmova1.b\\t%0" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsetla1_w_C3" [(set (reg:SI 107) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2824)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2826)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2828)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2830))] "CGEN_ENABLE_INSN_P (169)" "cpsetla1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsetla1_w_P1" [(set (reg:SI 107) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2824)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2826)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2828)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2830))] "CGEN_ENABLE_INSN_P (170)" "cpsetla1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsetua1_w_C3" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2832)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2834)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2836)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2838))] "CGEN_ENABLE_INSN_P (171)" "cpsetua1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsetua1_w_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2832)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2834)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2836)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2838))] "CGEN_ENABLE_INSN_P (172)" "cpsetua1.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpseta1_h_C3" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2840)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2842)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2844)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2846)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2848)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2850)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2852)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2854))] "CGEN_ENABLE_INSN_P (173)" "cpseta1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpseta1_h_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2840)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2842)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2844)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2846)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2848)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2850)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2852)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2854))] "CGEN_ENABLE_INSN_P (174)" "cpseta1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsadla1_h_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2856)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2858)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2860)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2862)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2864))] "CGEN_ENABLE_INSN_P (175)" "cpsadla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsadla1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2856)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2858)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2860)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2862)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2864))] "CGEN_ENABLE_INSN_P (176)" "cpsadla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsadua1_h_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2866)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2868)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2870)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2872)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2874))] "CGEN_ENABLE_INSN_P (177)" "cpsadua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsadua1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2866)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2868)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2870)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2872)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2874))] "CGEN_ENABLE_INSN_P (178)" "cpsadua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsada1_b_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2876)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2878)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2880)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2882)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2884)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2886)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2888)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2890)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2892))] "CGEN_ENABLE_INSN_P (179)" "cpsada1.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsada1_b_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2876)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2878)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2880)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2882)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2884)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2886)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2888)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2890)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2892))] "CGEN_ENABLE_INSN_P (180)" "cpsada1.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsada1u_b_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2894)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2896)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2898)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2900)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2902)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2904)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2906)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2908)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2910))] "CGEN_ENABLE_INSN_P (181)" "cpsada1u.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsada1u_b_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2894)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2896)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2898)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2900)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2902)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2904)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2906)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2908)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2910))] "CGEN_ENABLE_INSN_P (182)" "cpsada1u.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpabsla1_h_C3" [(set (reg:SI 107) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2912)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2914)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2916)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2918))] "CGEN_ENABLE_INSN_P (183)" "cpabsla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpabsla1_h_P1" [(set (reg:SI 107) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2912)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2914)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2916)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2918))] "CGEN_ENABLE_INSN_P (184)" "cpabsla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpabsua1_h_C3" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2920)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2922)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2924)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2926))] "CGEN_ENABLE_INSN_P (185)" "cpabsua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpabsua1_h_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2920)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2922)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2924)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2926))] "CGEN_ENABLE_INSN_P (186)" "cpabsua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpabsa1_b_C3" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2928)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2930)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2932)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2934)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2936)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2938)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2940)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2942))] "CGEN_ENABLE_INSN_P (187)" "cpabsa1.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpabsa1_b_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2928)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2930)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2932)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2934)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2936)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2938)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2940)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2942))] "CGEN_ENABLE_INSN_P (188)" "cpabsa1.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpabsa1u_b_C3" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2944)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2946)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2948)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2950)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2952)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2954)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2956)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2958))] "CGEN_ENABLE_INSN_P (189)" "cpabsa1u.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpabsa1u_b_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2944)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2946)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2948)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2950)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2952)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2954)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2956)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2958))] "CGEN_ENABLE_INSN_P (190)" "cpabsa1u.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsubacla1_h_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2960)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2962)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2964)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2966)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2968))] "CGEN_ENABLE_INSN_P (191)" "cpsubacla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsubacla1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2960)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2962)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2964)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2966)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2968))] "CGEN_ENABLE_INSN_P (192)" "cpsubacla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsubacua1_h_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2970)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2972)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2974)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2976)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2978))] "CGEN_ENABLE_INSN_P (193)" "cpsubacua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsubacua1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2970)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2972)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2974)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2976)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2978))] "CGEN_ENABLE_INSN_P (194)" "cpsubacua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsubaca1_b_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2980)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2982)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2984)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2986)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2988)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2990)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2992)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2994)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2996))] "CGEN_ENABLE_INSN_P (195)" "cpsubaca1.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsubaca1_b_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2980)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2982)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2984)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2986)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2988)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2990)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2992)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2994)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2996))] "CGEN_ENABLE_INSN_P (196)" "cpsubaca1.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsubaca1u_b_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2998)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3000)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3002)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3004)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3006)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3008)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3010)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3012)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3014))] "CGEN_ENABLE_INSN_P (197)" "cpsubaca1u.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsubaca1u_b_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2998)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3000)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3002)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3004)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3006)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3008)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3010)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3012)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3014))] "CGEN_ENABLE_INSN_P (198)" "cpsubaca1u.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsubla1_h_C3" [(set (reg:SI 107) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3016)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3018)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3020)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3022))] "CGEN_ENABLE_INSN_P (199)" "cpsubla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsubla1_h_P1" [(set (reg:SI 107) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3016)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3018)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3020)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3022))] "CGEN_ENABLE_INSN_P (200)" "cpsubla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsubua1_h_C3" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3024)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3026)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3028)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3030))] "CGEN_ENABLE_INSN_P (201)" "cpsubua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsubua1_h_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3024)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3026)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3028)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3030))] "CGEN_ENABLE_INSN_P (202)" "cpsubua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsuba1_b_C3" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3032)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3034)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3036)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3038)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3040)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3042)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3044)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3046))] "CGEN_ENABLE_INSN_P (203)" "cpsuba1.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsuba1_b_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3032)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3034)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3036)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3038)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3040)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3042)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3044)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3046))] "CGEN_ENABLE_INSN_P (204)" "cpsuba1.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsuba1u_b_C3" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3048)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3050)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3052)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3054)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3056)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3058)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3060)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3062))] "CGEN_ENABLE_INSN_P (205)" "cpsuba1u.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsuba1u_b_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3048)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3050)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3052)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3054)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3056)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3058)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3060)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3062))] "CGEN_ENABLE_INSN_P (206)" "cpsuba1u.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaddacla1_h_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3064)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3066)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3068)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3070)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3072))] "CGEN_ENABLE_INSN_P (207)" "cpaddacla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaddacla1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3064)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3066)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3068)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3070)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3072))] "CGEN_ENABLE_INSN_P (208)" "cpaddacla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaddacua1_h_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3074)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3076)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3078)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3080)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3082))] "CGEN_ENABLE_INSN_P (209)" "cpaddacua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaddacua1_h_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3074)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3076)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3078)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3080)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3082))] "CGEN_ENABLE_INSN_P (210)" "cpaddacua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaddaca1_b_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3084)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3086)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3088)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3090)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3092)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3094)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3096)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3098)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3100))] "CGEN_ENABLE_INSN_P (211)" "cpaddaca1.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaddaca1_b_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3084)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3086)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3088)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3090)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3092)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3094)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3096)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3098)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3100))] "CGEN_ENABLE_INSN_P (212)" "cpaddaca1.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaddaca1u_b_C3" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3102)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3104)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3106)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3108)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3110)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3112)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3114)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3116)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3118))] "CGEN_ENABLE_INSN_P (213)" "cpaddaca1u.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaddaca1u_b_P1" [(set (reg:SI 87) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3102)) (set (reg:SI 111) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3104)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3106)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3108)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3110)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3112)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3114)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3116)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3118))] "CGEN_ENABLE_INSN_P (214)" "cpaddaca1u.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaddla1_h_C3" [(set (reg:SI 107) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3120)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3122)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3124)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3126))] "CGEN_ENABLE_INSN_P (215)" "cpaddla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaddla1_h_P1" [(set (reg:SI 107) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3120)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3122)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3124)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3126))] "CGEN_ENABLE_INSN_P (216)" "cpaddla1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaddua1_h_C3" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3128)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3130)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3132)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3134))] "CGEN_ENABLE_INSN_P (217)" "cpaddua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaddua1_h_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3128)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3130)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3132)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3134))] "CGEN_ENABLE_INSN_P (218)" "cpaddua1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpadda1_b_C3" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3136)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3138)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3140)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3142)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3144)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3146)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3148)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3150))] "CGEN_ENABLE_INSN_P (219)" "cpadda1.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpadda1_b_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3136)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3138)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3140)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3142)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3144)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3146)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3148)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3150))] "CGEN_ENABLE_INSN_P (220)" "cpadda1.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpadda1u_b_C3" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3152)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3154)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3156)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3158)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3160)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3162)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3164)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3166))] "CGEN_ENABLE_INSN_P (221)" "cpadda1u.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpadda1u_b_P1" [(set (reg:SI 111) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3152)) (set (reg:SI 110) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3154)) (set (reg:SI 109) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3156)) (set (reg:SI 108) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3158)) (set (reg:SI 107) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3160)) (set (reg:SI 106) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3162)) (set (reg:SI 105) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3164)) (set (reg:SI 104) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3166))] "CGEN_ENABLE_INSN_P (222)" "cpadda1u.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmovi_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "cgen_h_sint_8a1_immediate" "") ] 3180))] "CGEN_ENABLE_INSN_P (223)" "cpmovi.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmovi_b_P0S_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "cgen_h_sint_8a1_immediate" "") ] 3180))] "CGEN_ENABLE_INSN_P (224)" "cpmovi.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0s_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_c1nop_P1" [(unspec_volatile [ (const_int 0) ] 1482)] "CGEN_ENABLE_INSN_P (225)" "c1nop" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdmovi_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "cgen_h_sint_8a1_immediate" "") ] 3168))] "CGEN_ENABLE_INSN_P (226)" "cdmovi\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdmovi_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "cgen_h_sint_16a1_immediate" "") ] 3168))] "CGEN_ENABLE_INSN_P (227)" "cdmovi\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdmoviu_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "cgen_h_uint_8a1_immediate" "") ] 3170))] "CGEN_ENABLE_INSN_P (228)" "cdmoviu\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdmoviu_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "cgen_h_uint_16a1_immediate" "") ] 3170))] "CGEN_ENABLE_INSN_P (229)" "cdmoviu\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmovi_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "cgen_h_sint_8a1_immediate" "") ] 3172))] "CGEN_ENABLE_INSN_P (230)" "cpmovi.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmovi_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "cgen_h_sint_16a1_immediate" "") ] 3172))] "CGEN_ENABLE_INSN_P (231)" "cpmovi.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmoviu_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "cgen_h_uint_8a1_immediate" "") ] 3174))] "CGEN_ENABLE_INSN_P (232)" "cpmoviu.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmoviu_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "cgen_h_uint_16a1_immediate" "") ] 3174))] "CGEN_ENABLE_INSN_P (233)" "cpmoviu.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmovi_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "cgen_h_sint_8a1_immediate" "") ] 3176))] "CGEN_ENABLE_INSN_P (234)" "cpmovi.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmovi_h_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "cgen_h_sint_16a1_immediate" "") ] 3176))] "CGEN_ENABLE_INSN_P (235)" "cpmovi.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdclipi3_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_6a1_immediate" "") ] 3182))] "CGEN_ENABLE_INSN_P (236)" "cdclipi3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdclipi3_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_6a1_immediate" "") ] 3182))] "CGEN_ENABLE_INSN_P (237)" "cdclipi3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdclipiu3_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_6a1_immediate" "") ] 3184))] "CGEN_ENABLE_INSN_P (238)" "cdclipiu3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdclipiu3_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_6a1_immediate" "") ] 3184))] "CGEN_ENABLE_INSN_P (239)" "cdclipiu3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpclipi3_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_5a1_immediate" "") ] 3186))] "CGEN_ENABLE_INSN_P (240)" "cpclipi3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpclipi3_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_5a1_immediate" "") ] 3186))] "CGEN_ENABLE_INSN_P (241)" "cpclipi3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpclipiu3_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_5a1_immediate" "") ] 3188))] "CGEN_ENABLE_INSN_P (242)" "cpclipiu3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpclipiu3_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_5a1_immediate" "") ] 3188))] "CGEN_ENABLE_INSN_P (243)" "cpclipiu3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpslai3_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_5a1_immediate" "") ] 3190))] "CGEN_ENABLE_INSN_P (244)" "cpslai3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpslai3_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_5a1_immediate" "") ] 3190))] "CGEN_ENABLE_INSN_P (245)" "cpslai3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpslai3_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_4a1_immediate" "") ] 3192))] "CGEN_ENABLE_INSN_P (246)" "cpslai3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpslai3_h_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_4a1_immediate" "") ] 3192))] "CGEN_ENABLE_INSN_P (247)" "cpslai3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdslli3_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_6a1_immediate" "") ] 3194))] "CGEN_ENABLE_INSN_P (248)" "cdslli3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdslli3_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_6a1_immediate" "") ] 3194))] "CGEN_ENABLE_INSN_P (249)" "cdslli3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpslli3_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_5a1_immediate" "") ] 3196))] "CGEN_ENABLE_INSN_P (250)" "cpslli3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpslli3_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_5a1_immediate" "") ] 3196))] "CGEN_ENABLE_INSN_P (251)" "cpslli3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpslli3_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_4a1_immediate" "") ] 3198))] "CGEN_ENABLE_INSN_P (252)" "cpslli3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpslli3_h_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_4a1_immediate" "") ] 3198))] "CGEN_ENABLE_INSN_P (253)" "cpslli3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpslli3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_3a1_immediate" "") ] 3200))] "CGEN_ENABLE_INSN_P (254)" "cpslli3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpslli3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_3a1_immediate" "") ] 3200))] "CGEN_ENABLE_INSN_P (255)" "cpslli3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdsrai3_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_6a1_immediate" "") ] 3202))] "CGEN_ENABLE_INSN_P (256)" "cdsrai3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdsrai3_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_6a1_immediate" "") ] 3202))] "CGEN_ENABLE_INSN_P (257)" "cdsrai3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsrai3_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_5a1_immediate" "") ] 3204))] "CGEN_ENABLE_INSN_P (258)" "cpsrai3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsrai3_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_5a1_immediate" "") ] 3204))] "CGEN_ENABLE_INSN_P (259)" "cpsrai3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsrai3_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_4a1_immediate" "") ] 3206))] "CGEN_ENABLE_INSN_P (260)" "cpsrai3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsrai3_h_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_4a1_immediate" "") ] 3206))] "CGEN_ENABLE_INSN_P (261)" "cpsrai3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsrai3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_3a1_immediate" "") ] 3208))] "CGEN_ENABLE_INSN_P (262)" "cpsrai3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsrai3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_3a1_immediate" "") ] 3208))] "CGEN_ENABLE_INSN_P (263)" "cpsrai3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdsrli3_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_6a1_immediate" "") ] 3210))] "CGEN_ENABLE_INSN_P (264)" "cdsrli3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdsrli3_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_6a1_immediate" "") ] 3210))] "CGEN_ENABLE_INSN_P (265)" "cdsrli3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsrli3_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_5a1_immediate" "") ] 3212))] "CGEN_ENABLE_INSN_P (266)" "cpsrli3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsrli3_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_5a1_immediate" "") ] 3212))] "CGEN_ENABLE_INSN_P (267)" "cpsrli3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsrli3_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_4a1_immediate" "") ] 3214))] "CGEN_ENABLE_INSN_P (268)" "cpsrli3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsrli3_h_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_4a1_immediate" "") ] 3214))] "CGEN_ENABLE_INSN_P (269)" "cpsrli3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsrli3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_3a1_immediate" "") ] 3216))] "CGEN_ENABLE_INSN_P (270)" "cpsrli3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsrli3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "cgen_h_uint_3a1_immediate" "") ] 3216))] "CGEN_ENABLE_INSN_P (271)" "cpsrli3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsla3_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3460))] "CGEN_ENABLE_INSN_P (272)" "cpsla3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsla3_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3460))] "CGEN_ENABLE_INSN_P (273)" "cpsla3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsla3_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3462))] "CGEN_ENABLE_INSN_P (274)" "cpsla3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsla3_h_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3462))] "CGEN_ENABLE_INSN_P (275)" "cpsla3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdsll3_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3464))] "CGEN_ENABLE_INSN_P (276)" "cdsll3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdsll3_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3464))] "CGEN_ENABLE_INSN_P (277)" "cdsll3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssll3_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3466))] "CGEN_ENABLE_INSN_P (278)" "cpssll3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssll3_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3466))] "CGEN_ENABLE_INSN_P (279)" "cpssll3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsll3_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3468))] "CGEN_ENABLE_INSN_P (280)" "cpsll3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsll3_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3468))] "CGEN_ENABLE_INSN_P (281)" "cpsll3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssll3_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3470))] "CGEN_ENABLE_INSN_P (282)" "cpssll3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssll3_h_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3470))] "CGEN_ENABLE_INSN_P (283)" "cpssll3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsll3_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3472))] "CGEN_ENABLE_INSN_P (284)" "cpsll3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsll3_h_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3472))] "CGEN_ENABLE_INSN_P (285)" "cpsll3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssll3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3474))] "CGEN_ENABLE_INSN_P (286)" "cpssll3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssll3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3474))] "CGEN_ENABLE_INSN_P (287)" "cpssll3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsll3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3476))] "CGEN_ENABLE_INSN_P (288)" "cpsll3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsll3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3476))] "CGEN_ENABLE_INSN_P (289)" "cpsll3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdsra3_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3478))] "CGEN_ENABLE_INSN_P (290)" "cdsra3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdsra3_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3478))] "CGEN_ENABLE_INSN_P (291)" "cdsra3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssra3_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3480))] "CGEN_ENABLE_INSN_P (292)" "cpssra3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssra3_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3480))] "CGEN_ENABLE_INSN_P (293)" "cpssra3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsra3_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3482))] "CGEN_ENABLE_INSN_P (294)" "cpsra3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsra3_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3482))] "CGEN_ENABLE_INSN_P (295)" "cpsra3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssra3_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3484))] "CGEN_ENABLE_INSN_P (296)" "cpssra3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssra3_h_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3484))] "CGEN_ENABLE_INSN_P (297)" "cpssra3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsra3_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3486))] "CGEN_ENABLE_INSN_P (298)" "cpsra3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsra3_h_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3486))] "CGEN_ENABLE_INSN_P (299)" "cpsra3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssra3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3488))] "CGEN_ENABLE_INSN_P (300)" "cpssra3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssra3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3488))] "CGEN_ENABLE_INSN_P (301)" "cpssra3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsra3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3490))] "CGEN_ENABLE_INSN_P (302)" "cpsra3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsra3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3490))] "CGEN_ENABLE_INSN_P (303)" "cpsra3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdsrl3_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3492))] "CGEN_ENABLE_INSN_P (304)" "cdsrl3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdsrl3_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3492))] "CGEN_ENABLE_INSN_P (305)" "cdsrl3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssrl3_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3494))] "CGEN_ENABLE_INSN_P (306)" "cpssrl3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssrl3_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3494))] "CGEN_ENABLE_INSN_P (307)" "cpssrl3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsrl3_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3496))] "CGEN_ENABLE_INSN_P (308)" "cpsrl3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsrl3_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3496))] "CGEN_ENABLE_INSN_P (309)" "cpsrl3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssrl3_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3498))] "CGEN_ENABLE_INSN_P (310)" "cpssrl3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssrl3_h_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3498))] "CGEN_ENABLE_INSN_P (311)" "cpssrl3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsrl3_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3500))] "CGEN_ENABLE_INSN_P (312)" "cpsrl3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsrl3_h_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3500))] "CGEN_ENABLE_INSN_P (313)" "cpsrl3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssrl3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3502))] "CGEN_ENABLE_INSN_P (314)" "cpssrl3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssrl3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3502))] "CGEN_ENABLE_INSN_P (315)" "cpssrl3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsrl3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3504))] "CGEN_ENABLE_INSN_P (316)" "cpsrl3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsrl3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3504))] "CGEN_ENABLE_INSN_P (317)" "cpsrl3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmin3_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3390))] "CGEN_ENABLE_INSN_P (318)" "cpmin3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmin3_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3390))] "CGEN_ENABLE_INSN_P (319)" "cpmin3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpminu3_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3392))] "CGEN_ENABLE_INSN_P (320)" "cpminu3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpminu3_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3392))] "CGEN_ENABLE_INSN_P (321)" "cpminu3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmin3_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3394))] "CGEN_ENABLE_INSN_P (322)" "cpmin3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmin3_h_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3394))] "CGEN_ENABLE_INSN_P (323)" "cpmin3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmin3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3396))] "CGEN_ENABLE_INSN_P (324)" "cpmin3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmin3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3396))] "CGEN_ENABLE_INSN_P (325)" "cpmin3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpminu3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3398))] "CGEN_ENABLE_INSN_P (326)" "cpminu3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpminu3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3398))] "CGEN_ENABLE_INSN_P (327)" "cpminu3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmax3_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3400))] "CGEN_ENABLE_INSN_P (328)" "cpmax3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmax3_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3400))] "CGEN_ENABLE_INSN_P (329)" "cpmax3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmaxu3_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3402))] "CGEN_ENABLE_INSN_P (330)" "cpmaxu3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmaxu3_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3402))] "CGEN_ENABLE_INSN_P (331)" "cpmaxu3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmax3_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3404))] "CGEN_ENABLE_INSN_P (332)" "cpmax3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmax3_h_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3404))] "CGEN_ENABLE_INSN_P (333)" "cpmax3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmax3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3406))] "CGEN_ENABLE_INSN_P (334)" "cpmax3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmax3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3406))] "CGEN_ENABLE_INSN_P (335)" "cpmax3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmaxu3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3408))] "CGEN_ENABLE_INSN_P (336)" "cpmaxu3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpmaxu3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3408))] "CGEN_ENABLE_INSN_P (337)" "cpmaxu3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cppack_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3506))] "CGEN_ENABLE_INSN_P (338)" "cppack.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cppack_h_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3506))] "CGEN_ENABLE_INSN_P (339)" "cppack.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cppack_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3508))] "CGEN_ENABLE_INSN_P (340)" "cppack.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cppack_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3508))] "CGEN_ENABLE_INSN_P (341)" "cppack.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cppacku_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3510))] "CGEN_ENABLE_INSN_P (342)" "cppacku.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cppacku_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3510))] "CGEN_ENABLE_INSN_P (343)" "cppacku.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpxor3_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3532))] "CGEN_ENABLE_INSN_P (344)" "cpxor3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpxor3_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3532))] "CGEN_ENABLE_INSN_P (345)" "cpxor3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpnor3_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3534))] "CGEN_ENABLE_INSN_P (346)" "cpnor3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpnor3_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3534))] "CGEN_ENABLE_INSN_P (347)" "cpnor3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpor3_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3536))] "CGEN_ENABLE_INSN_P (348)" "cpor3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpor3_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3536))] "CGEN_ENABLE_INSN_P (349)" "cpor3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpand3_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3538))] "CGEN_ENABLE_INSN_P (350)" "cpand3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpand3_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3538))] "CGEN_ENABLE_INSN_P (351)" "cpand3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpabs3_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3410))] "CGEN_ENABLE_INSN_P (352)" "cpabs3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpabs3_h_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3410))] "CGEN_ENABLE_INSN_P (353)" "cpabs3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpabs3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3412))] "CGEN_ENABLE_INSN_P (354)" "cpabs3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpabs3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3412))] "CGEN_ENABLE_INSN_P (355)" "cpabs3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpabsu3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3414))] "CGEN_ENABLE_INSN_P (356)" "cpabsu3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpabsu3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3414))] "CGEN_ENABLE_INSN_P (357)" "cpabsu3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaddsr3_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3416))] "CGEN_ENABLE_INSN_P (358)" "cpaddsr3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaddsr3_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3416))] "CGEN_ENABLE_INSN_P (359)" "cpaddsr3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaddsr3_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3418))] "CGEN_ENABLE_INSN_P (360)" "cpaddsr3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaddsr3_h_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3418))] "CGEN_ENABLE_INSN_P (361)" "cpaddsr3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaddsr3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3420))] "CGEN_ENABLE_INSN_P (362)" "cpaddsr3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaddsr3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3420))] "CGEN_ENABLE_INSN_P (363)" "cpaddsr3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaddsru3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3422))] "CGEN_ENABLE_INSN_P (364)" "cpaddsru3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaddsru3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3422))] "CGEN_ENABLE_INSN_P (365)" "cpaddsru3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpave3_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3424))] "CGEN_ENABLE_INSN_P (366)" "cpave3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpave3_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3424))] "CGEN_ENABLE_INSN_P (367)" "cpave3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpave3_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3426))] "CGEN_ENABLE_INSN_P (368)" "cpave3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpave3_h_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3426))] "CGEN_ENABLE_INSN_P (369)" "cpave3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpave3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3428))] "CGEN_ENABLE_INSN_P (370)" "cpave3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpave3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3428))] "CGEN_ENABLE_INSN_P (371)" "cpave3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaveu3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3430))] "CGEN_ENABLE_INSN_P (372)" "cpaveu3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpaveu3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3430))] "CGEN_ENABLE_INSN_P (373)" "cpaveu3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpextlsub3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3432))] "CGEN_ENABLE_INSN_P (374)" "cpextlsub3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpextlsub3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3432))] "CGEN_ENABLE_INSN_P (375)" "cpextlsub3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpextlsubu3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3434))] "CGEN_ENABLE_INSN_P (376)" "cpextlsubu3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpextlsubu3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3434))] "CGEN_ENABLE_INSN_P (377)" "cpextlsubu3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpextusub3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3436))] "CGEN_ENABLE_INSN_P (378)" "cpextusub3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpextusub3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3436))] "CGEN_ENABLE_INSN_P (379)" "cpextusub3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpextusubu3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3438))] "CGEN_ENABLE_INSN_P (380)" "cpextusubu3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpextusubu3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3438))] "CGEN_ENABLE_INSN_P (381)" "cpextusubu3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpextladd3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3440))] "CGEN_ENABLE_INSN_P (382)" "cpextladd3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpextladd3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3440))] "CGEN_ENABLE_INSN_P (383)" "cpextladd3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpextladdu3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3442))] "CGEN_ENABLE_INSN_P (384)" "cpextladdu3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpextladdu3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3442))] "CGEN_ENABLE_INSN_P (385)" "cpextladdu3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpextuadd3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3444))] "CGEN_ENABLE_INSN_P (386)" "cpextuadd3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpextuadd3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3444))] "CGEN_ENABLE_INSN_P (387)" "cpextuadd3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpextuaddu3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3446))] "CGEN_ENABLE_INSN_P (388)" "cpextuaddu3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpextuaddu3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3446))] "CGEN_ENABLE_INSN_P (389)" "cpextuaddu3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssub3_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3448)) (set (reg:SI 84) (unspec_volatile:SI [ (match_dup 1) (match_dup 2) ] 3450))] "CGEN_ENABLE_INSN_P (390)" "cpssub3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssub3_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3448)) (set (reg:SI 84) (unspec_volatile:SI [ (match_dup 1) (match_dup 2) ] 3450))] "CGEN_ENABLE_INSN_P (391)" "cpssub3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssub3_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3452)) (set (reg:SI 84) (unspec_volatile:SI [ (match_dup 1) (match_dup 2) ] 3454))] "CGEN_ENABLE_INSN_P (392)" "cpssub3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpssub3_h_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3452)) (set (reg:SI 84) (unspec_volatile:SI [ (match_dup 1) (match_dup 2) ] 3454))] "CGEN_ENABLE_INSN_P (393)" "cpssub3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsadd3_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3456))] "CGEN_ENABLE_INSN_P (394)" "cpsadd3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsadd3_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3456))] "CGEN_ENABLE_INSN_P (395)" "cpsadd3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsadd3_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3458))] "CGEN_ENABLE_INSN_P (396)" "cpsadd3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsadd3_h_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec_volatile:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3458))] "CGEN_ENABLE_INSN_P (397)" "cpsadd3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdsub3_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3540))] "CGEN_ENABLE_INSN_P (398)" "cdsub3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdsub3_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3540))] "CGEN_ENABLE_INSN_P (399)" "cdsub3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsub3_w_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3542))] "CGEN_ENABLE_INSN_P (400)" "cpsub3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsub3_w_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3542))] "CGEN_ENABLE_INSN_P (401)" "cpsub3.w\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsub3_h_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3544))] "CGEN_ENABLE_INSN_P (402)" "cpsub3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsub3_h_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3544))] "CGEN_ENABLE_INSN_P (403)" "cpsub3.h\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsub3_b_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3546))] "CGEN_ENABLE_INSN_P (404)" "cpsub3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpsub3_b_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3546))] "CGEN_ENABLE_INSN_P (405)" "cpsub3.b\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdadd3_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3548))] "CGEN_ENABLE_INSN_P (406)" "cdadd3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cdadd3_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") ] 3548))] "CGEN_ENABLE_INSN_P (407)" "cdadd3\\t%0,%1,%2" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpge_w_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3218)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3219))] "CGEN_ENABLE_INSN_P (408)" "cpocmpge.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpge_w_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3218)] "CGEN_ENABLE_INSN_P (409)" "cpocmpge.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpgeu_w_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3220)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3221))] "CGEN_ENABLE_INSN_P (410)" "cpocmpgeu.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpgeu_w_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3220)] "CGEN_ENABLE_INSN_P (411)" "cpocmpgeu.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpge_h_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3222)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3223))] "CGEN_ENABLE_INSN_P (412)" "cpocmpge.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpge_h_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3222)] "CGEN_ENABLE_INSN_P (413)" "cpocmpge.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpge_b_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3224)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3225))] "CGEN_ENABLE_INSN_P (414)" "cpocmpge.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpge_b_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3224)] "CGEN_ENABLE_INSN_P (415)" "cpocmpge.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpgeu_b_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3226)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3227))] "CGEN_ENABLE_INSN_P (416)" "cpocmpgeu.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpgeu_b_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3226)] "CGEN_ENABLE_INSN_P (417)" "cpocmpgeu.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpgt_w_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3228)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3229))] "CGEN_ENABLE_INSN_P (418)" "cpocmpgt.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpgt_w_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3228)] "CGEN_ENABLE_INSN_P (419)" "cpocmpgt.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpgtu_w_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3230)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3231))] "CGEN_ENABLE_INSN_P (420)" "cpocmpgtu.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpgtu_w_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3230)] "CGEN_ENABLE_INSN_P (421)" "cpocmpgtu.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpgt_h_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3232)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3233))] "CGEN_ENABLE_INSN_P (422)" "cpocmpgt.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpgt_h_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3232)] "CGEN_ENABLE_INSN_P (423)" "cpocmpgt.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpgt_b_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3234)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3235))] "CGEN_ENABLE_INSN_P (424)" "cpocmpgt.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpgt_b_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3234)] "CGEN_ENABLE_INSN_P (425)" "cpocmpgt.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpgtu_b_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3236)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3237))] "CGEN_ENABLE_INSN_P (426)" "cpocmpgtu.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpgtu_b_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3236)] "CGEN_ENABLE_INSN_P (427)" "cpocmpgtu.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpne_w_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3238)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3239))] "CGEN_ENABLE_INSN_P (428)" "cpocmpne.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpne_w_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3238)] "CGEN_ENABLE_INSN_P (429)" "cpocmpne.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpne_h_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3240)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3241))] "CGEN_ENABLE_INSN_P (430)" "cpocmpne.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpne_h_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3240)] "CGEN_ENABLE_INSN_P (431)" "cpocmpne.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpne_b_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3242)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3243))] "CGEN_ENABLE_INSN_P (432)" "cpocmpne.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpne_b_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3242)] "CGEN_ENABLE_INSN_P (433)" "cpocmpne.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpeq_w_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3244)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3245))] "CGEN_ENABLE_INSN_P (434)" "cpocmpeq.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpeq_w_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3244)] "CGEN_ENABLE_INSN_P (435)" "cpocmpeq.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpeq_h_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3246)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3247))] "CGEN_ENABLE_INSN_P (436)" "cpocmpeq.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpeq_h_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3246)] "CGEN_ENABLE_INSN_P (437)" "cpocmpeq.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpeq_b_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3248)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3249))] "CGEN_ENABLE_INSN_P (438)" "cpocmpeq.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpocmpeq_b_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3248)] "CGEN_ENABLE_INSN_P (439)" "cpocmpeq.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpge_w_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3250)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3251))] "CGEN_ENABLE_INSN_P (440)" "cpacmpge.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpge_w_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3250)] "CGEN_ENABLE_INSN_P (441)" "cpacmpge.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpgeu_w_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3252)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3253))] "CGEN_ENABLE_INSN_P (442)" "cpacmpgeu.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpgeu_w_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3252)] "CGEN_ENABLE_INSN_P (443)" "cpacmpgeu.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpge_h_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3254)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3255))] "CGEN_ENABLE_INSN_P (444)" "cpacmpge.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpge_h_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3254)] "CGEN_ENABLE_INSN_P (445)" "cpacmpge.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpge_b_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3256)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3257))] "CGEN_ENABLE_INSN_P (446)" "cpacmpge.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpge_b_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3256)] "CGEN_ENABLE_INSN_P (447)" "cpacmpge.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpgeu_b_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3258)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3259))] "CGEN_ENABLE_INSN_P (448)" "cpacmpgeu.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpgeu_b_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3258)] "CGEN_ENABLE_INSN_P (449)" "cpacmpgeu.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpgt_w_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3260)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3261))] "CGEN_ENABLE_INSN_P (450)" "cpacmpgt.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpgt_w_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3260)] "CGEN_ENABLE_INSN_P (451)" "cpacmpgt.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpgtu_w_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3262)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3263))] "CGEN_ENABLE_INSN_P (452)" "cpacmpgtu.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpgtu_w_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3262)] "CGEN_ENABLE_INSN_P (453)" "cpacmpgtu.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpgt_h_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3264)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3265))] "CGEN_ENABLE_INSN_P (454)" "cpacmpgt.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpgt_h_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3264)] "CGEN_ENABLE_INSN_P (455)" "cpacmpgt.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpgt_b_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3266)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3267))] "CGEN_ENABLE_INSN_P (456)" "cpacmpgt.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpgt_b_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3266)] "CGEN_ENABLE_INSN_P (457)" "cpacmpgt.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpgtu_b_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3268)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3269))] "CGEN_ENABLE_INSN_P (458)" "cpacmpgtu.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpgtu_b_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3268)] "CGEN_ENABLE_INSN_P (459)" "cpacmpgtu.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpne_w_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3270)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3271))] "CGEN_ENABLE_INSN_P (460)" "cpacmpne.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpne_w_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3270)] "CGEN_ENABLE_INSN_P (461)" "cpacmpne.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpne_h_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3272)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3273))] "CGEN_ENABLE_INSN_P (462)" "cpacmpne.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpne_h_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3272)] "CGEN_ENABLE_INSN_P (463)" "cpacmpne.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpne_b_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3274)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3275))] "CGEN_ENABLE_INSN_P (464)" "cpacmpne.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpne_b_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3274)] "CGEN_ENABLE_INSN_P (465)" "cpacmpne.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpeq_w_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3276)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3277))] "CGEN_ENABLE_INSN_P (466)" "cpacmpeq.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpeq_w_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3276)] "CGEN_ENABLE_INSN_P (467)" "cpacmpeq.w\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpeq_h_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3278)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3279))] "CGEN_ENABLE_INSN_P (468)" "cpacmpeq.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpeq_h_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3278)] "CGEN_ENABLE_INSN_P (469)" "cpacmpeq.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpeq_b_C3" [(set (reg:SI 81) (unspec:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3280)) (set (reg:SI 113) (unspec:SI [ (match_dup 0) (match_dup 1) ] 3281))] "CGEN_ENABLE_INSN_P (470)" "cpacmpeq.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpacmpeq_b_P0_P1" [(unspec_volatile [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3280)] "CGEN_ENABLE_INSN_P (471)" "cpacmpeq.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfsftbi_C3" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") (match_operand:DI 3 "cgen_h_uint_3a1_immediate" "") ] 3528))] "CGEN_ENABLE_INSN_P (472)" "cpfsftbi\\t%0,%1,%2,%3" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "c3") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfsftbi_P0_P1" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") (match_operand:DI 2 "general_operand" "x") (match_operand:DI 3 "cgen_h_uint_3a1_immediate" "") ] 3528))] "CGEN_ENABLE_INSN_P (473)" "cpfsftbi\\t%0,%1,%2,%3" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0_p1") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfacla0s1_h_P0S" [(set (reg:SI 86) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1484)) (set (reg:SI 99) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1486)) (set (reg:SI 98) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1488)) (set (reg:SI 97) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1490)) (set (reg:SI 96) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1492))] "CGEN_ENABLE_INSN_P (474)" "cpfacla0s1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0s") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfacua0s1_h_P0S" [(set (reg:SI 86) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1494)) (set (reg:SI 103) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1496)) (set (reg:SI 102) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1498)) (set (reg:SI 101) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1500)) (set (reg:SI 100) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1502))] "CGEN_ENABLE_INSN_P (475)" "cpfacua0s1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0s") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfaca0s1_b_P0S" [(set (reg:SI 86) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1504)) (set (reg:SI 103) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1506)) (set (reg:SI 102) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1508)) (set (reg:SI 101) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1510)) (set (reg:SI 100) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1512)) (set (reg:SI 99) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1514)) (set (reg:SI 98) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1516)) (set (reg:SI 97) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1518)) (set (reg:SI 96) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1520))] "CGEN_ENABLE_INSN_P (476)" "cpfaca0s1.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0s") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfaca0s1u_b_P0S" [(set (reg:SI 86) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1522)) (set (reg:SI 103) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1524)) (set (reg:SI 102) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1526)) (set (reg:SI 101) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1528)) (set (reg:SI 100) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1530)) (set (reg:SI 99) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1532)) (set (reg:SI 98) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1534)) (set (reg:SI 97) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1536)) (set (reg:SI 96) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1538))] "CGEN_ENABLE_INSN_P (477)" "cpfaca0s1u.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0s") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfsftbla0s1_h_P0S" [(set (reg:SI 99) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1540)) (set (reg:SI 98) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1542)) (set (reg:SI 97) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1544)) (set (reg:SI 96) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1546))] "CGEN_ENABLE_INSN_P (478)" "cpfsftbla0s1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0s") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfsftbua0s1_h_P0S" [(set (reg:SI 103) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1548)) (set (reg:SI 102) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1550)) (set (reg:SI 101) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1552)) (set (reg:SI 100) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1554))] "CGEN_ENABLE_INSN_P (479)" "cpfsftbua0s1.h\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0s") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfsftba0s1_b_P0S" [(set (reg:SI 103) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1556)) (set (reg:SI 102) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1558)) (set (reg:SI 101) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1560)) (set (reg:SI 100) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1562)) (set (reg:SI 99) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1564)) (set (reg:SI 98) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1566)) (set (reg:SI 97) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1568)) (set (reg:SI 96) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1570))] "CGEN_ENABLE_INSN_P (480)" "cpfsftba0s1.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0s") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfsftba0s1u_b_P0S" [(set (reg:SI 103) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1572)) (set (reg:SI 102) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1574)) (set (reg:SI 101) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1576)) (set (reg:SI 100) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1578)) (set (reg:SI 99) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1580)) (set (reg:SI 98) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1582)) (set (reg:SI 97) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1584)) (set (reg:SI 96) (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1586))] "CGEN_ENABLE_INSN_P (481)" "cpfsftba0s1u.b\\t%0,%1" [(set_attr "may_trap" "no") (set_attr "latency" "0") (set_attr "length" "4") (set_attr "slot" "cop") (set_attr "slots" "p0s") (set_attr "stall" "none")]) (define_insn "cgen_intrinsic_cpfacla0s0_h_P0S" [(set (reg:SI 86) (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1588)) (set (reg:SI 99)