module &module:1:0:$full:$large:$default;

/* Test for casting from/to representation of HSA registers.          */

/* HSA registers are untyped but in gccbrig they are presented as     */
/* variables with a type selected by analysis.  Currently, each       */
/* register variable, per function, has a type as it is used at       */
/* most.  Therefore, register variable can be nearly any type.  The   */
/* tests makes sure the generic/tree expressions have the right casts */
/* from/to the register variables.                                    */


/* { dg-do compile } */
/* { dg-options "-fdump-tree-original" } */

prog kernel &Kernel(kernarg_u64 %input_ptr, kernarg_u64 %output_ptr)
{
        private_u64 %foo;
        private_u64 %bar;
        private_b128 %baz;

        ld_kernarg_u64 $d0, [%input_ptr];
        ld_global_u32 $s0, [$d0];

        /* Trick gccbrig to set wanted type for the registers.  */

/* $s0 is selected as float... */
/* { dg-final { scan-tree-dump "<float:32> s0;" "original"} } */
/* ..., therefore, there should not be any casts.  */
/* { dg-final { scan-tree-dump "s10 = s0 \\\+ s0;" "original"} } */

        add_f32 $s10, $s0, $s0;
        add_f32 $s10, $s0, $s0;
        add_f32 $s10, $s0, $s0;
        add_f32 $s10, $s0, $s0;
        add_f32 $s10, $s0, $s0;

/* Expression with other type, a cast is needed.  */
/* { dg-final { scan-tree-dump "s1 = VIEW_CONVERT_EXPR<unsigned int>.s0. \\\+ 123;" "original"} } */

        add_u32 $s1, $s0, 123;

/* { dg-final { scan-tree-dump "unsigned int s1;" "original"} } */

        add_u32 $s10, $s1, 0;
        add_u32 $s10, $s1, 0;
        add_u32 $s10, $s1, 0;
        add_u32 $s10, $s1, 0;
        add_u32 $s10, $s1, 0;

/* { dg-final { scan-tree-dump "s0 = VIEW_CONVERT_EXPR<<float:32>>.s1.;" "original"} } */

        mov_b32 $s0, $s1;

/* Rig the election for $d0 to be double.  */
/* { dg-final { scan-tree-dump "<float:64> d0;" "original"} } */
/* { dg-final { scan-tree-dump "d10 = d0 \\\+ d0;" "original"} } */

        add_f64 $d10, $d0, $d0;
        add_f64 $d10, $d0, $d0;
        add_f64 $d10, $d0, $d0;
        add_f64 $d10, $d0, $d0;
        add_f64 $d10, $d0, $d0;

/* Make $s2 to be vector type.  */
/* { dg-final { scan-tree-dump "vector.4. unsigned char s2;" "original"} } */
/* { dg-final { scan-tree-dump "s2 = VIEW_CONVERT_EXPR<vector.4. unsigned char>\\\(s1\\\) \\\+ VIEW_CONVERT_EXPR<vector.4. unsigned char>\\\(s1\\\);" "original"} } */

        add_pp_u8x4 $s2, $s1, $s1;

/* { dg-final { scan-tree-dump "s20 = s2 \\\+ s2;" "original"} } */

        add_pp_u8x4 $s20, $s2, $s2;
        add_pp_u8x4 $s20, $s2, $s2;
        add_pp_u8x4 $s20, $s2, $s2;
        add_pp_u8x4 $s20, $s2, $s2;

/* { dg-final { scan-tree-dump "d0 = VIEW_CONVERT_EXPR<<float:64>>.{VIEW_CONVERT_EXPR<unsigned int>.s0., VIEW_CONVERT_EXPR<unsigned int>.s2.}.;" "original"} } */

        combine_v2_b64_b32 $d0, ($s0, $s2);

/* { dg-final { scan-tree-dump "s2 = VIEW_CONVERT_EXPR<vector.4. unsigned char>.BIT_FIELD_REF <d0, 32, 0>.;" "original"} } */
/* { dg-final { scan-tree-dump "s1 = BIT_FIELD_REF <d0, 32, 32>;" "original"} } */

        expand_v2_b32_b64 ($s2, $s1), $d0;

/* { dg-final { scan-tree-dump "s0 = VIEW_CONVERT_EXPR<<float:32>>\\\(.*VIEW_CONVERT_EXPR<unsigned int>.s0\[\)\]*;" "original"} } */

        cvt_s16_s8 $s0, $s0;

/* { dg-final { scan-tree-dump "c0 = .*VIEW_CONVERT_EXPR<<float:32>>.s2..* != 0;" "original"} } */

        cvt_b1_f32 $c0, $s2;

/* { dg-final { scan-tree-dump ".*__private_base_addr.* = .*\\\(unsigned char\\\) VIEW_CONVERT_EXPR<unsigned int>\\\(s0\\\)\[\)\]*;" "original"} } */

        st_private_u8 $s0, [%foo];

/* { dg-final { scan-tree-dump ".*__private_base_addr.* = .*\\\(unsigned short\\\) VIEW_CONVERT_EXPR<unsigned int>\\\(s2\\\)\[\)\]*;" "original"} } */

        st_private_u16 $s2, [%bar];

/* { dg-final { scan-tree-dump "mem_read.\[0-9\]* = \\\*\\\(signed char \\\*\\\) \\\(__private_base_addr .*\\\);\[ \n\]*s2 = VIEW_CONVERT_EXPR<vector.4. unsigned char>\\\(\\\(signed int\\\) mem_read.\[0-9\]*\\\);" "original"} } */

        ld_private_s8 $s2, [%foo];

/* { dg-final { scan-tree-dump "mem_read.\[0-9\]* = \\\*\\\(signed short \\\*\\\) \\\(__private_base_addr .*\\\);\[ \n\]*s0 = VIEW_CONVERT_EXPR<<float:32>>\\\(\\\(signed int\\\) mem_read.\[0-9\]*\\\);" "original"} } */

        ld_private_s16 $s0, [%bar];

/* { dg-final { scan-tree-dump "\\\*\\\(<float:32> \\\*\\\) \\\(__private_base_addr.*\\\) \\\+ 0 = s0;" "original"} } */
/* { dg-final { scan-tree-dump "\\\*\\\(<float:32> \\\*\\\) \\\(__private_base_addr.*\\\) \\\+ 4 = VIEW_CONVERT_EXPR<<float:32>>\\\(s1\\\);" "original"} } */
/* { dg-final { scan-tree-dump "\\\*\\\(<float:32> \\\*\\\) \\\(__private_base_addr.*\\\) \\\+ 8 = VIEW_CONVERT_EXPR<<float:32>>\\\(s2\\\);" "original"} } */

        st_v3_private_f32 ($s0, $s1, $s2), [%baz];

/* { dg-final { scan-tree-dump "mem_read.\[0-9\]* = \\\*\\\(signed short \\\*\\\) \\\(__private_base_addr.*\\\) \\\+ 0;\[ \n\]*s0 = VIEW_CONVERT_EXPR<<float:32>>\\\(\\\(signed int\\\) mem_read.\[0-9\]*\\\);" "original"} } */
/* { dg-final { scan-tree-dump "mem_read.\[0-9\]* = \\\*\\\(signed short \\\*\\\) \\\(__private_base_addr.*\\\) \\\+ 2;\[ \n\]*s1 = VIEW_CONVERT_EXPR<unsigned int>\\\(\\\(signed int\\\) mem_read.\[0-9\]*\\\);" "original"} } */
/* { dg-final { scan-tree-dump "mem_read.\[0-9\]* = \\\*\\\(signed short \\\*\\\) \\\(__private_base_addr.*\\\) \\\+ 4;\[ \n\]*s2 = VIEW_CONVERT_EXPR<vector.4. unsigned char>\\\(\\\(signed int\\\) mem_read.\[0-9\]*\\\);" "original"} } */

        ld_v3_private_s16 ($s0, $s1, $s2), [%baz];

/* { dg-final { scan-tree-dump "s5 = .*VIEW_CONVERT_EXPR<unsigned int>\\\(s0\\\) == VIEW_CONVERT_EXPR<unsigned int>\\\(s2\\\)\\\) .*;" "original"} } */

        cmp_eq_s32_u32 $s5, $s0, $s2;

/* { dg-final { scan-tree-dump "s6 = VIEW_CONVERT_EXPR<<float:32>>\\\(.*VIEW_CONVERT_EXPR<vector\\\(2\\\) unsigned short>\\\(s0\\\).*VIEW_CONVERT_EXPR<vector\\\(2\\\) unsigned short>\\\(s2\\\).*;" "original"} } */

        cmp_eq_pp_u16x2_u16x2 $s6, $s0, $s2;

/* { dg-final { scan-tree-dump "<float:32> s60;" "original"} } */

        add_f32 $s60, $s6, $s6;
        add_f32 $s60, $s6, $s6;
        add_f32 $s60, $s6, $s6;
        add_f32 $s60, $s6, $s6;

        ld_kernarg_u64 $d0, [%output_ptr];
        st_global_u32 $s0, [$d0];

        ret;
};