view gcc/testsuite/gcc.dg/vect/bb-slp-pr69907.c @ 158:494b0b89df80 default tip

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author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Mon, 25 May 2020 18:13:55 +0900
parents 1830386684a0
children
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/* { dg-do compile } */
/* { dg-additional-options "-O3" } */
/* { dg-require-effective-target vect_unpack } */

#include "tree-vect.h"

#if VECTOR_BITS > 512
#define N (VECTOR_BITS * 10 / 16)
#else
#define N 320
#endif

void foo(unsigned *p1, unsigned short *p2)
{
  int n;
  for (n = 0; n < N; n++)
    p1[n] = p2[n * 2];
}

/* Disable for SVE because for long or variable-length vectors we don't
   get an unrolled epilogue loop.  Also disable for AArch64 Advanced SIMD,
   because there we can vectorize the epilogue using mixed vector sizes.  */
/* { dg-final { scan-tree-dump "BB vectorization with gaps at the end of a load is not supported" "slp1" { target { ! aarch64*-*-* } } } } */