; Options for the rs6000 port of the compiler ; ; Copyright (C) 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. ; Contributed by Aldy Hernandez . ; ; This file is part of GCC. ; ; GCC is free software; you can redistribute it and/or modify it under ; the terms of the GNU General Public License as published by the Free ; Software Foundation; either version 3, or (at your option) any later ; version. ; ; GCC is distributed in the hope that it will be useful, but WITHOUT ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ; License for more details. ; ; You should have received a copy of the GNU General Public License ; along with GCC; see the file COPYING3. If not see ; . mpower Target Report RejectNegative Mask(POWER) Use POWER instruction set mno-power Target Report RejectNegative Do not use POWER instruction set mpower2 Target Report Mask(POWER2) Use POWER2 instruction set mpowerpc Target Report RejectNegative Mask(POWERPC) Use PowerPC instruction set mno-powerpc Target Report RejectNegative Do not use PowerPC instruction set mpowerpc64 Target Report Mask(POWERPC64) Use PowerPC-64 instruction set mpowerpc-gpopt Target Report Mask(PPC_GPOPT) Use PowerPC General Purpose group optional instructions mpowerpc-gfxopt Target Report Mask(PPC_GFXOPT) Use PowerPC Graphics group optional instructions mmfcrf Target Report Mask(MFCRF) Use PowerPC V2.01 single field mfcr instruction mpopcntb Target Report Mask(POPCNTB) Use PowerPC V2.02 popcntb instruction mfprnd Target Report Mask(FPRND) Use PowerPC V2.02 floating point rounding instructions mcmpb Target Report Mask(CMPB) Use PowerPC V2.05 compare bytes instruction mmfpgpr Target Report Mask(MFPGPR) Use extended PowerPC V2.05 move floating point to/from GPR instructions maltivec Target Report Mask(ALTIVEC) Use AltiVec instructions mhard-dfp Target Report Mask(DFP) Use decimal floating point instructions mmulhw Target Report Mask(MULHW) Use 4xx half-word multiply instructions mdlmzb Target Report Mask(DLMZB) Use 4xx string-search dlmzb instruction mmultiple Target Report Mask(MULTIPLE) Generate load/store multiple instructions mstring Target Report Mask(STRING) Generate string instructions for block moves mnew-mnemonics Target Report RejectNegative Mask(NEW_MNEMONICS) Use new mnemonics for PowerPC architecture mold-mnemonics Target Report RejectNegative InverseMask(NEW_MNEMONICS) Use old mnemonics for PowerPC architecture msoft-float Target Report RejectNegative Mask(SOFT_FLOAT) Do not use hardware floating point mhard-float Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT) Use hardware floating point mpopcntd Target Report Mask(POPCNTD) Use PowerPC V2.06 popcntd instruction mvsx Target Report Mask(VSX) Use vector/scalar (VSX) instructions mvsx-scalar-double Target Undocumented Report Var(TARGET_VSX_SCALAR_DOUBLE) Init(-1) ; If -mvsx, use VSX arithmetic instructions for scalar double (on by default) mvsx-scalar-memory Target Undocumented Report Var(TARGET_VSX_SCALAR_MEMORY) ; If -mvsx, use VSX scalar memory reference instructions for scalar double (off by default) mvsx-align-128 Target Undocumented Report Var(TARGET_VSX_ALIGN_128) ; If -mvsx, set alignment to 128 bits instead of 32/64 mallow-movmisalign Target Undocumented Var(TARGET_ALLOW_MOVMISALIGN) Init(-1) ; Allow/disallow the movmisalign in DF/DI vectors mallow-df-permute Target Undocumented Var(TARGET_ALLOW_DF_PERMUTE) ; Allow/disallow permutation of DF/DI vectors msched-groups Target Undocumented Report Var(TARGET_SCHED_GROUPS) Init(-1) ; Explicitly set/unset whether rs6000_sched_groups is set malways-hint Target Undocumented Report Var(TARGET_ALWAYS_HINT) Init(-1) ; Explicitly set/unset whether rs6000_always_hint is set malign-branch-targets Target Undocumented Report Var(TARGET_ALIGN_BRANCH_TARGETS) Init(-1) ; Explicitly set/unset whether rs6000_align_branch_targets is set mvectorize-builtins Target Undocumented Report Var(TARGET_VECTORIZE_BUILTINS) Init(-1) ; Explicitly control whether we vectorize the builtins or not. mno-update Target Report RejectNegative Mask(NO_UPDATE) Do not generate load/store with update instructions mupdate Target Report RejectNegative InverseMask(NO_UPDATE, UPDATE) Generate load/store with update instructions mavoid-indexed-addresses Target Report Var(TARGET_AVOID_XFORM) Init(-1) Avoid generation of indexed load/store instructions when possible mfused-madd Target Report Var(TARGET_FUSED_MADD) Init(1) Generate fused multiply/add instructions mtls-markers Target Report Var(tls_markers) Init(1) Mark __tls_get_addr calls with argument info msched-epilog Target Undocumented Var(TARGET_SCHED_PROLOG) Init(1) msched-prolog Target Report Var(TARGET_SCHED_PROLOG) VarExists Schedule the start and end of the procedure maix-struct-return Target Report RejectNegative Var(aix_struct_return) Return all structures in memory (AIX default) msvr4-struct-return Target Report RejectNegative Var(aix_struct_return,0) VarExists Return small structures in registers (SVR4 default) mxl-compat Target Report Var(TARGET_XL_COMPAT) Conform more closely to IBM XLC semantics mrecip Target Report Var(TARGET_RECIP) Generate software reciprocal sqrt for better throughput mno-fp-in-toc Target Report RejectNegative Var(TARGET_NO_FP_IN_TOC) Do not place floating point constants in TOC mfp-in-toc Target Report RejectNegative Var(TARGET_NO_FP_IN_TOC,0) Place floating point constants in TOC mno-sum-in-toc Target RejectNegative Var(TARGET_NO_SUM_IN_TOC) Do not place symbol+offset constants in TOC msum-in-toc Target RejectNegative Var(TARGET_NO_SUM_IN_TOC,0) VarExists Place symbol+offset constants in TOC ; Output only one TOC entry per module. Normally linking fails if ; there are more than 16K unique variables/constants in an executable. With ; this option, linking fails only if there are more than 16K modules, or ; if there are more than 16K unique variables/constant in a single module. ; ; This is at the cost of having 2 extra loads and one extra store per ; function, and one less allocable register. mminimal-toc Target Report Mask(MINIMAL_TOC) Use only one TOC entry per procedure mfull-toc Target Report Put everything in the regular TOC mvrsave Target Report Var(TARGET_ALTIVEC_VRSAVE) Generate VRSAVE instructions when generating AltiVec code mvrsave= Target RejectNegative Joined -mvrsave=yes/no Deprecated option. Use -mvrsave/-mno-vrsave instead misel Target Report Mask(ISEL) Generate isel instructions misel= Target RejectNegative Joined -misel=yes/no Deprecated option. Use -misel/-mno-isel instead mspe Target Generate SPE SIMD instructions on E500 mpaired Target Var(rs6000_paired_float) Generate PPC750CL paired-single instructions mspe= Target RejectNegative Joined -mspe=yes/no Deprecated option. Use -mspe/-mno-spe instead mdebug= Target RejectNegative Joined -mdebug= Enable debug output mabi= Target RejectNegative Joined -mabi= Specify ABI to use mcpu= Target RejectNegative Joined -mcpu= Use features of and schedule code for given CPU mtune= Target RejectNegative Joined -mtune= Schedule code for given CPU mtraceback= Target RejectNegative Joined -mtraceback= Select full, part, or no traceback table mlongcall Target Report Var(rs6000_default_long_calls) Avoid all range limits on call instructions mgen-cell-microcode Target Report Var(rs6000_gen_cell_microcode) Init(-1) Generate Cell microcode mwarn-cell-microcode Target Var(rs6000_warn_cell_microcode) Init(0) Warning Warn when a Cell microcoded instruction is emitted mwarn-altivec-long Target Var(rs6000_warn_altivec_long) Init(1) Warn about deprecated 'vector long ...' AltiVec type usage mfloat-gprs= Target RejectNegative Joined -mfloat-gprs= Select GPR floating point method mlong-double- Target RejectNegative Joined UInteger -mlong-double- Specify size of long double (64 or 128 bits) msched-costly-dep= Target RejectNegative Joined Determine which dependences between insns are considered costly minsert-sched-nops= Target RejectNegative Joined Specify which post scheduling nop insertion scheme to apply malign- Target RejectNegative Joined Specify alignment of structure fields default/natural mprioritize-restricted-insns= Target RejectNegative Joined UInteger Var(rs6000_sched_restricted_insns_priority) Specify scheduling priority for dispatch slot restricted insns msingle-float Target RejectNegative Var(rs6000_single_float) Single-precision floating point unit mdouble-float Target RejectNegative Var(rs6000_double_float) Double-precision floating point unit msimple-fpu Target RejectNegative Var(rs6000_simple_fpu) Floating point unit does not support divide & sqrt mfpu= Target RejectNegative Joined -mfpu= Specify FP (sp, dp, sp-lite, dp-lite) (implies -mxilinx-fpu) mxilinx-fpu Target Var(rs6000_xilinx_fpu) Specify Xilinx FPU.