/* Machine description for Visium.
   Copyright (C) 2014-2018 Free Software Foundation, Inc.

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.

GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3.  If not see
<http://www.gnu.org/licenses/>.  */

/* Add any extra modes needed to represent the condition code.

   We have a CCNZ mode which is used for implicit comparisons with zero when
   arithmetic instructions set the condition code.  Only the N and Z flags
   are valid in this mode, which means that only the =,!= and <,>= operators
   can be used in conjunction with it.

   We also have a CCCmode which is used by the arithmetic instructions when
   they explicitly set the C flag (unsigned overflow) and by the bit-test
   instruction.  Only the =,!= and unsigned <,>= operators can be used in
   conjunction with it.

   We also have a CCVmode which is used by the arithmetic instructions when
   they explicitly set the V flag (signed overflow).  Only the =,!= operators
   can be used in conjunction with it.

   We also have two modes to indicate that the condition code is set by the
   the floating-point unit.  One for comparisons which generate an exception
   if the result is unordered (CCFPEmode) and one for comparisons which never
   generate such an exception (CCFPmode).  */

CC_MODE (CCNZ);
CC_MODE (CCC);
CC_MODE (CCV);
CC_MODE (CCFP);
CC_MODE (CCFPE);