annotate gcc/config/h8300/divmod.md @ 19:2b5abeee2509 default tip

update gcc11
author anatofuz
date Mon, 25 May 2020 07:50:57 +0900
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1 ;; ----------------------------------------------------------------------
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2 ;; DIVIDE/MOD INSTRUCTIONS
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3 ;; ----------------------------------------------------------------------
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4
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5 (define_insn "udiv<mode>3"
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6 [(set (match_operand:HSI 0 "register_operand" "=r")
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7 (udiv:HSI (match_operand:HSI 1 "register_operand" "0")
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8 (match_operand:HSI 2 "reg_or_nibble_operand" "r IP4>X")))]
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9 "TARGET_H8300SX"
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10 { return <MODE>mode == HImode ? "divu.w\\t%T2,%T0" : "divu.l\\t%S2,%S0"; }
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11 [(set_attr "length" "4")])
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12
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13 (define_insn "div<mode>3"
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14 [(set (match_operand:HSI 0 "register_operand" "=r")
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15 (div:HSI (match_operand:HSI 1 "register_operand" "0")
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16 (match_operand:HSI 2 "reg_or_nibble_operand" "r IP4>X")))]
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17 "TARGET_H8300SX"
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18 { return <MODE>mode == HImode ? "divs.w\\t%T2,%T0" : "divs.l\\t%S2,%S0"; }
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19 [(set_attr "length" "4")])
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20
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21 (define_insn "udivmodqi4"
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22 [(set (match_operand:QI 0 "register_operand" "=r")
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23 (truncate:QI
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24 (udiv:HI
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25 (match_operand:HI 1 "register_operand" "0")
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26 (zero_extend:HI (match_operand:QI 2 "register_operand" "r")))))
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27 (set (match_operand:QI 3 "register_operand" "=r")
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28 (truncate:QI
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29 (umod:HI
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30 (match_dup 1)
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31 (zero_extend:HI (match_dup 2)))))]
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32 ""
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33 {
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34 if (find_reg_note (insn, REG_UNUSED, operands[3]))
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35 return "divxu.b\\t%X2,%T0";
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36 else
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37 return "divxu.b\\t%X2,%T0\;mov.b\\t%t0,%s3";
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38 }
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39 [(set_attr "length" "4")])
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40
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41 (define_insn "divmodqi4"
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42 [(set (match_operand:QI 0 "register_operand" "=r")
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43 (truncate:QI
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44 (div:HI
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45 (match_operand:HI 1 "register_operand" "0")
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46 (sign_extend:HI (match_operand:QI 2 "register_operand" "r")))))
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47 (set (match_operand:QI 3 "register_operand" "=r")
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48 (truncate:QI
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49 (mod:HI
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50 (match_dup 1)
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51 (sign_extend:HI (match_dup 2)))))]
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52 ""
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53 {
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54 if (find_reg_note (insn, REG_UNUSED, operands[3]))
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55 return "divxs.b\\t%X2,%T0";
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56 else
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57 return "divxs.b\\t%X2,%T0\;mov.b\\t%t0,%s3";
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58 }
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59 [(set_attr "length" "6")])
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60
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61 (define_insn "udivmodhi4"
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62 [(set (match_operand:HI 0 "register_operand" "=r")
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63 (truncate:HI
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64 (udiv:SI
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65 (match_operand:SI 1 "register_operand" "0")
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66 (zero_extend:SI (match_operand:HI 2 "register_operand" "r")))))
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67 (set (match_operand:HI 3 "register_operand" "=r")
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68 (truncate:HI
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69 (umod:SI
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70 (match_dup 1)
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71 (zero_extend:SI (match_dup 2)))))]
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72 ""
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73 {
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74 if (find_reg_note (insn, REG_UNUSED, operands[3]))
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75 return "divxu.w\\t%T2,%S0";
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76 else
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77 return "divxu.w\\t%T2,%S0\;mov.w\\t%e0,%f3";
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78 }
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79 [(set_attr "length" "4")])
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80
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81 (define_insn "divmodhi4"
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82 [(set (match_operand:HI 0 "register_operand" "=r")
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83 (truncate:HI
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84 (div:SI
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85 (match_operand:SI 1 "register_operand" "0")
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86 (sign_extend:SI (match_operand:HI 2 "register_operand" "r")))))
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87 (set (match_operand:HI 3 "register_operand" "=r")
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88 (truncate:HI
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89 (mod:SI
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90 (match_dup 1)
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91 (sign_extend:SI (match_dup 2)))))]
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92 ""
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93 {
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94 if (find_reg_note (insn, REG_UNUSED, operands[3]))
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95 return "divxs.w\\t%T2,%S0";
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96 else
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97 return "divxs.w\\t%T2,%S0\;mov.w\\t%e0,%f3";
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98 }
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99 [(set_attr "length" "6")])