comparison gcc/config/h8300/divmod.md @ 19:2b5abeee2509 default tip

update gcc11
author anatofuz
date Mon, 25 May 2020 07:50:57 +0900
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18:1830386684a0 19:2b5abeee2509
1 ;; ----------------------------------------------------------------------
2 ;; DIVIDE/MOD INSTRUCTIONS
3 ;; ----------------------------------------------------------------------
4
5 (define_insn "udiv<mode>3"
6 [(set (match_operand:HSI 0 "register_operand" "=r")
7 (udiv:HSI (match_operand:HSI 1 "register_operand" "0")
8 (match_operand:HSI 2 "reg_or_nibble_operand" "r IP4>X")))]
9 "TARGET_H8300SX"
10 { return <MODE>mode == HImode ? "divu.w\\t%T2,%T0" : "divu.l\\t%S2,%S0"; }
11 [(set_attr "length" "4")])
12
13 (define_insn "div<mode>3"
14 [(set (match_operand:HSI 0 "register_operand" "=r")
15 (div:HSI (match_operand:HSI 1 "register_operand" "0")
16 (match_operand:HSI 2 "reg_or_nibble_operand" "r IP4>X")))]
17 "TARGET_H8300SX"
18 { return <MODE>mode == HImode ? "divs.w\\t%T2,%T0" : "divs.l\\t%S2,%S0"; }
19 [(set_attr "length" "4")])
20
21 (define_insn "udivmodqi4"
22 [(set (match_operand:QI 0 "register_operand" "=r")
23 (truncate:QI
24 (udiv:HI
25 (match_operand:HI 1 "register_operand" "0")
26 (zero_extend:HI (match_operand:QI 2 "register_operand" "r")))))
27 (set (match_operand:QI 3 "register_operand" "=r")
28 (truncate:QI
29 (umod:HI
30 (match_dup 1)
31 (zero_extend:HI (match_dup 2)))))]
32 ""
33 {
34 if (find_reg_note (insn, REG_UNUSED, operands[3]))
35 return "divxu.b\\t%X2,%T0";
36 else
37 return "divxu.b\\t%X2,%T0\;mov.b\\t%t0,%s3";
38 }
39 [(set_attr "length" "4")])
40
41 (define_insn "divmodqi4"
42 [(set (match_operand:QI 0 "register_operand" "=r")
43 (truncate:QI
44 (div:HI
45 (match_operand:HI 1 "register_operand" "0")
46 (sign_extend:HI (match_operand:QI 2 "register_operand" "r")))))
47 (set (match_operand:QI 3 "register_operand" "=r")
48 (truncate:QI
49 (mod:HI
50 (match_dup 1)
51 (sign_extend:HI (match_dup 2)))))]
52 ""
53 {
54 if (find_reg_note (insn, REG_UNUSED, operands[3]))
55 return "divxs.b\\t%X2,%T0";
56 else
57 return "divxs.b\\t%X2,%T0\;mov.b\\t%t0,%s3";
58 }
59 [(set_attr "length" "6")])
60
61 (define_insn "udivmodhi4"
62 [(set (match_operand:HI 0 "register_operand" "=r")
63 (truncate:HI
64 (udiv:SI
65 (match_operand:SI 1 "register_operand" "0")
66 (zero_extend:SI (match_operand:HI 2 "register_operand" "r")))))
67 (set (match_operand:HI 3 "register_operand" "=r")
68 (truncate:HI
69 (umod:SI
70 (match_dup 1)
71 (zero_extend:SI (match_dup 2)))))]
72 ""
73 {
74 if (find_reg_note (insn, REG_UNUSED, operands[3]))
75 return "divxu.w\\t%T2,%S0";
76 else
77 return "divxu.w\\t%T2,%S0\;mov.w\\t%e0,%f3";
78 }
79 [(set_attr "length" "4")])
80
81 (define_insn "divmodhi4"
82 [(set (match_operand:HI 0 "register_operand" "=r")
83 (truncate:HI
84 (div:SI
85 (match_operand:SI 1 "register_operand" "0")
86 (sign_extend:SI (match_operand:HI 2 "register_operand" "r")))))
87 (set (match_operand:HI 3 "register_operand" "=r")
88 (truncate:HI
89 (mod:SI
90 (match_dup 1)
91 (sign_extend:SI (match_dup 2)))))]
92 ""
93 {
94 if (find_reg_note (insn, REG_UNUSED, operands[3]))
95 return "divxs.w\\t%T2,%S0";
96 else
97 return "divxs.w\\t%T2,%S0\;mov.w\\t%e0,%f3";
98 }
99 [(set_attr "length" "6")])