diff gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfcvt-compile.c @ 19:2b5abeee2509 default tip

update gcc11
author anatofuz
date Mon, 25 May 2020 07:50:57 +0900
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--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfcvt-compile.c	Mon May 25 07:50:57 2020 +0900
@@ -0,0 +1,48 @@
+/* { dg-do assemble { target { aarch64*-*-* } } } */
+/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
+/* { dg-add-options arm_v8_2a_bf16_neon } */
+/* { dg-additional-options "-save-temps" } */
+/* { dg-final { check-function-bodies "**" "" {-O[^0]} } } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+#include <arm_neon.h>
+
+/*
+**test_bfcvtn:
+**     bfcvtn	v0.4h, v0.4s
+**     ret
+*/
+bfloat16x4_t test_bfcvtn (float32x4_t a)
+{
+  return vcvt_bf16_f32 (a);
+}
+
+/*
+**test_bfcvtnq:
+**     bfcvtn	v0.4h, v0.4s
+**     ret
+*/
+bfloat16x8_t test_bfcvtnq (float32x4_t a)
+{
+  return vcvtq_low_bf16_f32 (a);
+}
+
+/*
+**test_bfcvtnq2:
+**     bfcvtn2	v0.8h, v1.4s
+**     ret
+*/
+bfloat16x8_t test_bfcvtnq2 (bfloat16x8_t inactive, float32x4_t a)
+{
+  return vcvtq_high_bf16_f32 (inactive, a);
+}
+
+/*
+**test_bfcvt:
+**     bfcvt	h0, s0
+**     ret
+*/
+bfloat16_t test_bfcvt (float32_t a)
+{
+  return vcvth_bf16_f32 (a);
+}